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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.
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A push-pull circuit for an opto-electronic device includes: an output node; a pull-up circuit that, in operation, controls a falling edge rate of an input signal to the opto-electronic device while sharing charge with the output node; and a pull-down circuit that, in operation, controls a rising edge rate of the input signal to the opto-electronic device while sharing charge with the output node.
An integrated silicon carbide rectifier circuit with an on chip isolation diode. The isolation diode can be a channel-to-substrate isolation diode or a channel to channel isolation diode. the circuit teaches an integrated diode rectification circuit for use with a two phase center tap transformer having a first voltage output, a second voltage output, and a center tap output with a single chip having a first half-wave rectifier connected to the first voltage output, a second half-wave rectifier connected to the second voltage output, and a floating substrate connection connected to the center tap output and an on chip first channel-to-substrate isolation diode electrically connected between the first half-wave rectifier and the floating substrate.
A turbomachine blade, and a coupon for a turbomachine blade, are disclosed. The blade may include an airfoil body having a pressure side and a suction side connected by a leading edge and a trailing edge, a coolant feed passage defined in the airfoil body, and a coolant reuse passage defined in the airfoil body. The blade may also include a first cooling circuit defined in the airfoil body. The first cooling circuit may include a rearward passage extending toward the trailing edge from and fluidly coupled to the coolant feed passage, and a radially spreading return passage extending away from the trailing edge toward and fluidly coupled to the coolant reuse passage. The cooling circuit may also include a radially extending turn passage coupling the rearward passage and the radially spreading return passage. A first set of obstructions may be positioned in the radially extending turn passage.
A power converter apparatus comprises a set of switching elements communicatively coupled with a set of gate drive circuits. Each gate drive circuit is configured to provide a respective drive signal to a corresponding switching element, each switching element being switchably responsive to the respective drive signal. The apparatus includes a controller module configured to control an output state of the power converter, and selectively change one of a respective gate resistance and a respective gate current of a corresponding subset of the gate drive circuits based on the output state of the power converter.
A three-dimensional integrated circuit includes a first die structure having a first geometry. The first die structure includes a first region that operates with a first power density and a second region that operates with a second power density. The first power density is less than the second power density. The three-dimensional integrated circuit includes a second die structure having a second geometry. A stacked portion of the second die structure is aligned with the first region. The three-dimensional integrated circuit includes an additional die structure stacked with the first die structure and the second die structure. The additional die structure has the first geometry or the second geometry.
High-fidelity numerical methods that model the physical layout of a device are essential for the design of many technologies. For methods that characterize electromagnetic effects, these numerical methods are referred to as computational electromagnetics (CEM) methods. Although the CEM research field is mature, emerging applications can still stress the capabilities of the techniques in use today. The design of superconducting circuit quantum devices falls in this category due to the unconventional material properties and important features of the devices covering nanometer to centimeter scales. Such multiscale devices can stress the fundamental properties of CEM tools which can lead to an increase in simulation times, a loss in accuracy, or even cause no solution to be reliably found. While these challenges are being investigated by CEM researchers, knowledge about them is limited in the broader community of users of these CEM tools. This review is meant to serve as a practical introduction to the fundamental aspects of the major CEM techniques that a researcher may need to choose between to model a device, as well as provide insight into what steps they may take to alleviate some of their challenges. Our focus is on highlighting the main concepts without rigorously deriving all the details, which can be found in many textbooks and articles. After covering the fundamentals, we discuss more advanced topics related to the challenges of modeling multiscale devices with specific examples from superconducting circuit quantum devices. We conclude with a discussion on future research directions that will be valuable for improving the ability to successfully design increasingly more sophisticated superconducting circuit quantum devices. Although our focus and examples are taken from this area, researchers from other fields will still benefit from the details discussed here.
Regarding the mixed ionic-electronic conductive electrolytes, there are several constant assumptions about cell resistances and transference numbers. In this work, the charge transport frameworks of mixed conductive SOCs are comprehensively illustrated. And the independent external current density is introduced into the equivalent circuit for considering the variations of cell resistances under load. The updated expressions of cell resistances together with transference numbers are deduced rigorously based on the equivalent circuit. Electrolyte-supported NiO-GDC/GDC/LSCF cells are tested, and the experimental results validate the variations of cell resistances, especially for the polarization resistance. The comparisons show that electron hole resistances together with transference number calculated by the updated expressions are larger than those obtained by Liu’s method. More accurate transference number and cell resistances under load can be achieved by using the proposed method in this study.
The objective of the project is to develop a new class of ultrafast, self-powered, programmable, autonomously operated, bidirectional solid state circuit breakers (SSCBs) using wide band gap (WBG) semiconductors with 1000X reduction in response time and 5X reduction in cost in comparison to commercial mechanical circuit breakers. In particular, we have developed two SSCB prototypes of 380VDC/220VAC/20A and 1000VDC/10A using GaN power switches for common distribution-level AC and DC voltages.
Joint analysis studies of open-circuit voltage and photoluminescence intensity (PL-I) are reported for CuIn 1-x GaxSe 2 (CIGSe) solar cells. A range of compositions are investigated, including constant x=0.35 and x=0.55 as well as a graded composition profile having a minimum of x=0.25. Both the open circuit voltage and PL-I are measured as functions of temperature and illumination intensity. With these two measurements, a full model-based fitting of the temperature and illumination dependence allows extraction of the effects of window layer band offset and shunt resistance, in addition to bulk and interface recombination parameters. Finally, to quantitatively analyze the two distinct measurements jointly, the absolute PL-I is measured to obtain quasi-Fermi-level splitting.
Guide for designing printed circuits and circuit boards
Logical circuit for analysis of switching circuits with cell matching using p-n-p and n-p-n transistors
Single Event Transients in analog and digital electronics from space generated high energetic nuclear particles can disrupt either temporarily and sometimes permanently the functionality and performance of electronics in space vehicles. This work first provides some insights into the modeling of SET in electronic circuits that can be used in SPICE-like simulators. The work is then directed to present methodologies, one of which was developed by this author, for the assessment of SET at different levels of integration in electronics, from the circuit level to the subsystem level.
This poster describes a first attempt to demonstrate a multi-chip prototype lander control and sensor signal digitization electronics circuit board comprised of ten NASA Glenn IC Generation 11 SiC JFET-R IC chips in 460 °C, 9.4 MPa harsh Venus surface conditions. The lander circuit ceased electrical operation prematurely at 107 °C as the Venus chamber heated up. Optical and SEM post-test inspections indicate fatal dielectric cracks occurred on only one of the ten SiC chips.
This work compares design layouts and circuit simulations of the next two prototype NASA Glenn SiC JFET-R IC fabrication runs designated “IC Gen. 12” and “IC Gen. 13”. Even though both generations employ the same physical JFET gate length and chip size, SPICE simulations predict drastic improvements to IC capabilities and performance metrics for Gen. 13 over Gen. 12. The main factors behind simulated performance differences are thinner n-channel layer leading to reduced operating voltages and switch to stepper-based photolithography that enables roughly 4-fold layout area reductions for functionally identical circuit blocks.
The infrared focal plane array (IRFPA) is gradually becoming more systematic. In order to enhance the signal processing capabilities, analog-to-digital converters (ADC) integrated into the readout integrated circuit (ROIC) is an important development trend. However, the cryogenic effects of MOSFET devices will affect the conversion accuracy of the ADC at 77 K. In this paper, the main parameters of MOSFET are extracted at 77 K in 0.18 μm CMOS process, and a cryogenic model is established. Based on this, a digital ROIC is designed, which integrates a 12-bit single-slope integral ADC in pixel unit. By applying continuous integral ramp generator and mixed-voltage comparator, a high-linearity and low-power consumption single-slope ADC is realized for the cooled readout circuit. The measured dynamic effective number of bits of the ADC at 77 K is 10.92 bits, the static no-missing code resolution reaches 11.99 bits, the maximum differential nonlinear |DNL| < 1LSB and maximum integral nonlinear |INL| < 1LSB. This paper realizes the design of a digital ROIC for IRFPA and improves the simulation accuracy at 77 K.
Sustainable electronics aim to reduce environmental impact by using ecofriendly materials, energy-efficient manufacturing, and recyclable components. However, existing approaches rely on complex, resource-intensive methods, rare metals, or nanomaterials with limited stability as well as plastic substrates, raising sustainability issues. Solution-processed two-dimensional (2D) materials offer a promising alternative: water-based and biocompatible conductive, semiconductive, and insulating 2D material inks can be produced with scalable techniques and are suitable for the fabrication of fully printed devices on low-cost and biodegradable paper substrates. However, 2D material only and fully printed diodes on paper have not yet been reported. Here, we demonstrate fully inkjet-printed 2D material-based diodes on paper using metal-insulator-semiconductor and metal-insulator-metal-semiconductor architectures. Water-based graphene and MoS2 inks, prepared by liquid-phase exfoliation, are used for the metallic and insulating films, while electrochemical exfoliation is used to produce the semiconducting MoS2 ink. The highest forward-to-reverse current ratio obtained is 330 (at ±2 V), while the forward current density is 1 mA/cm2 (at 1 V), making the diode performance comparable to the best solution-processed diodes reported so far. However, in contrast to previous works, fabrication occurs entirely at room temperature and ambient pressure, without using high-pressure sputtering, thermal evaporation, and any precious metal ink. The devices maintain stable performance under bending up to strain of 4% over 10,000 cycles. Finally, the diodes are successfully integrated with other 2D-material based electrical components to realize fully printed RC circuits, differentiators, integrators, and AC-to-DC converters onto paper, hence demonstrating the suitability of our approach for sustainable and disposable integrated circuits.
Mid-circuit measurement and reset of subsets of qubits are crucial ingredients of quantum error correction and many quantum information applications. Measurement of atomic qubits is accomplished through resonant fluorescence, which typically disturbs neighboring atoms due to photon scattering. We propose and prototype a scheme for measurement and reset that provides both spatial and spectral isolation by using tightly focused laser beams and narrow atomic transitions. The unique advantage of this scheme is that all operations are applied exclusively to the read-out qubit, with little overhead and negligible disturbance to the other qubits of the same species. In this paper, we pave the way for noninvasive and high-fidelity mid-circuit measurement and demonstrate all key building blocks on a single trapped barium ion.
Here, we present a method to numerically obtain low-energy effective models based on a unitary transformation of the ground state. The algorithm finds a unitary circuit that transforms the ground state of the original model to a projected wavefunction with only the low-energy degrees of freedom. The effective model can then be derived using the unitary transformation encoded in the circuit. We test our method on the one-dimensional and two-dimensional square-lattice Hubbard model at half-filling, and obtain more accurate effective spin models than the standard perturbative approach.