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Indirect measurement of wafer surface impurities has sensitivity of 300 monolayers. Photoconductivity-decay apparatus determines bulk recombination lifetime in semiconductor materials. Bulk impurity levels before and after annealing relate to level of surface contamination. Method evaluates wafer cleaning techniques, qualifying purity of chemical and deionized water used, or monitors production process.
Methods of producing large areas of silicon sheets were developed by using inside diameter (I.D.) saws to slice silicon ingots. A 16 inch automated I.D. slicing machine was modified to accept programmable electric feed system, a crystal rotating system and a dyna-track blade monitoring and control system. The saw and accessories were used to slice 75 mm diameter single crystal silicon ingots while rotating them. The automated saw automatically recovered the wafers and loaded them into a cassette. The amount of material lost during slicing was reduced by using smaller blades than ones normally used to slice the wafers. Slicing runs on 100 mm diameter silicon is the next goal.
Microstructural evaluation tests performed on Cu-doped, Ti-doped and Cu/Ti doped p-type silicon single crystal wafers, before and after the solar cell fabrication, and evaluation of both dark forward and reverse I-V characteristic records for the solar cells produced from the corresponding silicon wafers, show that Cu mitigates the unfavorable effects of Ti, and thus provides for higher conversion efficiency, thereby providing an economical way to reduce the deleterious effects of titanium, one of the impurities present in metallurgical grade silicon material.
The paper describes the heat exchanger method (HEM) for growing silicon crystals. The problem of ingot cracking was solved by using a graded structure silica crucible, and vacuum processing eliminated expensive high-purity argon. Solar cells fabricated from HEM silicon demonstrated conversion efficiencies up to 15% (AM1) at low cost, using square cross-section, single crystal silicon. A modified multiblade slurry machine was adapted for multiwire fixed abrasive slicing of silicon which uses a diamond attached to wires; this method provides a conversion ratio of 1.08 sq m of wafer per kg of silicon ingot, and produces wafers free of edge chipping with a surface damage of 3-5 microns.
A television X-ray topographic camera system was constructed. The system differs from the previous system in that it incorporates the X-ray TV imaging system and has a semi-automatic wafer loading system. Also the X-ray diffraction is in a vertical plane. This feature makes wafer loading easier and makes the system compatible with any commercial X-ray generating system. Topographs and results obtained from a study of the diffraction contrast variation with impurity concentration for both boron implanted and boron diffused silicon are included.
The use of gridded back contact on thin silicon solar cells 50 micrometers was investigated. An unexpected increase in short circuit current of almost 10 percent was experienced for 2 cm x 2 cm cells. Control cells with the standard continuous contact metallization were fabricated at the same time as the gridded back cells with all processes identical up to the formation of the back contact. The gridded back contact pattern was delineated by evaporation of Ti-Pd over a photo-resist mask applied to the back of the wafer; the Ti-Pd film on the controls was applied in the standard fashion in a continuous layer over the back of the cell. The Ti-Pd contacts were similarly applied to the front of the wafer, and the grid pattern on both sides of the cell was electroplated with 8-10 micrometers of silver.
The results of the study form a basis for silicon producers, wafer manufacturers, and cell fabricators to develop appropriate cost-benefit relationships for the use of less pure, less costly solar grade silicon. Cr is highly mobile in silicon even at temperatures as low as 600 C. Contrasting with earlier data for Mo, Ti, and V, Cr concentrations vary from place to place in polycrystalline silicon wafers and the electrically-active Cr concentration in the polysilicon is more than an order of magnitude smaller than would be projected from single crystal impurity data. We hypothesize that Cr diffuses during ingot cooldown after growth, preferentially segregates to grain and becomes electrically deactivated. Accelerated aging data from Ni-contaminated silicon imply that no significant impurity-induced cell performance reduction should be expected over a twenty year device lifetime.
The detectors were fabricated from a Ge:Ga wafer from Eagle-Pitcher with a room temperature resistivity of approx. 12ohms cm. The wafer is approximately 2 inches in diameter and 0.061 inches thick. The contact material was ion implanted with Boron using 10 to the 14th power ions/sq cm at 25 Kev and 2 x10 to the 14th power ions/sq cm at 50 Kev. The crystal was then sputter-cleaned and metallized first with sputtered Ti and then sputter Au. In addition to the usual infrared measurements of responsivity and noise, measurements were made of the detectors' response to ionizing radiation.
A totally automated facility for semiconductor oxidation and diffusion was developed using a state-of-the-art diffusion furnace and high temperature grown oxides. Major innovations include: (1) a process controller specifically for semiconductor processing; (2) an automatic loading system to accept wafers from an air track, insert them into a quartz carrier and then place the carrier on a paddle for insertion into the furnace; (3) automatic unloading of the wafers back onto the air track, and (4) boron diffusion using diborane with plus or minus 5 percent uniformity. Processes demonstrated include Wet and dry oxidation for general use and for gate oxide, boron diffusion, phosphorous diffusion, and sintering.
Results on the performance of solar cells fabricated on wafers from multiple silicon ingots of large diameter, grown by using a single crucible and a sequential melt replenishment Czochralski (CZO) technique are presented. Samples were analyzed for resistivity, dislocation density and impurity content. Solar cells were fabricated from the seed, center and tang end of each ingot to evaluate the growth reproducibility and material quality. The cell efficiency within a given wafer varies by no more than plus or minus 5% of the average value. A small but consistent decrease in the cell efficiency is observed from the first to the fourth ingot grown from a single crucible. This decrease may be related to an increase in impurity content or dislocation density or a combination of both. The efficiency of the cells fabricated from the tang end of the fourth ingot is about 10% lower than that of the control cell. An impurity effects model is employed to correlate this decrease in efficiency with the impurity build-up in the residual melt.
The conversion of polycrystalline silicon to sheet form (the wafers produced are 10 cm x 10 cm cross section with minimum surface damage) by the Heat Exchanger Method (HEM) and multi-wire Fixed Abrasive Slicing Technique (FAST), as a means of reducing the cost of solar arrays for adaptation of photovoltaic technology for terrestrial applications, is given. A schematic of a HEM furnace, which includes a silica crucible, and developments in the HEM process are presented. A new machine for slicing with wire was designed and fabricated. The high-speed slicer has been used to slice 19 wafers per cm from 10 cm diameter crystals. Both HEM and FAST are low-cost processes and they have the potential of giving one of the lowest add-on costs ($6.24 and $6.48 per square meter of sheet respectively, with the combination add-on cost of $14.87 per square meter) of this conversion.
Solar cell fabrication processes, in particular junction formation and metallization, are evaluated in terms of cell efficiencies, process yields, module packing factors, and energy cost effectiveness. It is shown that for junction formation, the diffusion processes provide a relatively low-cost approach. The costs per unit cell area can be further reduced by increased wafer area and mechanized wafer handling. The costs for a large number of metallization processes, excluding the costs of the metal, are roughly comparable. However, their varying influence on cell performance leads to a significant spread in the allowable process costs.
Fracture of Czochralski silicon wafers during processing is an important factor in solar cell yield and cost. A fracture-mechanics test and analysis program was developed to evaluate fracture strength changes in the in-process wafer-to-cell processing at different stages on a manufacturer's production line. The strength data were described by Weibull statistical analysis and can be interpreted with the surface-flaw distribution of each of the process steps.
The feasibility of developing a high temperature capacitor for 1100 F operation which is as small and light as conventional capacitors for normal operating temperatures is discussed. Pyrolyic boron nitride (PBN) was selected for the dielectric. The PBN capacitors were made by slicing and lapping material from thick blocks and then sputtering thin film electrodes. These capacitors had breakdown strengths of 7,000 volts per mil and a dissipation factor of less than 0.001 at 1100 F. Additional processing improvements were made after testing a multi-layer or stacked PBN capacitor for 1,000 hours at 1100 F. Sputter etching the wafers before depositing electrodes resulted in a reduction in dissipation factor. A sputtered boron nitride film applied to the outer electrode surfaces produced a more stable capacitor. A design for a 0.1 mu F capacitor and a summary of PBN wafer fabrication costs are given.
A solar cell junction processing system was developed and fabricated. A pulsed electron beam for the four inch wafers is being assembled and tested, wafers were successfully pulsed, and solar cells fabricated. Assembly of the transport locks is completed. The transport was operated successfully but not with sufficient reproducibility. An experiment test facility to examine potential scaleup problems associated with the proposed ion implanter design was constructed and operated. Cells were implanted and found to have efficiency identical to the normal Spire implant process.
Work has progressed in fabrication and characterization of solar cells from ubiquitous crystallization process (UCP) wafers and LASS ribbons. Gettering tests applied to UCP wafers made little change on their performance compared with corresponding baseline data. Advanced processes such as shallow junction (SJ), back surface field (BSF), and multilayer antireflection (MLAR) were also applied. While BSF by Al paste had shunting problems, cells with SJ and BSF by evaporated Al, and MLAR did achieve 14.1% AMI on UCP silicon. The study of LASS material was very preliminary. Only a few cells with SJ, BSR, (no BSF) and MLAR were completed due to mechanical yield problems after lapping the material. Average efficiency was 10.7% AMI with 13.4% AMI for CZ controls. Relatively high minority carrier diffusion lengths were obtained. The lower than expected Jsc could be partially explained by low active area due to irregular sizes.
Optimization of the Multi-Blade Slurry wafering technique was evaluated. Several wafering runs were made. Sufficient data necessary for a complete cost analysis of each of the three types of saw utilized are provided.
The status of technological developments in silicon wafer production is summarized. Wafer growing and casting/sawing methods are considered. aba J.D.