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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 613 records · Page 34

EOS: A project to investigate the design and construction of real-time distributed embedded operating systems

The EOS project is investigating the design and construction of a family of real-time distributed embedded operating systems for reliable, distributed aerospace applications. Using the real-time programming techniques developed in co-operation with NASA in earlier research, the project staff is building a kernel for a multiple processor networked system. The first six months of the grant included a study of scheduling in an object-oriented system, the design philosophy of the kernel, and the architectural overview of the operating system. In this report, the operating system and kernel concepts are described. An environment for the experiments has been built and several of the key concepts of the system have been prototyped. The kernel and operating system is intended to support future experimental studies in multiprocessing, load-balancing, routing, software fault-tolerance, distributed data base design, and real-time processing.

Campbell, R. H.↗

CELSS research and development program

Research in Controlled Ecological Life Support Systems (CELSS) conducted by NASA indicate that plant based systems are feasible candidates for human support in space. Ames has responsibility for research and development, systems integration and control, and space flight experiment portions of the CELSS program. Important areas for development of new methods and technologies are biomass production, waste processing, water purification, air revitalization, and food processing. For the plant system, the approach was to identify the flexibility and response time for the food, water, and oxygen production, and carbon dioxide consumption processes. Tremendous increases in productivity, compared with terrestrial agriculture, were realized. Waste processing research emphasizes recycle (transformation) of human wastes, trash, and inedible biomass to forms usable as inputs to the plant production system. Efforts to improve efficiency of the plant system, select new CELSS crops for a balanced diet, and initiate closed system research with the Crop Growth Research Chambers continue. The System Control and Integration program goal is to insure orchestrated system operation of the biological, physical, and chemical operation of the biological, physical, and chemical component processors of the CELSS. Space flight studies are planned to verify adequate operation of the system in reduced gravity or microgravity environments.

Bubenheim, David↗

Parallel decomposition methods for the solution of electromagnetic scattering problems

This paper contains a overview of the methods used in decomposing solutions to scattering problems onto coarse-grained parallel processors. Initially, a short summary of relevant computer architecture is presented as background to the subsequent discussion. After the introduction of a programming model for problem decomposition, specific decompositions of finite difference time domain, finite element, and integral equation solutions to Maxwell's equations are presented. The paper concludes with an outline of possible software-assisted decomposition methods and a summary.

Cwik, Tom↗

TIGRE: Combinator graph reduction on the RTX 2000

An efficient evaluation technique is examined for lazy functional programs based on combinator graph reduction. Graph reduction is widely believed to be slow and inefficient, but an abstract machine called the Threaded Interpretive Graph Reduction Engine (TIGRE) achieves a substantial speedup over previous reduction techniques. The runtime system of TIGRE is a threaded system that permits self-modifying program execution with compiler-guaranteed safety. This paper describes an implementation of TIGRE in Forth for the Harris RTX 2000 stack processor.

Koopman, Philip, Jr.↗

Dynamic data distributions in Vienna Fortran

Vienna Fortran is a machine-independent language extension of Fortran, which is based upon the Single-Program-Multiple-Data (SPMD) paradigm and allows the user to write programs for distributed-memory systems using global addresses. The language features focus mainly on the issue of distributing data across virtual processor structures. Those features of Vienna Fortran that allow the data distributions of arrays to change dynamically, depending on runtime conditions are discussed. The relevant language features are discussed, their implementation is outlined, and how they may be used in applications is described.

Chapman, Barbara↗

Multiple Hollow Cathode Wear Testing

A hollow cathode-based plasma contactor has been baselined for use on the Space Station to reduce station charging. The plasma contactor provides a low impedance connection to space plasma via a plasma produced by an arc discharge. The hollow cathode of the plasma contactor is a refractory metal tube, through which xenon gas flows, which has a disk-shaped plate with a centered orifice at the downstream end of the tube. Within the cathode, arc attachment occurs primarily on a Type S low work function insert that is next to the orifice plate. This low work function insert is used to reduce cathode operating temperatures and energy requirements and, therefore, achieve increased efficiency and longevity. The operating characteristics and lifetime capabilities of this hollow cathode, however, are greatly reduced by oxygen bearing contaminants in the xenon gas. Furthermore, an optimized activation process, where the cathode is heated prior to ignition by an external heater to drive contaminants such as oxygen and moisture from the insert absorbed during exposure to ambient air, is necessary both for cathode longevity and a simplified power processor. In order to achieve the two year (approximately 17,500 hours) continuous operating lifetime requirement for the plasma contactor, a test program was initiated at NASA Lewis Research Center to demonstrate the extended lifetime capabilities of the hollow cathode. To date, xenon hollow cathodes have demonstrated extended lifetimes with one test having operated in excess of 8000 hours in an ongoing test utilizing contamination control protocols developed by Sarver-Verhey. The objectives of this study were to verify the transportability of the contamination control protocols developed by Sarver-Verhey and to evaluate cathode contamination control procedures, activation processes, and cathode-to-cathode dispersions in operating characteristics with time. These were accomplished by conducting a 2000 hour wear test of four hollow cathodes with different xenon gas purities and activation processes. The following will be presented: a description of the facility and test hardware, testing procedures and operating conditions, a discussion of test results, and conclusions.

Soulas, George C.↗

Ascent Heating Thermal Analysis on Spacecraft Adaptor Fairings

When the Crew Exploration Vehicle (CEV) is launched, the spacecraft adaptor (SA) fairings that cover the CEV service module (SM) are exposed to aero heating. Thermal analysis is performed to compute the fairing temperatures and to investigate whether the temperatures are within the material limits for nominal ascent aeroheating case. The ascent heating is analyzed by using computational fluid dynamics (CFD) and engineering codes at Marshall Space Flight Center. The aeroheating environment data used for this work is known as Thermal Environment 3 (TE3) heating data. One of the major concerns is with the SA fairings covering the CEV SM and the SM/crew launch vehicle (CLV) flange interface. The TE3 heating rate is a function of time, wall temperature, and the spatial locations. The implementation of the TE3 heating rate as boundary conditions in the thermal analysis becomes challenging. The ascent heating thermal analysis on SA fairings and SM/CLV flange interface are performed using two commercial software packages: Cullimore & Ring (C&R) Thermal Desktop (TD) 5.1 and MSC Patran 2007r1 b. TD is the pre-and post-processor for SINDA, which is a finite-difference-based solver. In TD, the geometry is built and meshed, the boundary conditions are defined, and then SINDA is used to compute temperatures. MSC Pthermal is a finite-element- based thermal solver. MSC Patran is the pre- and post-processor for Pthermal. Regarding the boundary conditions, the convection, contact resistance, and heat load can be imposed in different ways in both programs. These two software packages are used to build the thermal model for the same analysis to validate each other and show the differences in the modeling details.

Wang, Xiao Yen↗

An Ada programming support environment

The toolset of an Ada Programming Support Environment (APSE) being developed at North American Aircraft Operations (NAAO) of Rockwell International, is described. The APSE is resident on three different hosts and must support developments for the hosts and for embedded targets. Tools and developed software must be freely portable between the hosts. The toolset includes the usual editors, compilers, linkers, debuggers, configuration magnagers, and documentation tools. Generally, these are being supplied by the host computer vendors. Other tools, for example, pretty printer, cross referencer, compilation order tool, and management tools were obtained from public-domain sources, are implemented in Ada and are being ported to the hosts. Several tools being implemented in-house are of interest, these include an Ada Design Language processor based on compilable Ada. A Standalone Test Environment Generator facilitates test tool construction and partially automates unit level testing. A Code Auditor/Static Analyzer permits the Ada programs to be evaluated against measures of quality. An Ada Comment Box Generator partially automates generation of header comment boxes.

Tyrrill, AL↗

Radiation Hardening by Software Techniques on FPGAs: Flight Experiment Evaluation and Results

We present our work on implementing Radiation Hardening by Software (RHBSW) techniques on the Xilinx Virtex5 FPGAs PowerPC 440 processors on the SpaceCube 2.0 platform. The techniques have been matured and tested through simulation modeling, fault emulation, laser fault injection and now in a flight experiment, as part of the Space Test Program- Houston 4-ISS SpaceCube Experiment 2.0 (STP-H4-ISE 2.0). This work leverages concepts such as heartbeat monitoring, control flow assertions, and checkpointing, commonly used in the High Performance Computing industry, and adapts them for use in remote sensing embedded systems. These techniques are extremely low overhead (typically <1.3%), enabling a 3.3x gain in processing performance as compared to the equivalent traditionally radiation hardened processor. The recently concluded STP-H4 flight experiment was an opportunity to upgrade the RHBSW techniques for the Virtex5 FPGA and demonstrate them on-board the ISS to achieve TRL 7. This work details the implementation of the RHBSW techniques, that were previously developed for the Virtex4-based SpaceCube 1.0 platform, on the Virtex5-based SpaceCube 2.0 flight platform. The evaluation spans the development and integration with flight software, remotely uploading the new experiment to the ISS SpaceCube 2.0 platform, and conducting the experiment continuously for 16 days before the platform was decommissioned. The experiment was conducted on two PowerPCs embedded within the Virtex5 FPGA devices and the experiment collected 19,400 checkpoints, processed 253,482 status messages, and incurred 0 faults. These results are highly encouraging and future work is looking into longer duration testing as part of the STP-H5 flight experiment.

Hybrid Flight Architectures↗

Shuttle program. MCC Level C formulation requirements: Entry guidance and entry autopilot

A set of preliminary entry guidance and autopilot software formulations is presented for use in the Mission Control Center (MCC) entry processor. These software formulations meet all level B requirements. Revision 2 incorporates the modifications required to functionally simulate optimal TAEM targeting capability (OTT). Implementation of this logic in the MCC must be coordinated with flight software OTT implementation and MCC TAEM guidance OTT. The entry guidance logic is based on the Orbiter avionics entry guidance software. This MCC requirements document contains a definition of coordinate systems, a list of parameter definitions for the software formulations, a description of the entry guidance detailed formulation requirements, a description of the detailed autopilot formulation requirements, a description of the targeting routine, and a set of formulation flow charts.

Harpold, J. C.↗

Space data systems: Special purpose flight processors

The technical objectives are to develop high-performance, space-qualifiable, onboard computing, storage, and networking technologies. The topics are presented in viewgraph form and include the following: justification; approach; program description; state-of-the-art assessment; technology challenges; and relationship to external programs.

Henry, Mike↗

OpenACC unified programming environment for GPU and FPGA multi-hybrid acceleration

Attached accelerators have been frequently used in recent High Per- formance Computing (HPC) systems because of their high performance/power ratio. In particular, the Graphics Processing Unit (GPU) is the most popu- lar accelerator owing to its high peak FLOPS performance and high memory bandwidth supported by HBM2, etc. However, the performance of GPU depends highly on a large degree of SIMD parallelism and has difficulty sustaining a high performance on programs with frequent branch operations or a partially low degree of parallelism.By contrast, a Field Programmable Gate Array (FPGA) has received attention as a different type of accelerator than GPU as a fully reconfigurable processor fitting the target applications. The high performance of FPGA is mainly provided by a pipelined operation and optimized circuit suitable for any operation even with frequent conditional branches. We have been focusing on the flexibility of FPGA to compensate for the weakness of GPU. We believe that the coupling of GPU with FPGA can result in one of the most powerful accelerating platforms available.However, the program coding of GPU and FPGA coupling can be quite difficult for application users. Traditionally, CUDA by NVIDIA has been the most popular programming language with the largest share of GPUs used in HPC, whereas a hardware description language such as Verilog HDL has been used in FPGA programming. OpenCL coding has recently become available even on high-end FPGAs. Moreover, several recent studies have also enabled the OpenACC coding for use in FPGA. In this study, we provide a unified programming system based on OpenACC for a platform equipped with both GPU and FPGA aiming at the next-generation accelerated supercomputer framework. Our programming environment is called Multi-Hybrid OpenACC Translator (MHOAT), and in this paper, we describe the basic concept and prototype system of MHOAT based on an evaluation on the amount of coding required and the performance of a hybrid multi-device accelerated system.

Tsunashima, Ryuta↗

HTMT-class Latency Tolerant Parallel Architecture for Petaflops Scale Computation

Computational Aero Sciences and other numeric intensive computation disciplines demand computing throughputs substantially greater than the Teraflops scale systems only now becoming available. The related fields of fluids, structures, thermal, combustion, and dynamic controls are among the interdisciplinary areas that in combination with sufficient resolution and advanced adaptive techniques may force performance requirements towards Petaflops. This will be especially true for compute intensive models such as Navier-Stokes are or when such system models are only part of a larger design optimization computation involving many design points. Yet recent experience with conventional MPP configurations comprising commodity processing and memory components has shown that larger scale frequently results in higher programming difficulty and lower system efficiency. While important advances in system software and algorithms techniques have had some impact on efficiency and programmability for certain classes of problems, in general it is unlikely that software alone will resolve the challenges to higher scalability. As in the past, future generations of high-end computers may require a combination of hardware architecture and system software advances to enable efficient operation at a Petaflops level. The NASA led HTMT project has engaged the talents of a broad interdisciplinary team to develop a new strategy in high-end system architecture to deliver petaflops scale computing in the 2004/5 timeframe. The Hybrid-Technology, MultiThreaded parallel computer architecture incorporates several advanced technologies in combination with an innovative dynamic adaptive scheduling mechanism to provide unprecedented performance and efficiency within practical constraints of cost, complexity, and power consumption. The emerging superconductor Rapid Single Flux Quantum electronics can operate at 100 GHz (the record is 770 GHz) and one percent of the power required by convention semiconductor logic. Wave Division Multiplexing optical communications can approach a peak per fiber bandwidth of 1 Tbps and the new Data Vortex network topology employing this technology can connect tens of thousands of ports providing a bi-section bandwidth on the order of a Petabyte per second with latencies well below 100 nanoseconds, even under heavy loads. Processor-in-Memory (PIM) technology combines logic and memory on the same chip exposing the internal bandwidth of the memory row buffers at low latency. And holographic storage photorefractive storage technologies provide high-density memory with access a thousand times faster than conventional disk technologies. Together these technologies enable a new class of shared memory system architecture with a peak performance in the range of a Petaflops but size and power requirements comparable to today's largest Teraflops scale systems. To achieve high-sustained performance, HTMT combines an advanced multithreading processor architecture with a memory-driven coarse-grained latency management strategy called "percolation", yielding high efficiency while reducing the much of the parallel programming burden. This paper will present the basic system architecture characteristics made possible through this series of advanced technologies and then give a detailed description of the new percolation approach to runtime latency management.

Sterling, Thomas↗

Open Radiation Monitoring: Histogram Builder Module Design

The Open Radiation Monitoring Project seeks to develop and demonstrate a modular radiation detection architecture designed specifically for use in arms control treaty verification (ACTV) applications that will facilitate rapid development of trusted systems to meet the needs of potential future treaties. A modular architecture can be used to reduce more complex systems to a series of single purpose building blocks, thereby facilitating equipment inspection and in turn building trust in the equipment by all treaty parties. Furthermore, a modular architecture can be used to control data flow within the measurement system, reducing the risk of "hidden switches" and constraining the amount of sensitive information that could potentially be inadvertently leaked. This report details the first revision of a prototype circuit that will convert analog pulses directly into a histogrammed data set for further processing. The circuit was designed with both spectroscopy and multiplicity analysis in mind but can, in principle, be used to reduce any raw data stream into a histogram. The number of output channels is limited, and the histogram bin ranges are user configurable to allow for non-uniform and discontinuous bins, which makes it possible to restrict the information being passed down stream if desired. Pulse processing relies entirely on analog circuitry and non- programmable logic, which enables operation without the need for a central processor or other programmable control unit. The circuit remains untested under the Open Radiation Monitoring project due to the closure of the sponsoring program. However, further development and testing is scheduled to take place in support of a purpose-built trusted verification system development effort known as COGNIZANT, which demonstrates the potential benefit of developing a suite of modular trusted system components.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗

Advanced Avionics Breadboard Executive Design and Implementation

The advanced avionics breadboard (AAB) executive evolved from an effort to design and develop an avionics system. This executive is unique in that it supervises a triple redundant avionics computer system. Three IBM System 4 Pi/CP computers, operating synchronously and executing identical software, comprise the central processors which route data to and from a data bus via an input/output controller. The executive's basic function is to provide application programs with an efficient software structure within which to perform specific avionics application tasks. Although implemented in a triplex data management system, the AAB executive contains the flexibility to be adapted to other systems with minimal change.

Adams, L. R.↗

Spacecraft technology

Developments in spacecraft technology are discussed with emphasis on the Explorer satellite program. The subjects considered include the following: (1) nutational behavior of the Explorer-45 satellite, (2) panoramic sensor development, (3) onboard camera signal processor for Explorer satellites, and (4) microcircuit development. Information on the zero gravity testing of heat pipes is included. Procedures for cleaning heat treated aluminum heat pipes are explained. The development of a five-year magnetic tape, an accurate incremental angular encoder, and a blood freezing apparatus for leukemia research are also discussed.

Source record↗

Mission payloads subsystem description, revision 2

The Mission Payloads Subsystem (MPLS) which utilizes a simplified trajectory model to generate a list of missions for the Scheduling Algorithm for Mission Planning and Logistics Evaluation (SAMPLE) program is described. The MPLS is the mechanism that forms the basis of input for the other subsystems of SAMPLE and various post processors.

Williams, J. M.↗