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At least 613 records · Page 34

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NASA NTRS1999

Design Description of the X-33 Avionics Architecture

In this paper, we provide a design description of the X-33 avionics architecture. The X-33 is an autonomous Single Stage to Orbit (SSTO) launch vehicle currently being developed by Lockheed Martin for NASA as a technology demonstrator for the VentureStar Reusable Launch Vehicle (RLV). The X-33 avionics provides autonomous control of die vehicle throughout takeoff, ascent, descent, approach, landing, rollout, and vehicle safing. During flight the avionics provides communication to the range through uplinked commands and downlinked telemetry. During pre-launch and post-safing activities, the avionics provides interfaces to ground support consoles that perform vehicle flight preparations and maintenance. The X-33 Avionics is a hybrid of centralized and distributed processing elements connected by three dual redundant Mil-Std 1553 data buses. These data buses are controlled by a central processing suite located in the avionics bay and composed of triplex redundant Vehicle Mission Computers (VMCs). The VMCs integrate mission management, guidance, navigation, flight control, subsystem control and redundancy management functions. The vehicle sensors, effectors and subsystems are interfaced directly to the centralized VMCs as remote terminals or through dual redundant Data Interface Units (DIUs). The DIUs are located forward and aft of the avionics bay and provide signal conditioning, health monitoring, low level subsystem control and data interface functions. Each VMC is connected to all three redundant 1553 data buses for monitoring and provides a complete identical data set to the processing algorithms. This enables bus faults to be detected and reconfigured through a voted bus control configuration. Data is also shared between VMCs though a cross channel data link that is implemented in hardware and controlled by AlliedSignal's Fault Tolerant Executive (FTE). The FTE synchronizes processors within the VMC and synchronizes redundant VMCs to each other. The FTE provides an output-voting plane to detect, isolate and contain faults due to internal hardware or software faults and reconfigures the VMCs to accommodate these faults. Critical data in the 1553 messages are scheduled and synchronized to specific processing frames in order to minimize data latency. In order to achieve an open architecture, military and commercial off-the-shelf equipment is incorporated using common processors, standard VME backplanes and chassis, the VxWorks operating system, and MartixX for automatic code generation. The use of off-the-shelf tools and equipment helps reduce development time and enables software reuse. The open architecture allows for technology insertion, while the distributed modular elements allow for expansion to increased redundancy levels to meet the higher reliability goals of future RLVs.

Reichenfeld, Curtis J.↗

DOE OSTI2021

A-SST Initial Specification

The U.S. Army Research Office (ARO), in partnership with IARPA, are investigating innovative, efficient, and scalable computer architectures that are capable of executing next-generation large scale data-analytic applications. These applications are increasingly sparse, unstructured, non-local, and heterogeneous. Under the Advanced Graphic Intelligence Logical computing Environment (AGILE) program, Performer teams will be asked to design computer architectures to meet the future needs of the DoD and the Intelligence Community (IC). This design effort will require flexible, scalable, and detailed simulation to assess the performance, efficiency, and validity of their designs. To support AGILE, Sandia National Labs will be providing the AGILE-enhanced Structural Simulation Toolkit (A-SST). This toolkit is a computer architecture simulation framework designed to support fast, parallel, and multi-scale simulation of novel architectures. This document describes the A-SST framework, some of its library of simulation models, and how it may be used by AGILE Performers.

97 MATHEMATICS AND COMPUTING↗

NASA NTRSDate not supplied

An Integrated Software Architecture for Solar Cruiser Mission Design and Navigation

Solar Cruiser is a solar sailing mission, riding as a secondary payload to the Interstellar Mapping and Acceleration Probe (IMAP) mission, expected to launch in February of 2025. The Solar Cruiser vehicle will generate thrust via a complex, low-thrust solar sail. The extreme low-thrust nature of the solar sail will leave Solar Cruiser highly sensitive to external environmental effects (such as solar radiation pressure and high-order gravitational perturbations) throughout the entirety of flight. Because of this, preliminary & operational optimization routines must be intricately tied to high-order predictive propagation models to ensure the greatest possible confidence in mission success. The Solar Cruiser Mission Design and Navigation (MDNav) team has designed a software tool suite, employing the latest in software containerization technology, to accomplish this task, allowing for seamless development across several users and operating systems. Combining JPL’s Monte toolkit with University of Alabama’s high-performance optimizer, ASSET, the proposed architecture allows for instant verification of optimized trajectories within the same development environment that the optimization takes place, removing the need for mission designers and navigators to switch between tools. The MDNav software suite itself is separated from the development and operational scripts to be used in flight, which allows for maintaining a low-footprint version control profile – thus avoiding unnecessary file bloating. This paper discusses the historical differences between previous iterations of the Solar Cruiser MDNav tool suite and the current iteration, planned operational interfaces of the tool with other software and subsystems, and the planned path forward in maintaining containerization services for the software throughout the lifetime of Solar Cruiser.

solar cruiser↗

NASA NTRS1989

Algorithmic considerations of integrated design for CSI on a hypercube architecture

An approach is presented to the integrated design problem for actively controlled large, flexible mechanical systems for which Control Structure Interaction (CSI) problems are of concern. The two coupled design problems were identified as the optimal Structural Design problem the optimal Controller Design problem. These two problems can be addressed within a decision making loop that would consider each separately, and then sequentially analyze the effects of one on the other. Embedded in such a loop would be the simulation and coordination tasks as part of the decision tools required in a total (software) package. All of the above are compute-intensive tasks. In any such task, possible decompositions and gains due to the inherent parallelism have to be exploited. The problems under consideration, as applied to large flexible mechanical structures, are particularly suited to be mapped onto multicomputer systems in a hypercube topology.

Oezguener, UE.↗

NASA NTRS1991

Computing Availability And Reliability For A System

Elements contributing most to failure of system identified quickly. Reliability/Availability Analysis (RELAV) computer program is comprehensive analytical software tool to determine reliability or availability of any general system modeled as embedded k-out-of-n groups of items (components) and/or subgroups. Used to assess performance of system during late testing phase of design of system, to model candidate designs and/or architectures, or to validate and form predictions during early phases of design. C-language program.

Bowerman, Paul N.↗

NASA NTRS1990

32 bit digital optical computer - A hardware update

Such state-of-the-art devices as multielement linear laser diode arrays, multichannel acoustooptic modulators, optical relays, and avalanche photodiode arrays, are presently applied to the implementation of a 32-bit supercomputer's general-purpose optical central processing architecture. Shannon's theorem, Morozov's control operator method (in conjunction with combinatorial arithmetic), and DeMorgan's law have been used to design an architecture whose 100 MHz clock renders it fully competitive with emerging planar-semiconductor technology. Attention is given to the architecture's multichannel Bragg cells, thermal design and RF crosstalk considerations, and the first and second anamorphic relay legs.

Guilfoyle, Peter S.↗

NASA NTRS1983

Design of a high-speed digital processing element for parallel simulation

A prototype of a custom designed computer to be used as a processing element in a multiprocessor based jet engine simulator is described. The purpose of the custom design was to give the computer the speed and versatility required to simulate a jet engine in real time. Real time simulations are needed for closed loop testing of digital electronic engine controls. The prototype computer has a microcycle time of 133 nanoseconds. This speed was achieved by: prefetching the next instruction while the current one is executing, transporting data using high speed data busses, and using state of the art components such as a very large scale integration (VLSI) multiplier. Included are discussions of processing element requirements, design philosophy, the architecture of the custom designed processing element, the comprehensive instruction set, the diagnostic support software, and the development status of the custom design.

Milner, E. J.↗

NASA NTRS1991

NASA Space Engineering Research Center for VLSI systems design

This annual review reports the center's activities and findings on very large scale integration (VLSI) systems design for 1990, including project status, financial support, publications, the NASA Space Engineering Research Center (SERC) Symposium on VLSI Design, research results, and outreach programs. Processor chips completed or under development are listed. Research results summarized include a design technique to harden complementary metal oxide semiconductors (CMOS) memory circuits against single event upset (SEU); improved circuit design procedures; and advances in computer aided design (CAD), communications, computer architectures, and reliability design. Also described is a high school teacher program that exposes teachers to the fundamentals of digital logic design.

Source record↗

NASA NTRS2011

Phaeton Mast Dynamics: On-Orbit Characterization of Deployable Masts

The PMD instrument is a set of three custom-designed triaxial accelerometer systems designed specifically to detect and characterize the modal dynamics of deployable masts in orbit. The instrument was designed and built as a payload for the NuSTAR spacecraft, but it is now sponsored by the Air Force Research Laboratory's DSX project. It can detect acceleration levels from 1 micro gram to 0.12g over a frequency range of 0.1Hz to 30Hz, the results of which can support future modeling and designing of deployable mast structures for space. This paper details the hardware architecture and design, calibration test and results, and current status of the PMD instrument.

Phaeton Mast Dynamics (PMD)↗

NASA NTRS2017

Robust Exploration and Commercial Missions to the Moon Using NTR LANTR Propulsion and Lunar-Derived Propellants

The nuclear thermal rocket (NTR) has frequently been identified as a key space asset required for the human exploration of Mars. This proven technology can also provide the affordable access through cislunar space necessary for commercial development and sustained human presence on the Moon. In his post-Apollo Integrated Space Program Plan (1970-1990), Wernher von Braun, proposed a reusable nuclear thermal propulsion stage (NTPS) to deliver cargo and crew to the Moon to establish a lunar base before undertaking human missions to Mars. The NTR option was selected by von Braun because it was a demonstrated technology capable of generating both high thrust and high specific impulse (Isp 900 s) twice that of todays best chemical rockets. In NASAs Mars Design Reference Architecture (DRA) 5.0 study, the crewed Mars transfer vehicle used three 25 klbf Pewee engines the smallest and highest performing engine tested in the Rover program along with graphite composite fuel. Smaller, lunar transfer vehicles consisting of a NTPS using three approximately 16.5 klbf Small Nuclear Rocket Engines (SNREs), an in-line propellant tank, plus the payload can enable a variety of reusable lunar missions. These include cargo delivery and crewed lunar landing missions. Even weeklong tourism missions carrying passengers into lunar orbit for a day of sightseeing and picture taking are possible. The NTR can play an important role in the next phase of lunar exploration and development by providing an affordable in-space lunar transportation system (LTS) that can allow initial outposts to evolve into settlements supported by a variety of commercial activities such as in-situ propellant production used to supply strategically located propellant depots and transportation nodes. The utilization of iron-rich volcanic glass or lunar polar ice (LPI) deposits (each estimated at billions of metric tons) for propellant production can significantly reduce the launch mass requirements from Earth and can enable reusable, surface-based lunar landing vehicles (LLVs) using liquid oxygen/hydrogen (LOX/LH2) chemical rocket engines. Afterwards, LOX/LH2 propellant depots can be established in lunar equatorial and polar orbits to supply the LTS. At this point a modified version of the conventional NTR called the LOX-augmented NTR, or LANTR would be introduced into the LTS allowing bipropellant operation and leveraging the mission benefits of refueling with lunar-derived propellants for Earth return. The bipropellant LANTR engine utilizes the large divergent section of its nozzle as an afterburner into which oxygen is injected and supersonically combusted with nuclear preheated hydrogen emerging from the engines choked sonic throat essentially scramjet propulsion in reverse. By varying the oxygen-to-hydrogen mixture ratio, LANTR engines can operate over a range of thrust and Isp values while the reactor core power level remains relatively constant. Eventually, a LANTR-based LTS can enable a rapid commuter shuttle with one-way trip times to and from the Moon ranging from 36 to 24 hours. Even if only 1 of the extracted propellant from identified volcanic glass and polar ice deposits were available for use in lunar orbit, such a supply could support daily commuter flights to the Moon for many thousands of years! An evolutionary mission architecture is outlined and a variety of lunar missions and transfer vehicle designs are examined, along with the increasing demands on propellant production as mission complexity increases. A comparison of vehicle features and engine operating characteristics, for both NTR and LANTR engines, is also provided along with a brief discussion on the propellant production issues associated with using volcanic glass and LPI as source material.

Spacecraft design↗

DOE OSTI2026

Optics and Systems Design of the Ring-to-Second Target Transport Beam-Line for the SNS Second Target Station

The Second Target Station (STS) project at the Spallation Neutron Source (SNS) is being developed to provide world-leading cold neutron brightness for next-generation neutron scattering experiments. The STS Accelerator Systems (AS) scope includes the design and implementation of the Ring-to-Second Target (RTST) proton beam transport line, which extracts 1.3 GeV proton beam pulses from the existing Ring-to-Beam Transport (RTBT) system and delivers them to the STS target. The RTST design emphasizes operational reliability [high reliability], low activation [minimum activation of components and the tunnel], maintainability, and compatibility with existing SNS infrastructure through extensive reuse of proven RTBT systems and components. The beamline includes a new extraction region, a transport lattice consisting of dipole, quadrupole, and corrector magnets, beam instrumentation systems, vacuum systems, personnel protection systems, and radiation shielding systems. Beam optics and particle tracking studies were performed using PyORBIT to validate extraction trajectories, beam transport, and target beam spot requirements [60–90 cm² beam spot area]. This paper presents the optics design philosophy, extraction system architecture, transport lattice design, instrumentation strategy, vacuum system approach, and radiation protection integration for the RTST beamline. Particle tracking simulations indicate successful beam transport without beam loss under nominal operating conditions. The RTST is designed to transport 1.3 GeV proton beam pulses at repetition rates up to 15 Hz, delivering nominal beam power of 700 kW to the Second Target Station.

Baron, Alex [ORNL]↗

NASA NTRS2015

Software Defined Radio Architecture Contributions to Next Generation Space Communications

Space communications architecture concepts, comprising the elements of the system, the interactions among them, and the principles that govern their development, are essential factors in developing National Aeronautics and Space Administration (NASA) future exploration and science missions. Accordingly, vital architectural attributes encompass flexibility, the extensibility to insert future capabilities, and to enable evolution to provide interoperability with other current and future systems. Space communications architectures and technologies for this century must satisfy a growing set of requirements, including those for Earth sensing, collaborative observation missions, robotic scientific missions, human missions for exploration of the Moon and Mars where surface activities require supporting communications, and in-space observatories for observing the earth, as well as other star systems and the universe. An advanced, integrated, communications infrastructure will enable the reliable, multipoint, high-data-rate capabilities needed on demand to provide continuous, maximum coverage for areas of concentrated activity. Importantly, the cost/value proposition of the future architecture must be an integral part of its design; an affordable and sustainable architecture is indispensable within anticipated future budget environments. Effective architecture design informs decision makers with insight into the capabilities needed to efficiently satisfy the demanding space-communication requirements of future missions and formulate appropriate requirements. A driving requirement for the architecture is the extensibility to address new requirements and provide low-cost on-ramps for new capabilities insertion, ensuring graceful growth as new functionality and new technologies are infused into the network infrastructure. In addition to extensibility, another key architectural attribute of the space communication equipment's interoperability with other NASA communications systems, as well as those communications and navigation systems operated by international space agencies and civilian and government agencies. In this paper, we review the philosophies, technologies, architectural attributes, mission services, and communications capabilities that form the structure of candidate next-generation integrated communication architectures for space communications and navigation. A key area that this paper explores is from the development and operation of the software defined radio for the NASA Space Communications and Navigation (SCaN) Testbed currently on the International Space Station (ISS). Evaluating the lessons learned from development and operation feed back into the communications architecture. Leveraging the reconfigurability provides a change in the way that operations are done and must be considered. Quantifying the impact on the NASA Space Telecommunications Radio System (STRS) software defined radio architecture provides feedback to keep the standard useful and up to date. NASA is not the only customer of these radios. Software defined radios are developed for other applications, and taking advantage of these developments promotes an architecture that is cost effective and sustainable. Developments in the following areas such as an updated operating environment, higher data rates, networking and security can be leveraged. The ability to sustain an architecture that uses radios for multiple markets can lower costs and keep new technology infused.

Lessons Learned↗

NASA NTRS1993

Technical support for digital systems technology development. Task order 1: ISP contention analysis and control

Alternatives for realizing a packet-based network switch for use on a frequency division multiple access/time division multiplexed (FDMA/TDM) geostationary communication satellite were investigated. Each of the eight downlink beams supports eight directed dwells. The design needed to accommodate multicast packets with very low probability of loss due to contention. Three switch architectures were designed and analyzed. An output-queued, shared bus system yielded a functionally simple system, utilizing a first-in, first-out (FIFO) memory per downlink dwell, but at the expense of a large total memory requirement. A shared memory architecture offered the most efficiency in memory requirements, requiring about half the memory of the shared bus design. The processing requirement for the shared-memory system adds system complexity that may offset the benefits of the smaller memory. An alternative design using a shared memory buffer per downlink beam decreases circuit complexity through a distributed design, and requires at most 1000 packets of memory more than the completely shared memory design. Modifications to the basic packet switch designs were proposed to accommodate circuit-switched traffic, which must be served on a periodic basis with minimal delay. Methods for dynamically controlling the downlink dwell lengths were developed and analyzed. These methods adapt quickly to changing traffic demands, and do not add significant complexity or cost to the satellite and ground station designs. Methods for reducing the memory requirement by not requiring the satellite to store full packets were also proposed and analyzed. In addition, optimal packet and dwell lengths were computed as functions of memory size for the three switch architectures.

Stehle, Roy H.↗

NASA NTRS1986

Two-dimensional nonsteady viscous flow simulation on the Navier-Stokes computer miniNode

The needs of large-scale scientific computation are outpacing the growth in performance of mainframe supercomputers. In particular, problems in fluid mechanics involving complex flow simulations require far more speed and capacity than that provided by current and proposed Class VI supercomputers. To address this concern, the Navier-Stokes Computer (NSC) was developed. The NSC is a parallel-processing machine, comprised of individual Nodes, each comparable in performance to current supercomputers. The global architecture is that of a hypercube, and a 128-Node NSC has been designed. New architectural features, such as a reconfigurable many-function ALU pipeline and a multifunction memory-ALU switch, have provided the capability to efficiently implement a wide range of algorithms. Efficient algorithms typically involve numerically intensive tasks, which often include conditional operations. These operations may be efficiently implemented on the NSC without, in general, sacrificing vector-processing speed. To illustrate the architecture, programming, and several of the capabilities of the NSC, the simulation of two-dimensional, nonsteady viscous flows on a prototype Node, called the miniNode, is presented.

Nosenchuck, Daniel M.↗

NASA NTRS1993

Fault-tolerant onboard digital information switching and routing for communications satellites

The NASA Lewis Research Center is developing an information-switching processor for future meshed very-small-aperture terminal (VSAT) communications satellites. The information-switching processor will switch and route baseband user data onboard the VSAT satellite to connect thousands of Earth terminals. Fault tolerance is a critical issue in developing information-switching processor circuitry that will provide and maintain reliable communications services. In parallel with the conceptual development of the meshed VSAT satellite network architecture, NASA designed and built a simple test bed for developing and demonstrating baseband switch architectures and fault-tolerance techniques. The meshed VSAT architecture and the switching demonstration test bed are described, and the initial switching architecture and the fault-tolerance techniques that were developed and tested are discussed.

Shalkhauser, Mary JO↗

NASA NTRS2015

Improving the Discoverability and Availability of Sample Data and Imagery in NASA's Astromaterials Curation Digital Repository Using a New Common Architecture for Sample Databases

The Astromaterials Acquisition and Curation Office at NASA's Johnson Space Center (JSC) is the designated facility for curating all of NASA's extraterrestrial samples. The suite of collections includes the lunar samples from the Apollo missions, cosmic dust particles falling into the Earth's atmosphere, meteorites collected in Antarctica, comet and interstellar dust particles from the Stardust mission, asteroid particles from the Japanese Hayabusa mission, and solar wind atoms collected during the Genesis mission. To support planetary science research on these samples, NASA's Astromaterials Curation Office hosts the Astromaterials Curation Digital Repository, which provides descriptions of the missions and collections, and critical information about each individual sample. Our office is implementing several informatics initiatives with the goal of better serving the planetary research community. One of these initiatives aims to increase the availability and discoverability of sample data and images through the use of a newly designed common architecture for Astromaterials Curation databases.

Todd, N. S.↗

NASA NTRS2002

Fly-By-Light/Power-By-Wire Fault-Tolerant Fiber-Optic Backplane

The design and development of a fault-tolerant fiber-optic backplane to demonstrate feasibility of such architecture is presented. The simulation results of test cases on the backplane in the advent of induced faults are presented, and the fault recovery capability of the architecture is demonstrated. The architecture was designed, developed, and implemented using the Very High Speed Integrated Circuits (VHSIC) Hardware Description Language (VHDL). The architecture was synthesized and implemented in hardware using Field Programmable Gate Arrays (FPGA) on multiple prototype boards.

Malekpour, Mahyar R.↗

NASA NTRS1992

Domain specific software design for decision aiding

McDonnell Aircraft Company (MCAIR) is involved in many large multi-discipline design and development efforts of tactical aircraft. These involve a number of design disciplines that must be coordinated to produce an integrated design and a successful product. Our interpretation of a domain specific software design (DSSD) is that of a representation or framework that is specialized to support a limited problem domain. A DSSD is an abstract software design that is shaped by the problem characteristics. This parallels the theme of object-oriented analysis and design of letting the problem model directly drive the design. The DSSD concept extends the notion of software reusability to include representations or frameworks. It supports the entire software life cycle and specifically leads to improved prototyping capability, supports system integration, and promotes reuse of software designs and supporting frameworks. The example presented in this paper is the task network architecture or design which was developed for the MCAIR Pilot's Associate program. The task network concept supported both module development and system integration within the domain of operator decision aiding. It is presented as an instance where a software design exhibited many of the attributes associated with DSSD concept.

Keller, Kirby↗