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596 records · Page 34

Long-lived Bell states in an array of optical clock qubits

The generation of long-lived entanglement on an optical clock transition is a key requirement to unlocking the promise of quantum metrology. Arrays of neutral atoms constitute a capable quantum platform for accessing such physics, where Rydberg-based interactions may generate entanglement between individually controlled and resolved atoms. To this end, we leverage the programmable state preparation afforded by optical tweezers along with the efficient strong confinement of a 3d optical lattice to prepare an ensemble of strontium atom pairs in their motional ground state. We engineer global single-qubit gates on the optical clock transition and two-qubit entangling gates via adiabatic Rydberg dressing, enabling the generation of Bell states, $|\psi{\rangle}$ $= \frac{1}{\sqrt{2}}(|gg\rangle$ $+ i|ee\rangle{)}$, with a fidelity of $\mathcal{F}$ = 92.8(2:0)%. For use in quantum metrology, it is furthermore critical that the resulting entanglement be long lived; we find that the coherence of the Bell state has a lifetime of $τ_{bc}$ = 4:2(6) s via parity correlations and simultaneous comparisons between entangled and unentangled ensembles. Such Bell states can be useful for enhancing metrological stability and bandwidth. Further rearrangement of hundreds of atoms into arbitrary configurations using optical tweezers will enable implementation of many-qubit gates and cluster state generation, as well as explorations of the transverse field Ising model and Hubbard models with entangled or finite-range-interacting tunnellers.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗

Micro-Inspector Avionics Module (MAM): A Self-Contained Low Power, Reconfigurable Avionics Platform for Small Spacecrafts and Instruments

This paper describes development of a radiation tolerant, low power, reconfigurable avionics module aimed at meeting the avionics needs of the JPL Micro-Inspector spacecraft. This module represents a complete avionics system, consisting of two PowerPC 405 CPUs embedded within a reconfigurable FPGA fabric of over 8 Million logic gates, 64MB of EDAC protected Flash storage and 128MB of EDAC protected DDR SDRAM or SDRAM memories, along with FPGA SEU mitigation logic, and all necessary power conversion. Processor SEU mitigation is achieved by running the two processors in a lock-step and compare configuration. All of these building blocks are integrated into a double sided circuit board that takes as little as 6 square inches of board space. This module can be embedded into a user system as part of a bigger circuit assembly or as a self contained module. This module is being developed as part of a JPL led Micro-Inspector Program, funded by NASA ESMD aimed at producing a 10Kg micro spacecraft.

configurable↗