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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 613 records · Page 34

DIRECT RF SAMPLING BASED LLRF CONTROL SYSTEM FOR C-BAND LINEAR ACCELERATOR

Low Level RF (LLRF) control systems of linear accel- erators (LINACs) are typically implemented with hetero- dyne based architectures, which have complex analog RF mixers for up and down conversion. The Gen 3 Radio Fre- quency System-on-Chip (RFSoC) device from AMD Xilinx integrates data converters with maximum RF frequency of 6 GHz. This enables direct RF sampling of C-band LLRF signal typically operated at 5.712 GHz without any analogue mixers, which can significantly simplify the system architec- ture. The data converters sample RF signals in higher order Nyquist zones and then up or down convert digitally by the integrated data path in RFSoC. The closed-loop feedback control firmware implemented in FPGA integrated in RF- SoC can process the base-band signal from the ADC data path and calculate the updated phase and amplitude to be up- mixed by the DAC data path. We have developed a C-band LLRF control RFSoC platform with direct RF sampling, which targets Cool Copper Collider (𝐶3) and other C or S band LINAC research and development projects. In this paper, the architecture of the platform will be described. We have optimized the configuration of the data converter and characterized performance of them with RF pulses. The test results for some of the key performance parameters for the LLRF platform with our custom solid-state amplifier, such as phase and amplitude stability, will be discussed in this paper.

Liu, C↗

Flattening the field during injection in the Fermilab booster using dipole corrector magnets

The FNAL Booster is a fast cycling 15 Hz resonant circuit synchrotron accelerating proton beam from 400 MeV to 8 GeV. The linac pulse injected into the Booster is ~32 μsec long and fills the ring by multi-turn charge-exchange injection. As part of the PIP-II project, the Booster injection energy and repetition rate will be increased to 800 MeV and 20 Hz respectively. Due to much reduced average current in the new superconducting PIP-II linac, the injection time will increase to 550 μs. A shorter machine cycle coupled to a longer injection time make flattening the injection porch B-field during injection important requirement for successful PIP-II operation. We aim to achieve: (1) flattening of the net bending during injection using dipole correctors, and (2) using a new system based on an Altera FPGA board, reduction of the cycle-to-cycle bending field variation caused by current jitter in the Gradient Magnet Power Supply (GMPS). While the flat injection scheme is essential to future PIP-II operations, it should also noticeably improve efficiency for present HEP operations.

43 PARTICLE ACCELERATORS↗

Annual LDRD Report (FY2019)

The performance of Nuclear Deterrence (ND) systems could be improved by adopting advanced commercial CMOS technologies. However, the radiation hardness of these ND systems must be assured. This project quantified dose rate upset thresholds, allowing us to evaluate whether advanced commercial technologies can be used in rad hard applications. This project also evaluated the susceptibility of advanced commercial technologies to neutron displacement damage and single event effects, and developed hardness assurance methods. As a result of this work, Sandia is now collaborating more closely with DoD agencies and their contractors to understand and improve the radiation hardness of advanced commercial technologies. Sandia Capabilities (SPHINX, lon Beam Lab, FPGA test capabilities) were developed and are being utilized by other programs. Staff were trained to do radiation survivability testing and developed proposals that were funded. Internal and external collaborations and partnerships were developed, including with Georgia Tech. This project received the Best Paper award at the 2019 Hardened Electronics And Radiation Technology (HEART) Conference.

36 MATERIALS SCIENCE↗

Hardware Evaluation Analytical Modeling and Node Simulation: Benefits of Tighter GPU Integration

In this report, we examine several emerging technologies of interest to the Department of Energy and its computational centers. These include: 1) quantifying the benefit of tighter CPU-GPU integration, 2) quantifying the appropriate CPU core:GPU ratio, 3) quantifying the penalty for CPU-GPU disaggregation, 4) quantifying the benefits of tighter GPU-GPU integration, 5) quantifying the benefits of unified memory, and 6) quantifying the benefits of tighter FPGA-GPU integration.

97 MATHEMATICS AND COMPUTING↗

Autonomous System Subversion Tactics: Prototypes and Recommended Countermeasures

One of the fielding requirements for Advanced and Small Modular Reactors (AR/SMR) is the ability to support remote and autonomous operations. Autonomous Control Systems (ACS) are found on platforms such as Autonomous Space Vehicles, Cruise Missiles, and advanced driver-assistance systems. Each of these ACS implementations depends upon a set of decision support subsystems responsible for supporting Autonomous Mission Managers (names vary based upon field and author preferences). These Autonomous Mission Managers receive inputs from system sensors (e.g., LIDAR collection from an automobile travelling down a street; transients from a nuclear reactor), and perform a set of classifications (e.g., Red Traffic Light; Small Pedestrian at 10m; Load Rejection; Single Coolant Pump Trip), and then use these classifications in combination with recommendation algorithms to achieve platform goals (e.g., Stop the Vehicle at the Traffic Light, Avoid the Small Pedestrian; Trip the Reactor to prevent a Safety Event). The design, implementation, and fielding of an ACS capability will alter the cyber-attack surface such that existing risk management plans will need to be updated to include how to protect and defend against data-science and decision-support-system attack classes. These attack classes would include protection of the design and training environments where algorithm selection and testing and training data would be obvious attack vectors. These attack classes would also require an informed set of detection and response procedures to identify anomalous behaviors and document best practices for anomaly assessment and vulnerability mitigation and remediation. Last year we published a Cyber Threat Assessment Methodology for Autonomous and Remote Operations for AR/SMRs along with a companion publication on Cyber Attack and Defense Use Cases. The focus of the methodology was on describing and enumerating ACS processes, components, and functions such that security engineers could: evaluate subversion options against the target; identify threat actor attributes and capabilities derived from each subversion option; and identify security controls and response countermeasures. The Use Cases document offered detailed methodology examples including an assessment of a Military Base SMR, an Autonomous System Decision Loop, and implementation of AR/SMR Machine Learning algorithms. Our proposal at the end of last year was to focus on implementation of subversion prototypes related to the last Use Case area: AR/SMR Machine Learning (ML) Algorithms. We included six attack scenarios in our Use Cases paper: a Poisoning Attack against ML functions implemented using an FPGA; a Trojaning Attack against ML classifiers exploiting the excitability of Nuclear Engineers; a Backdooring Attack against ML Training environments to ensure persistence of an attack vector; a False Positive Evasion Attack against multi-factor Access Control Systems using clever inputs; an Inference Attack against ML models by an Insider with access to the Operational environment; and an Adversarial Reprogramming Attack against a Material Access Control Video Surveillance System. At the beginning of this year these six attack scenarios were provided to our research teams at Georgia Tech and Idaho State University and each team successfully implemented a subversion attack against a ML implementation to include transient misclassifications. While this is a notable outcome from this type of research, this paper offers the reader insight into not only how to structure and execute these types of attacks, but into the thought process behind how the researcher investigated the problem space, performed initial algorithm implementation, and the trial-and-error behind arriving at the successful subversion prototypes. We include in this paper a set of associated Scenarios on how these subversion prototypes could be implemented and an initial set of guidance for AR/SMR architects, Nuclear Regulators, and Cyber Defenders to implement awareness and defense capabilities into their current operational portfolios.

42 ENGINEERING↗

SAMPA Based Streaming Readout Data Acquisition Prototype

We have assembled a small-scale streaming data acquisition system based on the SAMPA front-end ASIC. The 32-channel SAMPA chip was designed for the high-luminosity upgrade of the ALICE Time Projection Chamber (TPC) detector at the CERN Large Hadron Collider. The goals of the prototype system are to determine if the SAMPA chip is appropriate for use in detector systems at Jefferson Lab, and to gain experience with the hardware and software required to deploy streaming data acquisition systems in nuclear physics experiments. The 800 channel system is composed of components used in the ALICE TPC data acquisition upgrade. Five front-end cards (FEC) support five SAMPA chips each. SAMPA data streams on an FEC are concentrated into two high-speed (4.48 Gb/s) serial data streams by a pair Gigabit Transceiver ASICs (GBTx). These ten streams (44.8 Gb/s) are transmitted from the FECs over fibers to a PCIe based readout unit. The FPGA engine on the readout unit compresses data for transmission to a server via 100 Gb ethernet. Components on the FECs are radiation tolerant. High data rates can be handled. The system is by design scalable and thus provides a functional prototype for high-rate streaming readout at Jefferson Lab and the future Electron Ion Collider. We have made fundamental measurements (noise, linearity, time resolution) on the SAMPA ASIC. We have also coupled the readout system to a small Gas Electron Multiplier (GEM) detector and have studied its response to cosmic rays. A beam test of the system is planned.

ABBOTT, David↗

Evaluation of a streaming readout solution for Jefferson Lab experiments

Jefferson Lab (JLab) operates the CEBAF accelerator that provides a high energy (up to 12 GeV) and high current (up to 150 µA) polarized electron beam for fixed target experiments. JLab's mission is to provide substantial progress in understanding the Quantum Chromo Dynamics (QCD), the current theory of the spectrum and the dynamics of hadronic matter. Given the broad scientific program a general-purpose detector, CLAS12, has been designed and constructed. Such a detector requires a sophisticated trigger and current experiments use an on-line FPGA-based system that relies upon custom firmware and electronics both of which are difficult reconfigure from one experiment to the next. To overcome these challenges transitioning to a streaming readout has been proposed since it would allow a more flexible, easier to debug, software trigger to be developed. To facilitate this JLab is gaining experience with streaming readout systems and is actively working to design and test a streaming data acquisition architecture. Significant work has already been done to make existing front-end electronics compatible with operation in streaming mode. Software-wise, much work remains to be done but an existing framework, TriDAS, which was developed for underwater neutrino telescopes can, in principle, be used with the existing JLab hardware. A test stand is already in place in the INDRA DAQ development lab at JLab. This paper will present the development of this TriDAS based test system and it?s operation in-beam using parts of the CLAS12 detector to evaluate streaming readout for a large general purpose detector.

Battaglieri, Marco↗

CHG0 to HERO An Update to the Fermilab Booster DCCT

The Booster complex at Fermi National Accelerator Laboratory uses a DC Current Transformer (DCCT) in conjunction with analog circuitry to measure intensity of the circulating beam during the acceleration cycle. This measurement is affectionately known as Charge Zero (CHG0). This platform has been updated to a Bergoz New Parametric Current Transformer (NPCT) and FPGA Data Acquisition System that digitally normalizes beam current to provide a High-quality E12 Read Out (HERO) for the PIP-II era.

72 PHYSICS OF ELEMENTARY PARTICLES AND FIELDS↗

Low Energy LArTPC Signal Detection Using Anomaly Detection

Extracting low-energy signals from LArTPC detectors is useful, for example, for detecting supernova events or calibrating the energy scale with argon-39. However, it is difficult to efficiently extract the signals because of noise. We propose using a 1DCNN to select wire traces that have a signal. This efficiently suppresses the background while still being efficient for the signal. This is then followed by a 1D autoencoder to denoise the wire traces. At that point the signal waveform can be cleanly extracted. In order to make this processing efficient, we implement the two networks on an FPGA. In particular we use hls4ml to produce HLS from the Keras models for both the 1DCNN and the autoencoder. We deploy them on an AMD/Xilinx Alveo U55C using the Vitis software platform.

72 PHYSICS OF ELEMENTARY PARTICLES AND FIELDS↗

Improving Signal-to-Noise Ratio (SNR) for Readout Signals Using Adaptive Filters on Reconfigurable Controls Hardware

This study investigates the optimization of Signal-to-Noise Ratio (SNR) in superconducting quantum computing readout signals through adaptive filtering. Quantum computing technology has the potential to revolutionize various fields by delivering exponential speedup in solving certain computational problems. However, the technology's practical implementation is hindered by the difficulty of extracting clean, reliable signals during the readout phase, with various sources of noise presenting a significant barrier to clean signals. This noise, often present in readout profiles due to imperfect isolation, degrades the system's overall SNR, thus impeding the ability to extract the quantum state accurately. The research leverages the power of adaptive filtering to improve the SNR of quantum computing readout signals. Specifically, an adaptive filter is implemented in a PYNQ overlay on an FPGA, and eventually will be connected to a quantum computing system. The system models the n oise with a Least Mean Squares (LMS) adaptive filter, and then subtracts the estimated noise from the received signal to improve the SNR. A Direct Memory Access (DMA) channel is used to handle the signal processing, delivering efficient, high-speed data transfer between the PYNQ system and the hardware. The study explores the benefits of this adaptive filtering technique, potentially providing a significant contribution to practical and fast quantum computing.

72 PHYSICS OF ELEMENTARY PARTICLES AND FIELDS↗

Flattening the Field during Injection in the Fermilab Booster using Dipole Corrector Magnets

The FNAL Booster is a fast cycling 15 Hz resonant circuit synchrotron accelerating proton beam from 400 MeV to 8 GeV. The linac pulse injected into the Booster is ˜32 usec long and fills the ring by multi-turn charge-exchange injection. As part of the PIP-II project, the Booster injection energy and repetition rate will be increased to 800 MeV and 20 Hz respectively. Due to much reduced average current in the new superconducting PIP-II linac, the injection time will increase to 550us. A shorter machine cycle coupled to a longer injection time make flattening the injection porch B-field during injection important requirement for successful PIP-II operation. We aim to achieve: (1) flattening of the net bending during injection using dipole correctors, and (2) using a new system based on an Altera FPGA board, reduction of the cycle-to-cycle bending field variation caused by current jitter in the Gradient Magnet Power Supply (GMPS). While the flat injection scheme is essential to future PIP-II operations, it should also noticeably improve efficiency for present HEP operations.

43 PARTICLE ACCELERATORS↗

GQuEST Control System Resolution

This is presentation display of the software theory research I have done this summer in the pursuit of constructing the most optimal FPGA for the GQuEST apparatus.

Nguyễn, David↗

Integration Development and Testing of Rear Transition Monitor for Beam Current Monitoring System

Addressing baseline effects in accelerator environments is crucial for accurate data acquisition and analysis, since baseline effects can obscure signal clarity and impact the reliability of beam current monitoring systems. There are many potential contributors to baseline noise, such as variations in beam dynamics, electromagnetic interference from nearby equipment, or RF interference. Previous applications of noise reduction systems don t sufficiently filter sources of asynchronous noise, so a new algorithm was implemented. A simulation dataset was created to replicate beam conditions and a Red Pitaya FPGA was used to collect data through the streaming application. A Python script was developed to implement noise reduction algorithms and efforts were made to integrate real-time data streaming with the Redis platform and Acnet Front End infrastructure.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗

HLS4ML Integration with QICK

The QICK (Quantum Instrumentation Control Kit) integration aims to enhance the readout of superconducting qubits by leveraging machine learning (ML) techniques. These techniques offer high accuracy, increased speed, and better state preservation for qubit readouts. The integration process employs neural network algorithms to optimize system performance and achieve high accuracy rates. The QICK board uses an FPGA, allowing for efficient real-time processing and high-performance execution of machine learning algorithms.

Ali, Mohamud↗

Characterization of throughput on the AXI DMA bus for burst data transfer over Ethernet

cThe Xilinx AXI Direct Memory Access (AXI DMA) module is an efficient solution for medium-speed data transfer in Xilinx SoC FPGAs, supporting data rates greater than 1000 Gbps even in very suboptimal operating modes. It facilitates direct transfer of AXI stream data into processor memory without constant software intervention, which reduces overhead and ensures consistent data logging. By utilizing the FPGA's available memory, large circular buffers (1-5 GiB) are used to buffer data and accommodate network limitations, enabling high-rate data bursts. In this study, we measured the performance of AXI DMA under conditions simulating its lowest practical data transfer speeds. The Arbitrary Length Data Sender was used to transmit AXI stream packets at 32-bit width and 100 MHz frequency, a narrow width and slow speed. Results show that the AXI DMA can transfer up to 3192.76 Mbps with large packet sizes but experiences reduced performance for smaller packets, as low as 2.6 Mbps for 4-byte packets. For Ethernet-limited applications, packet sizes between 8,000 and 16,000 bytes provided optimal transfer speeds of 874 to 1600 Mbps. These findings suggest that the AXI DMA is not the limiting factor in systems where packet sizes exceed 8,000 bytes.

43 PARTICLE ACCELERATORS↗

Reinforcement Learning for In-Spill Optimization of the Mu2e Resonant Extraction: Compensating Non-Stationarity

We present design considerations and challenges for the fast machine learning component of a third-order resonant beam extraction regulation system being commissioned to deliver steady beam rates to the mu2e experiment at Fermilab. Dedicated quadrupoles drive the tune toward the 29/3 resonance each spill, extracting beam at kV multiwire septa. The overall Spill Regulation System consists of (1) a “slow” process using ~100-spill averages to adjust the base quad ramp infrequently, (2) a feedforward harmonic content compensator, and (3) the “fast” ML agent reacting during each ongoing spill with on-the-fly additive corrections to the sum of (1) and (2). We have demonstrated improved beam-rate steadying for a fast ML agent compared to a PID controller using a quasi-physical spill simulation, and demonstrated distillation of that simulation into a predictive surrogate model. Current work includes a data-and-training pipeline to generate data-aware surrogates with real-world dynamics, even as the dynamics shift unpredictably. The surrogates are to act as RL environments against which to train our fast ML control agents before deploying them on FPGA in the live system. Further current efforts focus on modeling and controlling beam loss around the storage ring, understanding additional available hardware inputs to the model, and the interplay of these with beam-steadying performance.

72 PHYSICS OF ELEMENTARY PARTICLES AND FIELDS↗

LEED: A Lightwave Energy-Efficient Datacenter

The Lightwave Energy-Efficient Datacenter (LEED) program is a disruptive “green-field” approach that provides a quantum leap in the energy efficiency of datacenters. LEED’s fundamental value proposition is that a novel and re-architected optical network—RotorNet— can deliver “more bandwidth per buck” as well as unique system-level attributes that significantly improve overall datacenter energy efficiency and performance. LEED has developed three system-level testbeds. The first testbed uses calibrated hardware and software power measurements to determine server energy efficiency as a function of network bandwidth and workload. These measurements have shown that increasing network communications bandwidth dramatically increases server energy efficiency providing a realistic path to the overall ENLITENED program goal of doubling the number of transactions per joule. The second testbed demonstrates key hardware: a prototype low-loss, high-port count optical “selector switch”. This switch was fabricated, racked, and tested. Measured switch characteristics include loss, bandwidth, crosstalk, switch time, system-level switch time (including the transceivers), and bit error rate. The third testbed demonstrates a fully working and manufactured pinwheel design which dramatically lowers the cost of design, while delivering high switch radix and low reconfiguration times. The LEED project has tied these three novel photonic switch prototypes together with production servers and software through the development of a novel FPGA-based NIC platform called Corundum. Corundum ensures that the packet-switched protocols supported by commodity operating systems and devices can interface with the Rotor switch design. The LEED group has used this combined hardware and software prototype to characterize applications running at a commercially relevant scale. The project has used a combination of enhanced optical modulation amplitude (OMA) modulators, broadband multiplexers and demultiplexers, avalanche photodiodes, and a novel burst-mode receivers to enable the insertion of LEED-developed optical switches without the need for expensive optical amplification. Our modeling has shown that measured LEED-developed device characteristics can achieve link characteristics of 2 pJ/bit including both transceivers and the Rotor switch. In summary, the LEED program has demonstrated a credible and practical path, through novel hardware and software, to realize the program objectives of ENLITENED. The net result will ensure that the United States maintains its strength in the crucial sector of Information Technology, which is vital to both our economic security and our national security.

32 ENERGY CONSERVATION, CONSUMPTION, AND UTILIZATI↗

Machine Learning for Real-time Fusion Plasma Behavior Prediction and Manipulation (Final Report)

The goal of this project is to implement real-time analysis of 2D Beam Emission Spectroscopy (BES) data to predict and control transient and high-bandwidth events at DIII-D. In essence, we wish to bring high-bandwidth fluctuation diagnostics into the realm of real-time measurements and control. The BES ML models will necessarily be deep neural networks (DNN) with a “data flow” architecture for compatibility with high-throughput, low-latency evaluation on a field-programmable gate array (FPGA) or other emerging processor technologies. The real-time output will be fed to the plasma control system (PCS) for real-time control tasks, specifically for ELM control and avoidance and for QH-mode access and sustainment. We anticipate that the real-time analysis of fluctuation diagnostics will create new enabling technologies to predict and control transient events such as confinement mode transitions, edge-localized modes, Alfven eigenmode events, and disruptions. The proposed research is aligned with ITER research needs and DIII-D programmatic goals. For instance, the prediction and avoidance of ELM events is critical for ITER machine safety. Also, H-mode access with RMP ELM suppression in ITER is an active research area due to high separatrix density, narrow SOL width, and elevated LH transition power threshold.

70 PLASMA PHYSICS AND FUSION TECHNOLOGY↗