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At least 613 records · Page 34

Parametric analysis of RF communications and tracking systems for manned space stations

System performance, system interface compatibility, and system management and operations are analyzed for external and internal communications provided by the modular space station. Mathematical models are utilized to evaluate performances of the various communication links between the MSS and the tracking and data relay satellites, the shuttle, and the ground stations. Communication control design requirements are determined from overall MSS control design and checkout requirements are developed in a related systems study. Parallel design efforts consider equipment configurations for the external communication assembly baseband and the internal communication assembly to accommodate signal transfer and control. The recommended baseline design considers also interfaces between equipment groups and the critical functional and signal characteristics of these interfaces. The data processing assembly has direct communication circuits to the external communication assembly and the control interface is provided via a digital data bus and a remote acquisition and control unit.

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Digital varying-frequency generator

Generator employs up/down counters, digital-to-analog converters, and integrator to determine frequency and time duration of output. Circuit can be used where varying signal must be controlled accurately over long period of time.

Allen, M. J.↗

Radar image processing module development program, phase 3

The feasibility of using charge coupled devices in an IPM for processing synthetic aperture radar signals onboard the NASA Convair 990 (CV990) aircraft was demonstrated. Radar data onboard the aircraft was recorded and processed using a CCD sampler and digital tape recorder. A description of equipment and testing was provided. The derivation of the digital presum filter was documented. Photographs of the sampler/tape recorder, real time display and circuit boards in the IPM were also included.

Source record↗

Commutated automatic gain control system

A commutated automatic gain control system (AGC) was designed and constructed for the prototype Loran C receiver. The AGC is designed to improve the signal-to-signal ratio of the received Loran signals. The AGC design does not require any analog to digital conversion and it utilizes commonly available components. The AGC consists of: (1) a circuit which samples the peak of the envelope of the Loran signal to obtain an AGC voltage for each of three Loran stations, (2) a dc gain circuit to control the overall gain of the AGC system, and (3) an AGC amplification of the input RF signal. The performance of the AGC system was observed in bench and flight tests; it has improved the overall accuracy of the receiver. Improvements in the accuracy of the time difference calculations to within approx. + or - 1.5 microseconds of the observed time differnces for a given position are reported.

Yost, S. R.↗

Robot Gripper With Signal Processing

Single-chip computer and sensor-circuit chips preprocess sensor data. Self-contained circuitry combines sensor signals for serial digital transmission. Gripping surfaces crossed with grooves for grasping differently shaped objects. Gripper cavities house sensors and preprocessing circuitry. Sensors and preprocessing circuitry in robot gripper reduce amount of data being transmitted between robot controller and gripper. Placement in gripper reduces signal delays and vulnerability to electromagnetic interference.

Killion, Richard R.↗

Transport of cosmic ray nuclei in various materials

Cosmic-ray heavy ions have become a concern in space radiation effects analyses. Heavy ions rapidly deposit energy and create dense ionization trails as they traverse materials. Collection of the free charge disrupts the operation of microelectronic circuits. This effect, called the single-event upset, can cause a loss of digital data. Passage of high linear energy transfer particles through the eyes has been observed by Apollo astronauts. These heavy ions have great radiobiological effectiveness and are the primary risk factor for leukemia induction on a manned Mars mission. Models of the transport of heavy cosmic-ray nuclei through materials depend heavily on our understanding of the cosmic-ray environment, nuclear spallation cross sections, and computer transport codes. Our group has initiated and pursued the development of a full capability for modeling these transport processes. A recent review of this ongoing effort is presented in Ref. 5. In this paper, we discuss transport methods and present new results comparing the attenuation of cosmic rays in various materials.

NASA Discipline Radiation Health↗

Economical Implementation of a Filter Engine in an FPGA

A logic design has been conceived for a field-programmable gate array (FPGA) that would implement a complex system of multiple digital state-space filters. The main innovative aspect of this design lies in providing for reuse of parts of the FPGA hardware to perform different parts of the filter computations at different times, in such a manner as to enable the timely performance of all required computations in the face of limitations on available FPGA hardware resources. The implementation of the digital state-space filter involves matrix vector multiplications, which, in the absence of the present innovation, would ordinarily necessitate some multiplexing of vector elements and/or routing of data flows along multiple paths. The design concept calls for implementing vector registers as shift registers to simplify operand access to multipliers and accumulators, obviating both multiplexing and routing of data along multiple paths. Each vector register would be reused for different parts of a calculation. Outputs would always be drawn from the same register, and inputs would always be loaded into the same register. A simple state machine would control each filter. The output of a given filter would be passed to the next filter, accompanied by a "valid" signal, which would start the state machine of the next filter. Multiple filter modules would share a multiplication/accumulation arithmetic unit. The filter computations would be timed by use of a clock having a frequency high enough, relative to the input and output data rate, to provide enough cycles for matrix and vector arithmetic operations. This design concept could prove beneficial in numerous applications in which digital filters are used and/or vectors are multiplied by coefficient matrices. Examples of such applications include general signal processing, filtering of signals in control systems, processing of geophysical measurements, and medical imaging. For these and other applications, it could be advantageous to combine compact FPGA digital filter implementations with other application-specific logic implementations on single integrated-circuit chips. An FPGA could readily be tailored to implement a variety of filters because the filter coefficients would be loaded into memory at startup.

Kowalski, James E.↗

High-Performance Satellite/Terrestrial-Network Gateway

A gateway has been developed to enable digital communication between (1) the high-rate receiving equipment at NASA's White Sands complex and (2) a standard terrestrial digital communication network at data rates up to 622 Mb/s. The design of this gateway can also be adapted for use in commercial Earth/satellite and digital communication networks, and in terrestrial digital communication networks that include wireless subnetworks. Gateway as used here signifies an electronic circuit that serves as an interface between two electronic communication networks so that a computer (or other terminal) on one network can communicate with a terminal on the other network. The connection between this gateway and the high-rate receiving equipment is made via a synchronous serial data interface at the emitter-coupled-logic (ECL) level. The connection between this gateway and a standard asynchronous transfer mode (ATM) terrestrial communication network is made via a standard user network interface with a synchronous optical network (SONET) connector. The gateway contains circuitry that performs the conversion between the ECL and SONET interfaces. The data rate of the SONET interface can be either 155.52 or 622.08 Mb/s. The gateway derives its clock signal from a satellite modem in the high-rate receiving equipment and, hence, is agile in the sense that it adapts to the data rate of the serial interface.

Beering, David R.↗

A Low SWaP-C prototype Ka-band Frequency Synthesizer for Atomic Clocks

We present a low size, weight, power and cost (SWaP-C) prototype circuit of a Ka-band frequency synthesizer. It takes advantage of a phase-locked loop single integrated circuit (IC) and harmonic generation with high speed CMOS gates. We use a direct digital synthesizer (DDS) IC to tune the final output with microHertz resolution. An ultra-low-power micro controller that could serve as the clock controller is used to control the PLL and the DDS. All components are commercial off the shelf (COTS) with acceptable industrial support. The total power consumption is about 1.6 Watt with -45 dBm useful output at 40.507347996 GHz. The short-term instability introduced by the prototype is 7.3E-14 at 1s. The prototyped subsystem uses COTS demonstration boards for the sake of agile prototyping. There is still significant margin for improvement of the size and weight.

Tjoelker, Robert L.↗

A high accuracy all-angle gyroscope readout using quantized flux

Means are described to use SQUID magnetometer flux counting and the London moment of a spherical superconducting gyroscope to read out the gyroscope spin axis direction to an accuracy of at least 23 bits per quadrant. The system is discussed in analogy to optical fringe counting as applied to distance measurement. Several methods of applying both analog and digital SQUID magnetometers to the readout problem are given, as well as limitations on each. Described are two methods of increasing the flux available for measurement: magnetizing the gyroscope with a trapped field, and optimizing readout circuit inductances. Finally, the same principle on which the gyroscope readout is based is applied to a description of a high accuracy, flux counting, digital angle encoder.

Anderson, J. T.↗

The use of statistical characteristics of reducer vibrations as diagnostic symptoms

The results of a statistical analysis of the vibrations of the experimental RS-1 reducer stand, with a spiral-gear transmission, operating on a closed circuit, are presented. The analysis was carried out on the Minsk-2 and Minsk-32 digital computers, with two-channel analog-digital converter, built in the Institute of the Science of Mechanics. Two-dimensional distribution patterns, conditional dispersions and dispersion ratios were calculated. The octave-band-filtered first harmonics of the tooth frequency f sub z of the vibrations at two different measurement points were considered as the components of the vibration process to be analyzed. The regression lines, corresponding to different values of the loading torque, are presented. Since it was not the gear drive parameters which were determined by diagnostic methods, but the characteristics most sensitive to change in state of the object of the investigation, the loading torque, which is the simplest and most accessible for measurement, was chosen as the condition parameter.

Balitskiy, F. Y.↗

Merging Digital Data With A Video Signal

Data displayed on television image of experiment. Video images of experiment sent with digital data on experiment to remote station. Digital data raw and unformatted or in form of characters. For minimal power consumption, interface circuit built of CMOS and HMOS integrated-circuit chips. Buffer/decoder circuit enables experiment computer to communicate with board without excessive loading of computer bus by board. Memory multiplexer/memory array implements buffer-swapping scheme as one buffer is read, other filled with new data.

Collins, Thomas J., III↗

Correction And Use Of Jitter In Television Images

Proposed system stabilizes jittering television image and/or measures jitter to extract information on motions of objects in image. Alternative version, system controls lateral motion on camera to generate stereoscopic views to measure distances to objects. In another version, motion of camera controlled to keep object in view. Heart of system is digital image-data processor called "jitter-miser", which includes frame buffer and logic circuits to correct for jitter in image. Signals from motion sensors on camera sent to logic circuits and processed into corrections for motion along and across line of sight.

Diner, Daniel B.↗

A digital beacon receiver

A digital satellite beacon receiver is described which provides measurement information down to a carrier/noise density ratio approximately 15 dB below that required by a conventional (phase locked loop) design. When the beacon signal fades, accuracy degrades gracefully, and is restored immediately (without hysteresis) on signal recovery, even if the signal has faded into the noise. Benefits of the digital processing approach used include the minimization of operator adjustments, stability of the phase measuring circuits with time, repeatability between units, and compatibility with equipment not specifically designed for propagation measuring. The receiver has been developed for the European Olympus satellite which has continuous wave (CW) beacons at 12.5 and 29.7 GHz, and a switched polarization beacon at 19.8 GHz approximately, but the system can be reconfigured for CW and polarization-switched beacons at other frequencies.

Ransome, Peter D.↗

Automated rejection of parasitic frequency sidebands in heterodyne-detection LIDAR applications

A technique is described for the detection of the sporadic onset of multiaxial mode behavior of a normally single-mode TEA CO2 laser. The technique is implemented using primarily commercial circuit modules; it incorporates a peak detector that displays the RF detector output on a digital voltmeter, and a LED bar graph. The technique was successfully demonstrated with an existing coherent atmospheric LIDAR facility utilizing an injection-seeded single-mode TEA CO2 laser. The block schematic diagram is included.

Esproles, Carlos↗

A 1 GHz sample rate, 256-channel, 1-bit quantization, CMOS, digital correlator chip

This paper describes the development of a digital correlator chip with the following features: 1 Giga-sample/second; 256 channels; 1-bit quantization; 32-bit counters providing up to 4 seconds integration time at 1 GHz; and very low power dissipation per channel. The improvements in the performance-to-cost ratio of the digital correlator chip are achieved with a combination of systolic architecture, novel pipelined differential logic circuits, and standard 1.0 micron CMOS process.

Timoc, C.↗

Improved Speed Control System for the 87,000 HP Wind Tunnel Drive

This paper describes the design, installation, and integrated systems tests for a new drive motor speed control system which was part of a recent rehab project for the NASA Lewis 8x6 Supersonic Wind Tunnel. The tunnel drive consists of three mechanically-coupled 29,000 HP wound rotor induction motors driving an axial flow compressor. Liquid rheostats are used to vary the impedance of the rotor circuits, thus varying the speed of the drive system. The new design utilizes a distributed digital control system with a dual touch screen CRT operator console to provide alarm monitoring, logging, and trending. The liquid rheostats are driven by brushtype servomotor systems with magnetostrictive linear displacement transducers used for position feedback. The new system achieved all goals for speed variations with load, motor load balance, and control of total power.

Becks, Edward A.↗