Engineering Papers⌕ Search

SEARCH · Engineering Papers

Results for “voltage and current controllers”

Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

Quote a phrase for an exact phrase match. Source license links do not imply unrestricted reuse.

At least 595 records · Page 33
All sourcesNASA NTRSDOE OSTI
NASA NTRS1995

Forback DC-to-DC converter

A pulse-width modulated DC-to-DC power converter including a first inductor, i.e. a transformer or an equivalent fixed inductor equal to the inductance of the secondary winding of the transformer, coupled across a source of DC input voltage via a transistor switch which is rendered alternately conductive (ON) and nonconductive (OFF) in accordance with a signal from a feedback control circuit is described. A first capacitor capacitively couples one side of the first inductor to a second inductor which is connected to a second capacitor which is coupled to the other side of the first inductor. A circuit load shunts the second capacitor. A semiconductor diode is additionally coupled from a common circuit connection between the first capacitor and the second inductor to the other side of the first inductor. A current sense transformer generating a current feedback signal for the switch control circuit is directly coupled in series with the other side of the first inductor so that the first capacitor, the second inductor and the current sense transformer are connected in series through the first inductor. The inductance values of the first and second inductors, moreover, are made identical. Such a converter topology results in a simultaneous voltsecond balance in the first inductance and ampere-second balance in the current sense transformer.

Lukemire, Alan T.↗
NASA NTRS1995

Preliminary chaotic model of snapover on high voltage solar cells

High voltage power systems in space will interact with the space plasma in a variety of ways. One of these, snapover, is characterized by sudden enlargement of the current collection area across normally insulating surfaces generating enhanced electron current collection. Power drain on solar array power systems results from this enhanced current collection. Optical observations of the snapover phenomena in the laboratory indicates a functional relation between glow area and bia potential as a consequence of the fold/cusp bifurcation in chaos theory. Successful characterizations of snapover as a chaotic phenomena may provide a means of snapover prevention and control through chaotic synchronization.

Mackey, Willie R.↗
NASA NTRS1981

Advanced space propulsion thruster research

Experiments showed that stray magnetic fields can adversely affect the capacity of a hollow cathode neutralizer to couple to an ion beam. Magnetic field strength at the neutralizer cathode orifice is a crucial factor influencing the coupling voltage. The effects of electrostatic accelerator grid aperture diameters on the ion current extraction capabilities were examined experimentally to describe the divergence, deflection, and current extraction capabilities of grids with the screen and accelerator apertures displaced relative to one another. Experiments performed in orificed, mercury hollow cathodes support the model of field enhanced thermionic electron mission from cathode inserts. Tests supported the validity of a thermal model of the cathode insert. A theoretical justification of a Saha equation model relating cathode plasma properties is presented. Experiments suggest that ion loss rates to discharge chamber walls can be controlled. A series of new discharge chamber magnetic field configurations were generated in the flexible magnetic field thruster and their effect on performance was examined. A technique used in the thruster to measure ion currents to discharge chamber walls is described. Using these ion currents the fraction of ions produced that are extracted from the discharge chamber and the energy cost of plasma ions are computed.

Wilbur, P. J.↗
NASA NTRS2016

Propellantless Attitude Control of Solar Sail Technology Utilizing Reflective Control Devices

Solar sails offer an opportunity for a CubeSatscale, propellant-free spacecraft technology that enables long-term and long-distance missions not possible with traditional methods. Solar sails operate using the transfer of linear momentum from photons of sunlight reflected from the surface of the sail. To propel the spacecraft, no mechanically moving parts, thrusters, or propellant are needed. However, attitude control, or orientation, is still performed using traditional methods involving reaction wheels and propellant ejection, which severely limit mission lifetime. For example, the current state of the art solutions employed by upcoming missions couple solar sails with a state of the art propellant ejection gas system. Here, the use of the gas thruster has limited the lifetime of the mission. To solve the limited mission lifetime problem, the Propellantless Attitude Control of Solar Sail Technology Utilizing Reflective Control Devices project team is working on propellantless attitude control using thin layers of material, an optical film, electrically switchable from transparent to reflective. The technology is based on a polymer-dispersed liquid crystal (PDLC), which allows this switch upon application of a voltage. This technology removes the need for propellant, which reduces weight and cost while improving performance and lifetime.

Solar sail technology↗
NASA NTRS1972

Design, processing, and testing of lsi arrays for space station

The design of a MOS 256-bit Random Access Memory (RAM) is discussed. Technological achievements comprise computer simulations that accurately predict performance; aluminum-gate COS/MOS devices including a 256-bit RAM with current sensing; and a silicon-gate process that is being used in the construction of a 256-bit RAM with voltage sensing. The Si-gate process increases speed by reducing the overlap capacitance between gate and source-drain, thus reducing the crossover capacitance and allowing shorter interconnections. The design of a Si-gate RAM, which is pin-for-pin compatible with an RCA bulk silicon COS/MOS memory (type TA 5974), is discussed in full. The Integrated Circuit Tester (ICT) is limited to dc evaluation, but the diagnostics and data collecting are under computer control. The Silicon-on-Sapphire Memory Evaluator (SOS-ME, previously called SOS Memory Exerciser) measures power supply drain and performs a minimum number of tests to establish operation of the memory devices. The Macrodata MD-100 is a microprogrammable tester which has capabilities of extensive testing at speeds up to 5 MHz. Beam-lead technology was successfully integrated with SOS technology to make a simple device with beam leads. This device and the scribing are discussed.

Lile, W. R.↗
NASA NTRS1990

Measurement realities of current collection in dynamic space plasma environments

Theories which describe currents collected by conducting and non-conducting bodies immersed in plasmas have many of their concepts based upon the fundamentals of sheath-potential distributions and charged-particle behavior in superimposed electric and magnetic fields. Those current-collecting bodies (or electrodes) may be Langmuir probes, electric field detectors, aperture plates on ion mass spectrometers and retarding potential analyzers, or spacecraft and their rigid and tethered appendages. Often the models are incomplete in representing the conditions under which the current-voltage characteristics of the electrode and its system are to be measured. In such cases, the experimenter must carefully take into account magnetic field effects and particle anisotropies, perturbations caused by the current collection process itself and contamination on electrode surfaces, the complexities of non-Maxwellian plasma distributions, and the temporal variability of the local plasma density, temperature, composition and fields. This set of variables is by no means all-inclusive, but it represents a collection of circumstances guaranteed to accompany experiments involving energetic particle beams, plasma discharges, chemical releases, wave injection and various events of controlled and uncontrolled spacecraft charging. Here, an attempt is made to synopsize these diagnostic challenges and frame them within a perspective that focuses on the physics under investigation and the requirements on the parameters to be measured. Examples include laboratory and spaceborne applications, with specific interest in dynamic and unstable plasma environments.

Szuszczewicz, Edward P.↗
NASA NTRS2009

Efficient Ionization Investigation for Flow Control and Energy Extraction

Nonequilibrium ionization of air by nonthermal means is explored for hypersonic vehicle applications. The method selected for evaluation generates a weakly ionized plasma using pulsed nanosecond, high-voltage discharges sustained by a lower dc voltage. These discharges promise to provide a means of energizing and sustaining electrons in the air while maintaining a nearly constant ion/neutral molecule temperature. This paper explores the use of short approx.5 nsec, high-voltage approx.12 to 22 kV, repetitive (40 to 100 kHz) discharges in generating a weakly ionized gas sustained by a 1 kV dc voltage in dry air at pressures from 10 to 80 torr. Demonstrated lifetimes of the sustainer discharge current approx.10 to 25 msec are over three orders of magnitude longer than the 5 nsec pulse that generates the electrons. This life is adequate for many high speed flows, enabling the possibility of exploiting weakly ionized plasma phenomena in flow-fields such as those in hypersonic inlets, combustors, and nozzles. Results to date are obtained in a volume of plasma between electrodes in a bell jar. The buildup and decay of the visible emission from the pulser excited air is photographed on an ICCD camera with nanosecond resolution and the time constants for visible emission decay are observed to be between 10 to 15 nsec decreasing as pressure increases. The application of the sustainer voltage does not change the visible emission decay time constant. Energy consumption as indicated by power output from the power supplies is 194 to 669 W depending on pulse repetition rate.

Schneider, Steven J.↗
NASA NTRS2016

Micrometeorite Impact Test of Flex Solar Array Coupon

Spacecraft with solar arrays operate throughout the near earth environment and are increasingly planned for outer planet missions. An often overlooked test condition for solar arrays that is applicable to these missions is micrometeorite impacts and possibly electrostatic discharge (ESD) events resulting from these impacts. The Marshall Space Flight Center (MSFC) is partnering with Space Systems/Loral, LLC (SSL) to examine the results of simulated micrometeorite impacts on the electrical performance of an advanced, lightweight flexible solar array design. The test is performed at NASA MSFC's Microlight Gas Gun Facility. The SSL-provided coupons consist of three strings, each string with two solar cells in series. Five impacts will be induced at various locations on a powered test coupon under different string voltage (0 volts - 150 volts) and string current (1.1 amperes - 1.65 amperes) conditions. The maximum specified test voltage and current represent margins of 1.5 times for both voltage and current. The test parameters are chosen to demonstrate new array design robustness to any ESD event caused by plasma plumes resulting from a simulated micrometeorite impact. A second unpowered coupon will undergo two impacts: one impact on the front side and one impact on the back side. Following the impact testing, the second coupon will be exposed to a thermal cycle test to determine possible damage propagation and further electrical degradation due to thermally-induced stress. The setup, checkout, and results from the impact testing are discussed. The challenges for impact testing include precise coupon alignment to control impact location; pressure management during the impact process; and measurement of the true transient electrical response during impact on the powered coupon. Results from pre- and post-test visual and electrical functional testing are also discussed.

Wright, K. H.↗
NASA NTRS2006

Extreme Temperature Electronics Using a Reconfigurable Analog Array

Temperature and radiation tolerant electronics, as well as long life survivability are key capabilities required for future NASA missions. Current approaches to electronics for extreme environments focus on component level robustness and hardening. Compensation techniques such as bias cancellation circuitry have also been employed. However, current technology can only ensure very limited lifetime in extreme environments. Previous work presented a novel approach, based on evolvable hardware technology, which allows adaptive in-situ circuit redesign/reconfiguration during operation in extreme environments. This technology would complement material/device advancements and increase the mission capability to survive harsh environments. This work describes a new reconfigurable analog chip developed by JPL and SPAWAR that is targeted for extreme temperature and evolutionary hardware experiments. Being based on Gm-C technology, this chip can have its functionality tuned and adapted to extreme temperatures through voltage bias adjustment. This tuning process will be controlled by Evolutionary Algorithms. This paper presents details of the reconfigurable analog chip as well as a system level overview. Some early experiments are also described.

evolvable hardware↗
NASA NTRS1981

Test progress on the electrostatic membrane reflector

NASA is currently developing a low mass antenna which derives its reflector surface quality from the application of electrostatic forces to form a thin membrane into the desired concave reflector surface. The shuttle-deployed antenna would have a diameter of 100 m and an RMS surface smoothness of 10 to 1 mm for operation at 1 to 10 GHz. Surface quality measurements have been made on a highly deformable elastic membrane, pressurized by electrostatic forces. Included are the effects of the perimeter boundary, splicing of the membrane, the long-scale smoothness of commercial membranes, and the spatial controllability of the membrane using voltage adjustments to alter the electrostatic forces. The electrostatic membrane was found to operate well in an open-loop sense, showing a high degree of position stability and negligible power consumption in dry air. Visco-electric creep was not evident, but the polymer membrane did expand and contract considerably due to its hygroscopic expansion coefficient. A residual roughness of about 0.75 mm existed with the polymer used in these tests; this error is attributed to seams and membrane anisotropy where the material is stiffer in one direction.

Goslee, J. W.↗
NASA NTRS1987

Resistive synaptic interconnects for electronic neural networks

The use of the alpha-Ge(1-x):Al(x) and alpha-Ge(1-x):Cu(x) alloys and Pt/Al2O3 cermet thin films as resistive interconnects for binary synaptic memory arrays is evaluated. The fabrication of the 10-20 microns long, 10 microns wide, and 0.1 micron thick interconnects from the alloys and cermet is described. The current-voltage and switching characteristics of the as-deposited films and the patterned test structure are studied. The resistivity, uniformity, stability, and compatibility of the interconnects are examined. It is observed that alpha-Ge(1-x):Cu(x) alloys have a wide resistivity range and low temperature coefficients of resistance; however, their long-term stability is limited due to their low crystallization temperature. It is detected that the alpha-Ge(1-x):Al(x) alloys have higher crystallization temperatures and their resistivity is not greatly affected by large changes in metal content. The Pt/Al2O3 samples display excellent stability, easy fabrication, and control of resistivity with metal content.

Lamb, J. L.↗
NASA NTRS1995

Parasitic current collection by PASP Plus solar arrays

Solar cells at potentials positive with respect to a surrounding plasma collect electrons. Current is collected by the exposed high voltage surfaces: the interconnects and the sides of the solar cells. This current is a drain on the array power that can be significant for high-power arrays. In addition, this current influences the current balance that determines the floating potential of the spacecraft. One of the objectives of the Air Force (PL/GPS) PASP Plus (Photovoltaic Array Space Power Plus Diagnostics) experiment is an improved understanding fo parasitic current collection. We have done computer modeling of parasitic current collection and have examined current collection flight data from the first year of operations. Prior to the flight we did computer modeling to improve our understanding of the physical processes that control parasitic current collection. At high potentials, the current rapidly rises due to a phenomenon called snapover. Under snapover conditions, the equilibrium potential distribution across the dielectric surface is such that part of the area is at potentials greater than the first crossover of the secondary yield curve. Therefore, each incident electron generates more than one secondary electron. The net effect is that the high potential area and the collecting area increase. We did two-dimensional calculations for the various geometries to be flown. The calculations span the space of anticipated plasma conditions, applied potential, and material parameters. We used the calculations and early flight data to develop an analytic formula for the dependence of the current on the primary problem variables. The analytic formula was incorporated into the EPSAT computer code. EPSAT allows us to easily extend the results to other conditions. PASP Plus is the principal experiment integrated onto the Advanced Photovoltaic and Electronics Experiments (APEX) satellite bus. The experiment is testing twelve different solar array designs. Parasitic current collection is being measured for eight of the designs under various operational and environment conditions. We examined the current collected as a function of the various parameters for the six non-concentrator designs. The results are similar to those obtained in previous experiments and predicted by the calculations. We are using the flight data to validate the analytic formula developed. The formula can be used to quantify the parasitic current collected. Anticipating the parasitic current value allows the spacecraft designer to include this interaction when developing the design.

Davis, Victoria Ann↗
NASA NTRS1995

Power control electronics for cryogenic instrumentation

In order to achieve a high-efficiency high-density cryogenic instrumentation system, the power processing electronics should be placed in the cold environment along with the sensors and signal-processing electronics. The typical instrumentation system requires low voltage dc usually obtained from processing line frequency ac power. Switch-mode power conversion topologies such as forward, flyback, push-pull, and half-bridge are used for high-efficiency power processing using pulse-width modulation (PWM) or resonant control. This paper presents several PWM and multiresonant power control circuits, implemented using commercially available CMOS and BiCMOS integrated circuits, and their performance at liquid-nitrogen temperature (77 K) as compared to their room temperature (300 K) performance. The operation of integrated circuits at cryogenic temperatures results in an improved performance in terms of increased speed, reduced latch-up susceptibility, reduced leakage current, and reduced thermal noise. However, the switching noise increased at 77 K compared to 300 K. The power control circuits tested in the laboratory did successfully restart at 77 K.

Ray, Biswajit↗
NASA NTRS1975

Development of a breadboard design of a high-performance, high-reliability switching regulator

A comparison of two potential conversion methods, the series inverter and the inductive energy transfer (IET) conversion technique, is presented. The investigations showed that a characteristic of the series inverter circuit (high equalizing current values in each half cycle) could not be accomplished with available components, and the investigations continued with the IET circuit only. An IET circuit system was built with the use of computer-aided design in a 2, 4, and 8 stage configuration, and these stages were staggered 180, 90, and 45 degrees, respectively. All stages were pulsewidth modulated to regulate over an input voltage range from 200 to 400 volts dc at a regulated output voltage of 56 volts. The output power capability was 100 to 500 watts for the 2 and 8 stage configuration and 50 to 250 watts for the 4 stage configuration. Equal control of up to eight 45 degree staggered stages was accomplished through the use of a digital-to-analog control circuit. Equal power sharing of all stages was achieved through a new technique using an inductively coupled balancing circuit. Conclusions are listed.

Lindena, S. J.↗
NASA NTRS1999

Quantum Computation by Optically Coupled Steady Atoms/Quantum-Dots Inside a Quantum Cavity

We present a model for quantum computation using $n$ steady 3-level atoms kept inside a quantum cavity, or using $n$ quantum-dots (QDs) kept inside a quantum cavity. In this model one external laser is pointed towards all the atoms/QDs, and $n$ pairs of electrodes are addressing the atoms/QDs, so that each atom is addressed by one pair. The energy levels of each atom/QD are controlled by an external Stark field given to the atom/QD by its external pair of electrodes. Transition between two energy levels of an individual atom/ QD are controlled by the voltage on its electrodes, and by the external laser. Interactions between two atoms/ QDs are performed with the additional help of the cavity mode (using on-resonance condition). Laser frequency, cavity frequency, and energy levels are far off-resonance most of the time, and they are brought to the resonance (using the Stark effect) only at the time of operations. Steps for a controlled-NOT gate between any two atoms/QDs have been described for this model. Our model demands some challenging technological efforts, such as manufacturing single-electron QDs inside a cavity. However, it promises big advantages over other existing models which are currently implemented, and might enable a much easier scale-up, to compute with many more qubits.

Pradhan, P.↗
NASA NTRS2008

High-Voltage, Asymmetric-Waveform Generator

The shapes of waveforms generated by commercially available analytical separation devices, such as some types of mass spectrometers and differential mobility spectrometers are, in general, inadequate and result in resolution degradation in output spectra. A waveform generator was designed that would be able to circumvent these shortcomings. It is capable of generating an asymmetric waveform, having a peak amplitude as large as 2 kV and frequency of several megahertz, which can be applied to a capacitive load. In the original intended application, the capacitive load would consist of the drift plates in a differential-mobility spectrometer. The main advantage to be gained by developing the proposed generator is that the shape of the waveform is made nearly optimum for various analytical devices requiring asymmetric-waveform such as differential-mobility spectrometers. In addition, this waveform generator could easily be adjusted to modify the waveform in accordance with changed operational requirements for differential-mobility spectrometers. The capacitive nature of the load is an important consideration in the design of the proposed waveform generator. For example, the design provision for shaping the output waveform is based partly on the principle that (1) the potential (V) on a capacitor is given by V=q/C, where C is the capacitance and q is the charge stored in the capacitor; and, hence (2) the rate of increase or decrease of the potential is similarly proportional to the charging or discharging current. The proposed waveform generator would comprise four functional blocks: a sine-wave generator, a buffer, a voltage shifter, and a high-voltage switch (see Figure 1). The sine-wave generator would include a pair of operational amplifiers in a feedback configuration, the parameters of which would be chosen to obtain a sinusoidal timing signal of the desired frequency. The buffer would introduce a slight delay (approximately equal to 20 ns) but would otherwise leave the fundamental timing signal unchanged. The buffered timing signal would be fed as input to the level shifter. The output of the level shifter would serve as a timing and control signal for the high-voltage switch, causing the switch to alternately be (1) opened, allowing the capacitive load to be charged from a high-voltage DC power supply; then (2) closed to discharge the capacitive load to ground. Hence, the output waveform would closely approximate a series of exponential charging and discharging curves (see Figure 2).

Beegle, Luther W.↗
NASA NTRS2014

Using a Commercial Ethernet PHY Device in a Radiation Environment

This work involved placing a commercial Ethernet PHY on its own power boundary, with limited current supply, and providing detection methods to determine when the device is not operating and when it needs either a reset or power-cycle. The device must be radiation-tested and free of destructive latchup errors. The commercial Ethernet PHY's own power boundary must be supplied by a current-limited power regulator that must have an enable (for power cycling), and its maximum power output must not exceed the PHY's input requirements, thus preventing damage to the device. A regulator with configurable output limits and short-circuit protection (such as the RHFL4913, rad hard positive voltage regulator family) is ideal. This will prevent a catastrophic failure due to radiation (such as a short between the commercial device's power and ground) from taking down the board's main power. Logic provided on the board will detect errors in the PHY. An FPGA (field-programmable gate array) with embedded Ethernet MAC (Media Access Control) will work well. The error detection includes monitoring the PHY's interrupt line, and the status of the Ethernet's switched power. When the PHY is determined to be non-functional, the logic device resets the PHY, which will often clear radiation induced errors. If this doesn't work, the logic device power-cycles the FPGA by toggling the regulator's enable input. This should clear almost all radiation induced errors provided the device is not latched up.

Parks, Jeremy↗
NASA NTRS1983

Development and fabrication of a high current, fast recovery power diode

A high voltage (VR = 1200 V), high current (IF = 150 A), fast recovery ( 700 ns) and low forward voltage drop ( 1.5 V) silicon rectifier was designed and the process developed for its fabrication. For maximum purity, uniformity and material characteristic stability, neutron transmutation n-type doped float zone silicon is used. The design features a hexagonal chip for maximum area utilization of space available in the DO-8 diode package, PIN diffused junction structure with deep diffused D(+) anode and a shallow high concentration n(+) cathode. With the high temperature glass passivated positive bevel mesa junction termination, the achieved blocking voltage is close to the theoretical limit of the starting material. Gold diffusion is used to control the lifetime and the resulting effect on switching speed and forward voltage tradeoff. For solder reflow assembly, trimetal (Al-Ti-Ni) contacts are used. The required major device electrical characteristics were achieved. Due to the tradeoff nature of forward voltage drop and reverse recovery time, a compromise was reached for these values.

Berman, A. H.↗