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At least 595 records · Page 33

Exponential Improvements in the Simulation of Lattice Gauge Theories Using Near-Optimal Techniques

We report a first-of-its-kind analysis on post-Trotter simulation of U(1), SU(2), and SU(3) lattice gauge theories including fermions in arbitrary spatial dimension. We provide explicit circuit constructions as well as T-gate counts and logical qubit counts for Hamiltonian simulation. We find a reduction of up to 25 orders of magnitude in space-time volume over Trotter methods for simulations of non-Abelian lattice gauge theories relevant to the standard model. This improvement results from our algorithm having polynomial scaling with the number of colors in the gauge theory, achieved by utilizing oracle constructions relying on the sparsity of physical operators, in contrast to the exponential scaling seen in state-of-the-art Trotter methods, which employ explicit mappings onto Pauli operators. Our work demonstrates that the use of advanced algorithmic techniques leads to dramatic reductions in the cost of simulating fundamental interactions, bringing it in step with resources required for first-principles quantum simulation of chemistry.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗

Toward a 2D Local Implementation of Quantum Low-Density Parity-Check Codes

Geometric locality is an important theoretical and practical factor for quantum low-density parity-check (qLDPC) codes that affects code performance and ease of physical realization. For device architectures restricted to two-dimensional (2D) local gates, naively implementing the high-rate codes suitable for low-overhead fault-tolerant quantum computing incurs prohibitive overhead. In this work, we present an error-correction protocol built on a bilayer architecture that aims to reduce operational overheads when restricted to 2D local gates by measuring some generators less frequently than others. We investigate the family of bivariate-bicycle qLDPC codes and show that they are well suited for a parallel syndrome-measurement scheme using fast routing with local operations and classical communication (LOCC). Through circuit-level simulations, we find that in some parameter regimes, bivariate-bicycle codes implemented with this protocol have logical error rates comparable to the surface code while using fewer physical qubits. Published by the American Physical Society 2025

Berthusen, Noah (ORCID:0000000275862786)↗

Noisy Approach to Intrinsically Mixed-State Topological Order

We propose a general framework for studying two-dimensional (2D) topologically ordered states subject to local correlated errors and show that the resulting mixed state can display (imTO)—topological order that is not expected to occur in the ground state of 2D local gapped Hamiltonians. Specifically, we show that decoherence, previously interpreted as anyon condensation in a doubled Hilbert space, is more naturally phrased as, and provides a physical mechanism for, “gauging out” anyons in the original Hilbert space. We find that gauging out anyons generically results in imTO, with the decohered mixed state strongly symmetric under certain anomalous 1-form symmetries. This framework lays bare a striking connection between the decohered density matrix and , which can appear as anomalous surface states of three-dimensional topological orders. Through a series of examples, we show that the decohered state can display a classical memory, encode logical qubits (i.e., exhibit a quantum memory), and even host chiral or nonmodular topological order. We argue that a partial classification of imTO is given in terms of nonmodular braided-fusion categories. Published by the American Physical Society 2025

Sohal, Ramanjit (ORCID:0000000292975715)↗

Rare events and Griffiths phases in topological quantum error correction

The performance of quantum error correcting (QEC) codes is often studied under the assumption of spatiotemporally uniform error rates. On the other hand, experimental implementations almost always produce heterogeneous error rates, in either space or time, as a result of effects such as imperfect fabrication and/or cosmic rays. It is therefore important to understand if and how their presence can affect the performance of QEC in qualitative ways. Here, in this work, we study the effects of nonuniform error rates in the representative examples of the 1D repetition code and the 2D toric code, focusing on when they have extended spatiotemporal correlations; these may arise, for instance, from rare events (such as cosmic rays) that temporarily elevate error rates over the entire code patch. These effects can be described in the corresponding statistical mechanics models for decoding, where long-range correlations in the error rates lead to extended rare regions of weaker coupling. For the 1D repetition code where the rare regions are linear, we find two distinct decodable phases: a conventional ordered phase in which logical failure rates decay exponentially with the code distance, and a rare-region dominated Griffiths phase in which failure rates are parametrically larger and decay as a stretched exponential. In particular, the latter phase is present when the error rates in the rare regions are above the bulk threshold. For the 2D toric code where the rare regions are planar, we find no decodable Griffiths phase: rare events which boost error rates above the bulk threshold lead to an asymptotic loss of threshold and failure to decode. Unpacking the failure mechanism implies that techniques for suppressing extended sequences of repeated rare events (which, without intervention, will be statistically present with high probability) will be crucial for QEC with the toric code.

classical statistical mechanics↗

Composite-dimensional topological codes with boundaries and defects

We introduce new algorithms and provide example constructions of stabilizer models for the gapped boundaries, domain walls, and 0D defects of Abelian composite-dimensional twisted quantum doubles. Using the physically intuitive concept of condensation, our algorithm explicitly describes how to construct the boundary and domain-wall stabilizers starting from the bulk model. This extends the utility of Pauli stabilizer models in describing nontranslationally invariant topological orders with gapped boundaries. To highlight this utility, we provide a series of examples, including a new family of quantum error-correcting codes where the double of ℤ4 is coupled to instances of the double semion (DS) phase. We discuss the codes' utility in the burgeoning area of quantum error correction with an emphasis on the interplay between deconfined anyons, logical operators, error rates, and decoding. We also augment our construction, built using algorithmic tools to describe the properties of explicit stabilizer layouts at the microscopic lattice level, with dimensional counting arguments and macroscopic-level constructions building on pants decompositions. The latter outlines how such codes' representation and design can be automated. Our results are validated by a series of error-correcting threshold calculations comparing our codes' performance with that of standard surface codes. To do so, we introduce a composite-dimensional belief-propagation decoder with ordered statistics that utilizes combination sweeps. Going beyond our worked-out examples, we expect our explicit step-by-step algorithms to pave the path for higher-dimensional codes to be discovered and implemented in near-future architectures that take advantage of various hardware platforms.

Mousa, Mohamad [Purdue University]↗

Colloquium: Ice rule and emergent frustration in particle ice and beyond

Geometric frustration and the ice rule are two concepts that are intimately connected and widespread across condensed matter. The first refers to the inability of a system to satisfy competing interactions in the presence of spatial constraints. The second, in its more general sense, represents a prescription for the minimization of the topological charges in a constrained system. Both can lead to manifolds of high susceptibility and nontrivial, constrained disorder where exotic behaviors can appear and even be designed deliberately. This Colloquium describes the emergence of geometric frustration and the ice rule in soft condensed matter. It excludes the extensive developments of mathematical physics within the field of geometric frustration, but rather focuses on systems of confined microscopic or mesoscopic particles that emerge as a novel paradigm exhibiting spin degrees of freedom. In such systems, geometric frustration can be engineered artificially by controlling the spatial topology and geometry of the lattice, the position of the individual particle units, or their relative filling fraction. These capabilities enable the creation of novel and exotic phases of matter and also potentially lead toward technological applications related to memory and logic devices that are based on the motion of topological defects. The rapid progress in theory and experiments is reviewed and the intimate physical connections with other frustrated systems at different length scales are discussed.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗

Stabilizing Non-Abelian Topological Order Against Heralded Noise via Local Lindbladian Dynamics

An important open question for the current generation of highly controllable quantum devices is understanding which phases can be realized as stable steady states under local quantum dynamics. In this work, we show how robust steady-state phases with both Abelian and non-Abelian mixed-state topological order can be stabilized, in two spatial dimensions, against generic “heralded” noise using active dynamics that incorporate measurement and feedback, modeled as a fully local Lindblad master equation. These topologically ordered steady states are two-way connected to pure topologically ordered ground states using local quantum channels, and preserve quantum information for a time that is exponentially large in the system size. Specifically, we present explicit constructions of families of local Lindbladians for both Abelian (ℤ 2 ) and non-Abelian (𝐷 4 ) topological order whose steady states host mixed-state topological order when the noise is below a threshold strength. As the noise strength is increased, these models exhibit first-order transitions to intermediate mixed-state phases where they encode robust classical memories, followed by (first-order) transitions to a trivial steady state at high noise rates. When the noise is imperfectly heralded, steady-state order disappears but our active dynamics significantly enhances the lifetime of the encoded logical information. To carry out the numerical simulations for the non-Abelian 𝐷 4 case, we introduce a generalized stabilizer tableau formalism that permits efficient simulation of the non-Abelian Lindbladian dynamics.

Monte Carlo methods↗

Contact-Less Integrity Verification of Microelectronics Using Near-Field EM Analysis

Modern microelectronics life-cycle and supply chain ecosystem bring multiple untrusted entities, which can compromise their integrity. A major integrity issue of microelectronics stems from piracy of intellectual properties (IP) and counterfeiting, which causes significant revenue loss to the semiconductor manufacturers. Further, these components often lead to compromised functionality, reliability, security, and safety of an electronic system. This paper presents secure information transmission and probing methods for verifying the integrity of digital integrated circuit (ICs) based on their electromagnetic (EM) near-field emissions and thereby protecting systems against counterfeit components. The proposed method has been tested on both high-level instructions executed by microprocessors or Systems-on-Chip (serving as examples of software), and also logic circuits within FPGA fabrics and ASICs (serving as examples of hardware). The authentication information required by each digital system is generated using a pseudo-random number generator circuit and securely transmitted via near-field magnetic emissions. The authorized party can probe these emissions using a near-field probe, process the acquired signals to improve the signal-to-noise ratio (SNR), and then recover the secure information through matched filtering. Experimental results from commercial SoCs are used to demonstrate the proposed technique. Methods for reducing EM interference during integrity verification of both FPGAs and ASICs are also described.

47 OTHER INSTRUMENTATION↗

A Novel Protection Scheme for Unbalanced Faults in Inverter Dominated Networks: A Computationally Efficient Algorithm for Entry-Level Relays

Microgrids are now a common practice in distribution systems to increase resilience and reliability. However, microgrid protection remains a critical challenge, considering its requirement to operate in both grid connected and islanded, and the variability in fault characteristics under each mode of operation. This paper presents unbalanced power (S unb ) based fault detection algorithm, which considers local voltage and current unbalances to determine faults in the system. S unb is a computationally efficient fault detection algorithm that is suitable for implementation in the programmable logic of entry level protective relays. In addition, the difference in current and voltage unbalance (D n ) is used to determine the fault type. The proposed method demonstrates high sensitivity and selectivity for line-to-ground (LG), line-to-line (LL), and double line-to-ground (LLG) faults, representing the most common faults in distribution systems. It also allows relay coordination with upstream and downstream protection devices in both island and grid connected operation, while preserving grading margins. The same pickup and time multiplier settings of a particular relay for both modes of operation eliminates the need for adaptive settings, which rely on communication networks. Validation was performed with a hardware-in-the-loop (HIL) setup using Typhoon HIL real time simulator interfaced with three entry-level, SEL 751 relays. Results confirmed the algorithm’s ability to discriminate fault conditions, and determine the fault type under both operating modes, maintain fast detection times, and ensure proper protection coordination.

fault classification↗

A Survey on the Expanding Scope and Interdisciplinary Opportunities for Processing-in-Memory Techniques

Processing-in-Memory (PIM) is emerging as a practical path to overcome the limitations of traditional von Neumann architectures. At its core, PIM systems implement computing primitives such as logic operations and multiply-accumulate acceleration through compute-in-memory, near-memory processing, or hybrid designs. The role of memory cells varies widely across technologies, acting as inputs, outputs, or analog accumulators through bit-lines and sense amplifiers. This diversity creates trade-offs in precision, bandwidth, latency, and programmability, making it difficult to build a unified understanding on the progress of the field. In this survey, we organize recent advances of PIM into three areas. First, we discuss the progress on the architectural optimizations of PIM and its integration with both DRAM and emerging non-volatile memories. Second, we examine how PIM is being used to accelerate key computing domains, including generative AI workloads and high-performance kernels, along with new approaches. Third, we highlight the growing adoption of PIM in computational sciences, where it is being applied to solve interdisciplinary problems such as genome analysis, mRNA quantification, mass spectrometry, quantum circuit simulation, wave modeling, and secure computation. Finally, we synthesize the major challenges that continue to slow PIM adoption, including manufacturing constraints, power delivery, thermal reliability, data consistency, runtime and memory-management coordination, and the difficulty of building portable software abstractions without sacrificing commercial viability. This work provides an updated, structured perspective on PIM’s potential across computing and computational sciences and the barriers that must be solved for it to reach its full impact.

Asifuzzaman, Kazi [Oak Ridge National Laboratory (↗

Semantic Property Graph for Scalable Knowledge Graph Analytics

Graphs are a natural and fundamental representation to describe entities, relationships, activities, and evolution of complex systems. Many domains such as communication, citation, procurement, biology, social media, and transportation can be modeled as a set of entities and their relationships. Resource Description Framework (RDF) and Labeled Property Graph (LPG) are two of the most used data models to encode information in a graph. Both models are similar in terms of using basic graph elements such as nodes and edges but differ in terms of the modeling approach, expressibility, serialization, and target applications. RDF is a flexible data exchange model for expressing information about entities but it tends to a have high memory footprint and inefficient storage, which does not make it a natural choice to perform scalable graph analytics. In contrast, LPG has gained traction as a reliable model to perform scalable graph analytic tasks such as sub-graph matching, network alignment, and real-time knowledge graph query. It provides efficient storage, fast traversal, and flexibility to model various real-world domains. At the same time, the LPG lacks the support of a formal knowledge representation such as an ontology to provide automated knowledge inference. We propose Semantic Property Graph (SPG) as a logical projection of reified RDF into the LPG model. SPG continues to use RDF ontology to define the type hierarchy of the projected graph and validate it against a given ontology. We present a framework to convert reified RDF graphs into SPG using two different computing environments. We also present cloud-based graph migration capabilities using Amazon Web Services.

Purohit, Sumit↗

FTTN: Feature-Targeted Testing for Numerical Properties of NVIDIA & AMD Matrix Accelerators

While NVIDIA has been the dominant provider of GPUs for HPC and ML, now AMD has several offerings of GPUs. This encourages programmers to try out AMD GPUs for new codes and also port existing codes over. Unfortunately, without understanding the floating-point differences between these GPU types, software development or porting can introduce bugs—and currently such an understanding is lacking. The magnitude of this open question becomes clear if one imagines the the number of floating-point precision choices (FP16, FP32, etc.), floating-point formats (standard floats, brain-float, etc.), and execution units available (elementary units, matrix/tensor cores, etc.) Questions such as rounding modes and subnormal support are also important. Most of these answers are unknown today or are hard to access. We provide the first testing-guided approach that answers a significant number of these questions. We also devise tests to reveal internal information (e.g., extra bits kept) to make sure that our findings are reliable. Many of our tests employ systematically generated random-programs, others apply fast-math flags and some involve fused multiplyadd. Especially for tensor/matrix cores, the tests have nontrivial logic that we present Our testing approach is reusable for the plethora of GPUs yet to be introduced. Our findings include up to 7 ulps of difference between NVIDIA and AMD for sin and cos at FP32 precision and 3 ulp at FP64. In our study of matrix cores (NVIDIA) and tensor cores (AMD), we have extensively characterized rounding modes (truncation versus round-to-nearest), the number of extra internal bits kept (whether 3 bits are kept or not), subnormal support for inputs and outputs across four different floating-point formats and across NVIDIA A100 and AMD MI250X GPUs. We believe that this wealth of data becoming available for the first time may help avoid significant porting bugs when migrating code across these platforms.

Li, Xinyi↗

Transient Optimization of the Cryogenic Moderator System Controller at the Spallation Neutron Source for Improved Performance

The high-energy neutron beam generated at the Spallation Neutron Source (SNS) at Oak Ridge National Laboratory is moderated to use cold (slow) neutrons for scientific discoveries. The Cryogenic Moderator System (CMS) removes heat from the neutron beam using cryogenic hydrogen (H 2 ) moderators connected via heat exchangers to a helium (He) refrigeration loop that dissipates heat using a compressor-brake system. However, the CMS is affected by sporadic losses in beam power, referred to as "beam trips," as these events generate significant disturbances in cooling requirements. To accommodate the heat load transients during beam trips, the CMS uses a decentralized control strategy consisting of four flow valves and one electric heater adjusted by independent proportional-integral (PI) controllers. During the CMS’s initial commissioning, the PI gains were calibrated based only on tracking performance, overlooking their effectiveness in disturbance rejection. A data-driven, control-oriented closed-loop model was developed to recalibrate the PI gains and minimize the transient disturbances caused by beam trips. The model consists of three main components: (1) a physics-based model of the He refrigeration loop, (2) a machine-learning model of the cryogenic H 2 cooling trains, and (3) the control logic used for feedback set-point tracking. Experimental results showed that the recalibrated gains obtained in this study improved the CMS’s transient response during beam trips.

Maldonado Puente, Bryan↗

Virtual Log-Structured Storage for High-Performance Streaming

Over the past decade, given the higher number of data sources (e.g., Cloud applications, Internet of things) and critical business demands, Big Data transitioned from batch-oriented to real-time analytics. Stream storage systems, such as Apache Kafka, are well known for their increasing role in real-time Big Data analytics. For scalable stream data ingestion and processing, they logically split a data stream topic into multiple partitions. Stream storage systems keep multiple data stream copies to protect against data loss while implementing a stream partition as a replicated log. This architectural choice enables simplified development while trading cluster size with performance and the number of streams optimally managed. This paper introduces a shared virtual log-structured storage approach for improving the cluster throughput when multiple producers and consumers write and consume in parallel data streams. Stream partitions are associated with shared replicated virtual logs transparently to the user, effectively separating the implementation of stream partitioning (and data ordering) from data replication (and durability). We implement the virtual log technique in the KerA stream storage system. When comparing with Apache Kafka, KerA improves the cluster ingestion throughput by up to 4x when multiple producers write over hundreds of data streams.

consistent stream ordering↗

DaYu: Optimizing Distributed Scientific Workflows by Decoding Dataflow Semantics and Dynamics

The combination of ever-growing scientific datasets and distributed workflow complexity creates I/O performance bottlenecks due to data volume, velocity, and variety. Although the increasing use of descriptive data formats (e.g., HDF5, netCDF) helps organize these datasets, it also creates obscure bottlenecks due to the need to translate high level operations into file addresses and then into low-level I/O operations. To address this challenge, we introduce DaYu, a method and toolset for analyzing (a) semantic relationships between logical datasets and file addresses, (b) how dataset operations translate into I/O, and (c) the combination across entire workflows. DaYu's analysis and visualization enables identification of critical bottlenecks and reasoning about remediation. We describe our methodology and propose optimization guidelines. Evaluation on scientific workflows demonstrates up to 3.7x performance improvements in I/O time for obscure bottlenecks. The time and storage overhead for DaYu's time-ordered data is typically under 0.2% of runtime and 0.25% of data volume, respectively.

Tang, Meng↗

Strengthening Cybersecurity for Industrial Control Systems: Innovations in Protecting PLC-Based Infrastructure

In this paper, we propose two new approaches aimed at enhancing the security of industrial control systems (ICS) that utilize programmable logic controllers (PLCs) for the control of critical processes. The first approach involves the addition of a unique digital watermark to the PWM control that adjusts the motor speed to control the critical process. This enables efficient detection and identification of any unauthorized modifications to the sensor signals responsible for controlling the plant. The second approach focuses on monitoring the input current (i.e power) drawn by the PLC during the execution of critical process control tasks. Malicious intrusions to change the PLC parameters and/or unauthorized firmware updates can be rapidly detected. Both approaches demonstrate a substantial improvement in the security of ICS, effectively safeguarding against potential cyber-attacks. Experimental results from a laboratory scale water tank level controlled via PLC showcases rapid intrusion detection capabilities.

Huang, Peng-Hao↗

Hydro-battery Hybrids – A Case for Holistic Assessment of Hybrid Energy Systems

With increasing penetration of renewable energy resources like solar and wind, the flexibility offered by the hydropower generation facilities would be instrumental in providing grid reliability. However, hydropower’s capabilities are often constrained to meet asset management targets and environmental flow requirements. To meet these necessary requisites while simultaneously being able to utilize hydropower’s full potential, hydro plus battery hybrids offer a logical solution. However it is often challenging to make the case for economic feasibility of hydro-battery hybrids at the required scale of battery storage. To that end, this paper proposes a multi-objective optimization framework to maximize advantages of hydro-battery hybrid systems from three different avenues: new market opportunities, environmental benefits and machine wear and fatigue. Using an illustrative case study of a peaking plant, we simulate hydropower operations for with and without 120 MWh of battery storage for four different simulated flow patterns ranging from peaking operations to run-of-the-river operations and two intermediate flow patterns in between. The results demonstrate that hybridizing the hydropower plant can potentially generate additional revenue while simultaneously enable more environmental friendly operations and reduce the overall machine wear and tear.

Chalishazar, Vishvas H.↗

A Framework for Neural Network Inference on FPGA-Centric SmartNICs

FPGA-based SmartNICs offer great potential to significantly improve the performance of high-performance computing and warehouse data processing by tightly coupling support for reconfigurable data-intensive computation with cross-node communication, thereby mitigating the von Neumann bottleneck. Existing work, however, has been generally been limited in that it assumes an accelerator model where kernels are offloaded to SmartNICs, but most control tasks are left to the CPUs. This leads to frequent waiting, inferior performance, and scaling challenges. In this work, we propose a new distributive data-centric computing framework, named FCsN, for reconfigurable SmartNIC-based systems. Through a lightweight task circulation execution model and its implementation architecture, FCsN allows the complete detaching of kernel execution, control logic, system scheduling, and network communication to the SmarNICs. This boosts performance by: (i) avoiding the control dependency with CPUs and (ii) supporting streaming kernel execution and network communication at line rate and in a very fine-grained manner. We demonstrate the efficiency and flexibility of FCsN using various types of neural network applications including graph neural networks; as these last are both irregular and data intensive they offer an especially robust demonstration. Evaluations using commonly-used neural network models and graph datasets show that a system with the support of FCsN can achieve, on average, 144 speedups over the MPI-based standard CPU baselines.

Guo, Anqi↗