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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 595 records · Page 33

Phononic bus for coherent interfaces between a superconducting quantum processor, spin memory, and photonic quantum networks

A hybrid quantum system performs high-fidelity quantum state transduction between a superconducting (SC) microwave qubit and the ground state spin system of a solid-state artificial atom. This transduction is mediated via an acoustic bus connected by piezoelectric transducers to the SC microwave qubit. For SC circuit qubits and diamond silicon vacancy centers in an optimized phononic cavity, the system can achieve quantum state transduction with fidelity exceeding 99% at a MHz-scale bandwidth. By combining the complementary strengths of SC circuit quantum computing and artificial atoms, the hybrid quantum system provides high-fidelity qubit gates with long-lived quantum memory, high-fidelity measurement, large qubit number, reconfigurable qubit connectivity, and high-fidelity state and gate teleportation through optical quantum networks.

Englund, Dirk Robert↗

AIRNET: A real-time comunications network for aircraft

A real-time local area network was developed for use on aircraft and space vehicles. It uses token ring technology to provide high throughput, low latency, and high reliability. The system was implemented on PCs and PC/ATs operating on PCbus, and on Intel 8086/186/286/386s operating on Multibus. A standard IEEE 802.2 logical link control interface was provided to (optional) upper layer software; this permits the controls designer to utilize standard communications protocols (e.g., ISO, TCP/IP) if time permits, or to utilize a very fast link level protocol directly if speed is critical. Both unacknowledged datagram and reliable virtual circuit services are supported. A station operating an 8 MHz Intel 286 as a host can generate a sustained load of 1.8 megabits per second per station, and a 100-byte message can be delivered from the transmitter's user memory to the receiver's user memory, including all operating system and network overhead, in under 4 milliseconds.

Weaver, Alfred C.↗

Filtering algorithms for processing prefiltered measurements

The filtering algorithm for processing integral measurements is extended to include analog type prefilters with infinite memory, and to include sequential processing of prefiltered data in multi-sensor, multi-sample rate systems. The extension to infinite memory prefilters requires serial decorrelation of the prefilter output prior to state estimation. These algorithms provide a technique for investigation of prefilter parameter sensitivities, and provide optimal compensation for any information loss due to prefiltering.

Warren, A. W.↗

Programming Strategies for Irregular Algorithms on the Emu Chick

The Emu Chick prototype implements migratory memory-side processing in a novel hardware system. Rather than transferring large amounts of data across the system interconnect, the Emu Chick moves lightweight thread contexts to near-memory cores before the beginning of each remote memory read. Previous work has characterized the performance of the Chick prototype in terms of memory bandwidth and programming differences from more typical, non-migratory platforms, but there has not yet been an analysis of algorithms on this system. This work evaluates irregular algorithms that could benefit from the lightweight, memory-side processing of the Chick and demonstrates techniques and optimization strategies for achieving performance in sparse matrix-vector multiply operation (SpMV), breadth-first search (BFS), and graph alignment across up to eight distributed nodes encompassing 64 nodelets in the Chick system. We also define and justify relative metrics to compare prototype FPGA-based hardware with established ASIC architectures. The Chick currently supports up to 68x scaling for graph alignment, 80 MTEPS for BFS on balanced graphs, and 50% of measured STREAM bandwidth for SpMV.

Hein, Eric↗

Memory forensic analysis of a programmable logic controller in industrial control systems

In industrial control systems (ICS), programmable logic controllers (PLCs) are used to automate physical processes such as nuclear plants and power grid stations, and are often subject to cyber attacks. As in conventional IT domain, the memory analysis of the PLCs can help answer important forensic questions about the attack, such as the presence of malicious firmware, injection of modified control logic (the program running on the PLC), and manipulation of I/O devices (e.g., sensors and actuators). Unlike conventional IT domain, PLCs have heterogeneous hardware architecture, proprietary firmware and control software, making it challenging to employ a unified framework for their memory forensics. For merely extracting artifacts of forensic importance, reverse-engineering the firmware is a tedious task, and the effort needs to be repeated for every PLC model. As a community, a step-wise approach to tackle this challenge is to analyze the memory of specific PLCs, and subsequently find a generic framework applicable to all PLCs. Our work is a step forward in this direction. By following a methodology that focuses on the functional layer of PLCs instead of reverse engineering the firmware, we analyze the digital forensic artifacts available in a common PLC, Allen-Bradley ControlLogix 1756-L61. Before diving into the memory dump, we analyze the PLC control software to create a list of important artifacts that are sure to exist in the PLC memory dump. The approach employs a setup where PLC control software RSLogix-5000 is connected to the PLC, and the memory dump can be obtained as and when needed. We create test cases that sequentially highlight each category of artifacts, followed by an examination of the resultant impact on memory. After attaining the listed artifacts, we employ conventional string and known data searches to extract interesting information present in this PLC's memory. The memory analysis profile, presented as a Python library and shared with the community, can help a forensic investigator to readily extract forensic artifacts from the same model's controller. The adopted approach may help researchers in creating memory profile of other PLCs, and ultimately formulating a generic PLC memory analysis framework.

Rais, Muhammad Haris↗

RTSJ Memory Areas and Their Affects on the Performance of a Flight-Like Attitude Control System

The two most important factors in improving performance in any software system, but especially a real-time, embedded system, are knowing which components are the low performers and knowing what can be done to improve their performance. The word performance with respect to a real-time, embedded system does not necessarily mean fast execution, which is the common definition when discussing non real-time systems. It also includes meeting all of the specified execution dead-lines and executing at the correct time without sacrificing non real-time performance. Using a Java prototype of an existing control system used on Deep Space 1[1], the effects from adding memory areas are measured and evaluated with respect to improving performance.

Real-time Specification for Java2 (RTSJ)↗

Efficient ICCG on a shared memory multiprocessor

Different approaches are discussed for exploiting parallelism in the ICCG (Incomplete Cholesky Conjugate Gradient) method for solving large sparse symmetric positive definite systems of equations on a shared memory parallel computer. Techniques for efficiently solving triangular systems and computing sparse matrix-vector products are explored. Three methods for scheduling the tasks in solving triangular systems are implemented on the Sequent Balance 21000. Sample problems that are representative of a large class of problems solved using iterative methods are used. We show that a static analysis to determine data dependences in the triangular solve can greatly improve its parallel efficiency. We also show that ignoring symmetry and storing the whole matrix can reduce solution time substantially.

Hammond, Steven W.↗

HEC Applications on Columbia Project

NASA's Columbia system consists of a cluster of twenty 512 processor SGI Altix systems. Each of these systems is 3 TFLOP/s in peak performance - approximately the same as the entire compute capability at NAS just one year ago. Each 512p system is a single system image machine with one Linunx O5, one high performance file system, and one globally shared memory. The NAS Terascale Applications Group (TAG) is chartered to assist in scaling NASA's mission critical codes to at least 512p in order to significantly improve emergency response during flight operations, as well as provide significant improvements in the codes. and rate of scientific discovery across the scientifc disciplines within NASA's Missions. Recent accomplishments are 4x improvements to codes in the ocean modeling community, 10x performance improvements in a number of computational fluid dynamics codes used in aero-vehicle design, and 5x improvements in a number of space science codes dealing in extreme physics. The TAG group will continue its scaling work to 2048p and beyond (10240 cpus) as the Columbia system becomes fully operational and the upgrades to the SGI NUMAlink memory fabric are in place. The NUMlink uprades dramatically improve system scalability for a single application. These upgrades will allow a number of codes to execute faster at higher fidelity than ever before on any other system, thus increasing the rate of scientific discovery even further

Taft, Jim↗

Thin-film lithium niobate on diamond as a platform for efficient spin-phonon coupling

Negatively charged silicon vacancy (SiV − ) centers in diamond are leading candidates for solid-state quantum memory that can be controlled using electromagnetic or acoustic waves. The latter are particularly promising due to the strong strain response of SiV − , enabling large spin-phonon interaction strengths. Indeed, coherent spin control via surface acoustic waves (SAWs) has been demonstrated and is essential for developing on-chip phononic quantum networks. However, the absence of piezoelectricity in diamond requires an interface with a piezoelectric material for efficient transduction and delivery of acoustic waves to spins in diamonds. Here, we demonstrate a heterogeneously integrated phononic platform that combines thin-film lithium niobate with diamond to enable acoustic control of single SiV − spins. Additionally, leveraging large SAW-induced strain at the location of SiV − , we achieve coherent acoustic control of an electron spin with more than twofold improvement in Rabi frequency compared to state-of-the-art devices based on aluminum nitride on diamond. Furthermore, this work represents a crucial step towards realizing phonon-based quantum information processing systems.

Optically detected magnetic resonance↗

Towards a NEAMS-based high-fidelity model of the MARVEL reactor

This report outlines the progress of Idaho National Laboratory in developing a high-fidelity and high-resolution model of the Microreactor Applications Research Validation and Evaluation reactor. The model was developed under the Nuclear Energy Advanced Modeling and Simulation microreactor application driver at Idaho National Laboratory. The overarching objective of this activity is the development of a high-fidelity multiphysics MARVEL model using NEAMS tools, and to verify and validate NEAMS tools against MARVEL reference simulation and experimental data, respectively. This is a unique opportunity to conduct multiphysics analysis on a soon-to-be-deployed microreactor. This multiphysics model developed under the NEAMS-funded INL microreactor application driver leverages three single-physics models coupled via the MOOSE’s MultiApp and Transfer systems. The latter systems enable in-memory data transfer between MOOSE-based and MOOSE-wrapped applications. The first single-physics model, that functions as main application, leverages Griffin to model the neutron transport in the core through the discontinuous finite element (DFEM) discrete ordinates solver (SN). Several optimization flags that were developed by the Griffin developer team were beta-tested to enhance the solver’s performance. These include the combined use of using_average_xs and update_averaged_xs_on that enable to avoid expensive on-the-fly cross sections evaluations at each linear iterations in favor of evaluations of the macroscopic cross sections at each Picard iteration. The second single-physics model uses BISON to handle solid heat transfer and asymptotic hydrogen redistribution analysis in the fuel. While the model returns consistent results for the temperature and hydrogen distribution in the fuel, a mismatch was noticed in the calculated temperature in the reflector due to the value of the gap conductance used in our model. Ongoing investigations are being performed to assess the origin of this discrepancy. Finally, the System Analysis Module (SAM) was used to model the flow of the sodium-potassium eutectic in the primary loop. A first verification was also performed showing good agreement in terms of mass flow rate and inlet temperature. All mesh files were generated using the MOOSE Reactor module, removing the need for external meshing tools. Notably, this workscope represents one of the initial applications of the MOOSE Reactor module for modeling highly irregular geometries. The use of the reactor module significantly streamlined the mesh generation process. The full multiphysics mode, that combines all the single physics models, was leveraged to conduct initial steady-state multiphysics simulations to compute power, and temperature distribution in the reactor. Initial testing was performed for transient simulations as well. In this case, the new checkpoint restart capability for eigenvalue calculations was tested showing the capability for streamlined restart of transient calculations. Future work will focus on improving the fidelity of the model by performing comprehensive code-to-code comparisons. For instance, the full-core Griffin neutronics model will be benchmarked against MCNP reference results, that were provided by the MARVEL design team. Additionally, the SAM T/H model will be verified against reference RELAP-5 results for selected accident scenarios. Besides code-to-code verification exercises, the model fidelity will be improved by replacing the single-channel SAM model with a more complex SAM-Pronghorn coupled model, in which the sub-channel capability is deployed to obtain radial temperature resolution in the coolant. This model will be developed in synergy with the NEAMS thermal hydraulics team.

22 GENERAL STUDIES OF NUCLEAR REACTORS↗

Distributed Multi-GPU Community Detection on Exascale Computing Platforms

Community detection is a fundamental operation in graph mining, and by uncovering hidden structures and patterns within complex systems it helps solve fundamental problems pertaining to social networks, such as information diffusion, epidemics, and recommender systems. Scaling graph algorithms for massive networks becomes challenging on modern distributed-memory multi-GPU (Graphics Processing Unit) systems due to limitations such as irregular memory access patterns, load imbalances, higher communication-computation ratios, and cross-platform support. We present a novel algorithm HiPDPL-GPU (distributed parallel Louvain) to address these challenges. We conduct experiments involving different partitioning techniques to achieve optimized performance of HiPDPL-GPU on the two largest supercomputers: Frontier and Summit. Remarkably, HiPDPL-GPU processes a graph with 4.2 billion edges in less than 3 minutes using 1024 GPUs. Qualitatively performance of HiPDPL-GPU is similar or better compared to other state-of-the-art CPU- and GPU-based implementations. While prior GPU implementations have predominantly employed CUDA, our first-of-its-kind implementation for community detection is cross-platform, accommodating both AMD and NVIDIA GPUs.

graph algorithms, high performance comptuing↗

Distributed Multi-GPU Community Detection on Exascale Computing Platforms

Community detection is a fundamental operation in graph mining, and by uncovering hidden structures and patterns within complex systems it helps solve fundamental problems pertaining to social networks, such as information diffusion, epidemics, and recommender systems. Scaling graph algorithms for massive networks becomes challenging on modern distributed-memory multi-GPU (Graphics Processing Unit) systems due to limitations such as irregular memory access patterns, load imbalances, higher communication-computation ratios, and cross-platform support. We present a novel algorithm HiPDPL-GPU (Distributed Parallel Louvain) to address these challenges. We conduct experiments involving different partitioning techniques to achieve an optimized performance of HiPDPL-GPU on the two largest supercomputers: Frontier and Summit. Remarkably, HiPDPL-GPU processes a graph with 4.2 billion edges in less than 3 minutes using 1024 GPUs. Qualitatively, the performance of HiPDPL-GPU is similar or better compared to other state-of-the-art CPU- and GPU-based implementations. While prior GPU implementations have predominantly employed CUDA, our first-of-its-kind implementation for community detection is cross-platform, accommodating both AMD and NVIDIA GPUs.

Sattar, Naw Safrin↗

The Build System - Integration and management of large software avionic systems

The Build System comprises the software tools and procedures creating the flight memory load for the Space Shuttle Backup Flight System. The system has six functions: (1) configuration management, which insures that the memory load contains the proper modules, all clearly marked; (2) source translation, which translates the source code into a relocatable machine code; (3) module integration, which combines and assigns memory locations to all the object modules produced in source translation; (4) static code analysis, which verifies the integration process; (5) deliverables generation, which yields release documentation and deliverable items; and (6) release maintenance, which controls all system patches subsequent to release. Further developments will include more automation in the producing of patches from source-code updates and system requirements for tracking.

Mayer, J. T. B.↗

A PIPS + SrI 2 (Eu) detector for atmospheric radioxenon monitoring

The PIPS–SrI 2 (Eu) is a prototype atmospheric radioxenon detection system designed at Oregon State University in support of international efforts towards monitoring clandestine nuclear weapon testing activities. This detector aims to address some shortcomings found in currently deployed beta–gamma atmospheric radioxenon detection systems, such as lackluster energy resolution and memory effect, by employing modern detection materials and readout. The system uses a PIPSBox, a silicon-based gas cell, for electron detection, and a pair of ultrabright, D-shaped SrI 2 (Eu) scintillators coupled to silicon photomultipliers for photon detection. A custom eight-channel digital pulse processor equipped with a field programmable gate-array (FPGA) identifies electron–photon coincidences between the volumes in near real-time. Gas samples of the four radioxenon isotopes of interest were independently measured with the PIPS–SrI 2 (Eu) detection system to determine energy resolution and efficiency. Application of FPGA-based coincidence discrimination in near real-time reduced the ambient background count rate by 95.85 ± 0.04%. Using parameters from the Xenon International gas processing unit and assuming a blank sample and zero memory effect the minimum detectable concentrations (MDCs) for the isotopes were calculated to be 0.12 ± 0.03, 0.27 ± 0.05, 0.15 ± 0.02, and 1.00 ± 0.08 mBq/m 3 air for 131m Xe, 133 Xe, 133m Xe, and 135 Xe, respectively. These MDC estimates compare well with other radioxenon detection systems employed in the International Monitoring System (IMS) and indicate that the PIPS–SrI 2 (Eu) is in compliance with the Comprehensive Nuclear Test-Ban-Treaty Organization (CTBTO) sensitivity requirement of ≤ 1 mBq/m 3 for 133 Xe.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗

Human Factors Design for Particle Accelerator Control Room Interfaces

Fermilab, the birthplace of many scientific discoveries in physics and particle accelerator sciences, is in the midst of a widescale modernization effort. The Accelerator Control Operations Research Network (ACORN project’s goal is to modernize the accelerator control system by replacing end-of-life power supplies and enhance future operations of the Fermilab accelerator complex with megawatt particle beams. Within ACORN, opportunities for process improvement concerning software development, human-system interface design, and task performance are also being considered. Human factors researchers from Idaho National Laboratory in collaboration with usability experts from Fermilab, are currently investigating human-centered design improvements for the accelerator control system. For example, substantial tribal knowledge and memory recall are required to effectively operate the accelerator system. This contributes to high cognitive workload and potential burnout of accelerator operators. Developing guidance for consistent visual and functional design enables a more intuitive interaction and relieves operators of cognitive burden. Additionally, developing more intuitive and integrated interfaces can also lead to improved accelerator efficacy by empowering operators with greater understanding and control of the systems. The challenge in developing such interfaces is in designing for a wide variety of user goals, system specifications, and level of experience in users. The challenges need to be met while e also considering the maintainability of the control system. The purpose of this paper is to detail the human factors process and design within the ACORN project, describe results gathered thus far, and discuss the larger implications for this work.

43 PARTICLE ACCELERATORS↗

Coordinated design of coding and modulation systems

The joint optimization of the coding and modulation systems employed in telemetry systems was investigated. Emphasis was placed on formulating inner and outer coding standards used by the Goddard Spaceflight Center. Convolutional codes were found that are nearly optimum for use with Viterbi decoding in the inner coding of concatenated coding systems. A convolutional code, the unit-memory code, was discovered and is ideal for inner system usage because of its byte-oriented structure. Simulations of sequential decoding on the deep-space channel were carried out to compare directly various convolutional codes that are proposed for use in deep-space systems.

Massey, J. L.↗

Rollback Hardware For Time Warp Multiprocessor Systems

Rollback Chip (RBC) module is computer circuit board containing special-purpose memory circuits for use in multiprocessor computer system. Designed to help realize speedup potential of parallel processing for simulation of discrete events by use of Time Warp operating system.

Robb, Michael J.↗