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At least 595 records · Page 33

Photonic Integrated Circuits

Integrated photonics generally is the integration of multiple lithographically defined photonic and electronic components and devices (e.g. lasers, detectors, waveguides passive structures, modulators, electronic control and optical interconnects) on a single platform with nanometer-scale feature sizes. The development of photonic integrated circuits permits size, weight, power and cost reductions for spacecraft microprocessors, optical communication, processor buses, advanced data processing, and integrated optic science instrument optical systems, subsystems and components. This is particularly critical for small spacecraft platforms. We will give an overview of some NASA applications for integrated photonics.

laser↗

Arrays of Position-Sensitive Virtual Frisch-Grid CdZnTe Detectors: Results From a $4\times 4$ Array Prototype

Position-sensitive virtual Frisch-grid (VFG) CdZnTe (CZT) detectors offer a unique capability for correcting the response nonuniformities caused by crystal defects. This allowed us to achieve high energy resolution, while using typical-grade commercial CZT crystals with relaxed requirements to their quality, thus reducing the overall cost of detectors. Another advantage of the VFG detectors is that they can be integrated into arrays and used in small compact hand-held instruments or large-area gamma cameras that will enhance detection capability for many practical applications, including nonproliferation, medical imaging, and gamma-ray astronomy. Here in this paper, we present the results from testing small array prototypes coupled with front-end application-specified integrated circuit. Each detector in the array is furnished with 5-mm-wide charge-sensing pads placed near the anode. The pads signals are converted into XY coordinates, which combined with the cathode signals (for Z coordinates) provide 3-D position information of all interaction points. The basic array consists of a number of detectors grouped into 2×2 subarrays, each having a common cathode made by connecting together the cathodes of the individual detectors. Lastly, these features can significantly improve the performance of detectors while using typical-grade low-cost CZT crystals to reduce the overall cost of the proposed instrument.

3-D position-sensitive virtual Frisch-grid (VFG) d↗

Space-Charge Simulation of Integrable Rapid Cycling Synchrotron

Integrable optics is an innovation in particle accelerator design that enables strong nonlinear focusing without generating parametric resonances. We use the Synergia tracking code to investigate the application of integrable optics to high-intensity hadron rings. We consider an integrable rapid-cycling synchrotron (iRCS) designed to replace the Fermilab Booster. We find that incorporating integrability into the design suppresses the beam halo generated by a mismatched KV beam. Our iRCS design includes other features of modern ring design such as low momentum compaction factor and harmonically canceling sextupoles. Experimental tests of high-intensity beams in integrable lattices will take place over the next several years at the Fermilab Integrable Optics Test Accelerator (IOTA) and the University of Maryland Electron Ring (UMER).

43 PARTICLE ACCELERATORS↗

Applicability of GALE-86 Codes to Integral Pressurized Water Reactor Designs

This report describes work that Pacific Northwest National Laboratory is doing to assist the U.S. Nuclear Regulatory Commission (NRC) Office of New Reactors (NRO) staff in their reviews of applications for nuclear power plants using new reactor core designs. These designs include small integral PWRs (IRIS, mPower, and NuScale reactor designs), HTGRs, (pebble-bed and prismatic-block modular reactor designs) and SFRs (4S and PRISM reactor designs). Under this specific task, PNNL will assist the NRC staff in reviewing the current versions of the GALE codes and identify features and limitations that would need to be modified to accommodate the technical review of iPWR and mPower® license applications and recommend specific changes to the code, NUREG-0017, and associated NRC guidance. This contract is necessary to support the licensing of iPWRs with a near-term focus on the B&W mPower® reactor design. While the focus of this review is on the mPower® reactor design, the review of the code and the scope of recommended changes consider a revision of the GALE codes that would make them universally applicable for other types of integral PWR designs. The results of a detailed comparison between PWR and iPWR designs are reported here. Also included is an investigation of the GALE code and its basis and a determination as to the applicability of each of the bases to an iPWR design. The issues investigated come from a list provided by NRC staff, the results of comparing the PWR and iPWR designs, the parameters identified as having a large impact on the code outputs from a recent sensitivity study and the main bases identified in NUREG-0017. This report will provide a summary of the gaps in the GALE codes as they relate to iPWR designs and for each gap will propose what work could be performed to fill that gap and create a version of GALE that is applicable to integral PWR designs.

22 GENERAL STUDIES OF NUCLEAR REACTORS↗

Polarizing Filter for Integrated Optics

Polarizing filter for titanium-doped lithium niobate light waveguide suppresses transverse magnetic (TM) mode of light propagation while allowing transverse electric (TE) mode to continue on its way. Filter - lithium niobate crystal - is expected to find many applications in integrated optical circuits.

Ramer, O. G.↗

SRAM-Based Digital Arbiter PUF

The increased use of Field Programmable Gate Arrays (FPGAs) in critical systems brings new challenges in securing the diversely programmable fabric from cyber-attacks. FPGAs are an inexpensive, efficient, and flexible alternative to Application Specific Integrated Circuits (ASICs), which are becoming increasingly expensive and impractical for low volume manufacturing as technology nodes continue to shrink. Unfortunately, FPGAs are not designed for high security applications, and their high-flexibility lends itself to low security and vulnerability to malicious attacks. Similar to securing an ASIC’s functionality, FPGA programmers can exploit the inherent randomness introduced into hardware structures during fabrication for security applications. Physically Unclonable Functions (PUFs) are one such solution that uses the die specific variability in hardware fabrication for both secret key generation and verification. PUFs strive to be random, unique, and reliable. Throughout recent years many PUF structures have been presented to try and maximize these three design constraints, reliability being the most difficult of the three to achieve. This thesis presents a new PUF structure that combines two elementary PUF concepts (a bi-stable SRAM PUF and a delay-based arbiter PUF) to create a PUF with increased reliability, while maintaining both random and unique qualities. Properties of the new PUF will be discussed as well as the various design modifications that can be made to tweak the desired performance and overhead.

97 MATHEMATICS AND COMPUTING↗

Highly Integrated THz Receiver Systems for Small Satellite Remote Sensing Applications

We are developing miniaturized, highly integrated Schottky receiver systems suitable for use in CubeSats or other small spacecraft platforms, where state-of-the-art performance and ultra-low mass, power, and volume are required. Current traditional Schottky receivers are too large to employ on a CubeSat. We will develop highly integrated receivers operating from 520-600 GHz and 1040-1200 GHz that are based on state-of-the-art receivers already developed at Jet Propulsion Laboratory (JPL) by using novel 3D multi layer packaging. This process will reduce both mass and volume by more than an order of magnitude, while preserving state-of-the-art noise performance. The resulting receiver systems will have a volume of approximately 25 x 25 x 40 millimeters (mm), a mass of 250 grams (g), and power consumption on the order of of 7 watts (W). Using these techniques, we will also integrate both receivers into a single frame, further reducing mass and volume for applications where dual band operation is advantageous. Additionally, as Schottky receivers offer significant gains in noise performance when cooled to 100 K, we will investigate the improvement gained by passively cooling these receivers. Work by Sierra Lobo Inc., with their Cryo Cube technology development program, offers the possibility of passive cooling to 100 K on CubeSat platforms for 1-unit (1U) sized instruments.

Receiver systems↗

Front-end electronic readout system for the Belle II imaging Time-Of-Propagation detector

The Time-Of-Propagation detector is a Cherenkov particle identification detector based on quartz radiator bars for the Belle II experiment at the SuperKEKB ee collider. The purpose of the detector is to identify the type of charged hadrons produced in ee collisions, and requires a single photon timing resolution below 100 picoseconds. A novel front-end electronic system was designed, built, and integrated to acquire data from the 8192 microchannel plate photomultiplier tube channels in the detector. Waveform sampling of these analog signals is done by switched-capacitor array application-specific integrated circuits. The processes of triggering, digitization of windows of interest, readout, and data transfer to the Belle II data acquisition system are managed by Xilinx Zynq-7000 programmable system on a chip devices.

72 PHYSICS OF ELEMENTARY PARTICLES AND FIELDS↗

Space-Charge Simulation of Integrable Rapid Cycling Synchrotron

Integrable optics is an innovation in particle accelerator design that enables strong nonlinear focusing without generating parametric resonances. We use a Synergia space-charge simulation to investigate the application of integrable optics to a high-intensity hadron ring that could replace the Fermilab Booster. We find that incorporating integrability into the design suppresses the beam halo generated by a mismatched KV beam. Our integrable rapid cycling synchrotron (iRCS) design includes other features of modern ring design such as low momentum compaction factor and harmonically canceling sextupoles. Experimental tests of high-intensity beams in integrable lattices will take place over the next several years at the Fermilab Integrable Optics Test Accelerator (IOTA) and the University of Maryland Electron Ring (UMER).

43 PARTICLE ACCELERATORS↗

A forward error correction technique using a high-speed, high-rate single chip codec

The authors describe an error-correction coding approach that allows operation in either burst or continuous modes at data rates of multiple hundreds of megabits per second. Bandspreading is low since the code rate is 7/8 or greater, which is consistent with high-rate link operation. The encoder, along with a hard-decision decoder, fits on a single application-specific integrated circuit (ASIC) chip. Soft-decision decoding is possible utilizing applique hardware in conjunction with the hard-decision decoder. Expected coding gain is a function of the application and is approximately 2.5 dB for hard-decision decoding at 10-5 bit-error rate with phase-shift-keying modulation and additive Gaussian white noise interference. The principal use envisioned for this technique is to achieve a modest amount of coding gain on high-data-rate, bandwidth-constrained channels. Data rates of up to 300 Mb/s can be accommodated by the codec chip. The major objective is burst-mode communications, where code words are composed of 32 n data bits followed by 32 overhead bits.

Boyd, R. W.↗

RECOVERY ACT - Methods for Decision under Technological Change Uncertainty and Risk Assessment for Integrated Assessment of Climate Change

This report presents the final outcomes and products of the project as performed at the Massachusetts Institute of Technology. The research project consists of three main components: methodology development for decision-making under uncertainty, improving the resolution of the electricity sector to improve integrated assessment, and application of these methods to integrated assessment. Results in each area is described in the report.

29 ENERGY PLANNING, POLICY, AND ECONOMY↗

RECOVERY ACT - Methods for Decision under Technological Change Uncertainty and Risk Assessment for Integrated Assessment of Climate Change

This report presents the final outcomes and products of the project as performed both at the Massachusetts Institute of Technology and subsequently at Pennsylvania State University. The research project can be divided into three main components: methodology development for decision-making under uncertainty, improving the resolution of the electricity sector to improve integrated assessment, and application of these methods to integrated assessment.

29 ENERGY PLANNING, POLICY, AND ECONOMY↗

Investigating resource-efficient neutron/gamma classification ML models targeting eFPGAs

There has been considerable interest and resulting progress in implementing machine learning (ML) models in hardware over the last several years from the particle and nuclear physics communities. A big driver has been the release of the Python package, hls4ml, which has enabled porting models specified and trained using Python ML libraries to register transfer level (RTL) code. So far, the primary end targets have been commercial field-programmable gate arrays (FPGAs) or synthesized custom blocks on application specific integrated circuits (ASICs). However, recent developments in open-source embedded FPGA (eFPGA) frameworks now provide an alternate, more flexible pathway for implementing ML models in hardware. These customized eFPGA fabrics can be integrated as part of an overall chip design. In general, the decision between a fully custom, eFPGA, or commercial FPGA ML implementation will depend on the details of the end-use application. In this work, we explored the parameter space for eFPGA implementations of fully-connected neural network (fcNN) and boosted decision tree (BDT) models using the task of neutron/gamma classification with a specific focus on resource efficiency. We used data collected using an AmBe sealed source incident on Stilbene, which was optically coupled to an OnSemi J-series silicon photomultiplier (SiPM) to generate training and test data for this study. We investigated relevant input features and the effects of bit-resolution and sampling rate as well as trade-offs in hyperparameters for both ML architectures while tracking total resource usage. The performance metric used to track model performance was the calculated neutron efficiency at a gamma leakage of 10 -3 . The results of the study will be used to aid the specification of an eFPGA fabric, which will be integrated as part of a test chip.

47 OTHER INSTRUMENTATION↗

Finite difference schemes for long-time integration

Finite difference schemes for the evaluation of first and second derivatives are presented. These second order compact schemes were designed for long-time integration of evolution equations by solving a quadratic constrained minimization problem. The quadratic cost function measures the global truncation error while taking into account the initial data. The resulting schemes are applicable for integration times fourfold, or more, longer than similar previously studied schemes. A similar approach was used to obtain improved integration schemes.

Haras, Zigo↗

Micro-Electromechanical Instrument and Systems Development at the Charles Stark Draper Laboratory

Several generations of micromechanical gyros and accelerometers have been developed at Draper. Current design effort centers on tuning-fork gyro design and pendulous accelerometer configurations. Over 200 gyros of different generations have been packaged and tested. These units have successfully performed across a temperature range of -40 to 85 degrees C, and have survived 30,000-g shock tests along all axes. Draper is currently under contract to develop an integrated micro-mechanical inertial sensor assembly (MMISA) and global positioning system (GPS) receiver configuration. The ultimate projections for size, weight, and power for an MMISA, after electronic design of the application specific integrated circuit (ASIC ) is completed, are 2 x 2 x 0.5 cm, 5 gm, and less than 1 W, respectively. This paper describes the fabrication process, the current gyro and accelerometer designs, and system configurations.

Connelly, J. H.↗

Application driven interface generation for EASIE

The Environment for Application Software Integration and Execution (EASIE) provides a user interface and a set of utility programs which support the rapid integration and execution of analysis programs about a central relational database. EASIE provides users with two basic modes of execution. One of them is a menu-driven execution mode, called Application-Driven Execution (ADE), which provides sufficient guidance to review data, select a menu action item, and execute an application program. The other mode of execution, called Complete Control Execution (CCE), provides an extended executive interface which allows in-depth control of the design process. Currently, the EASIE system is based on alphanumeric techniques only. It is the purpose of this project to extend the flexibility of the EASIE system in the ADE mode by implementing it in a window system. Secondly, a set of utilities will be developed to assist the experienced engineer in the generation of an ADE application.

Kao, Ya-Chen↗

A 200 C Universal Gate Driver Integrated Circuit for Extreme Environment Applications

High-temperature power converters (dc-dc, dc-ac, etc.) have enormous potential in extreme environment applications, including automotive, aerospace, geothermal, nuclear, and well logging. For successful realization of such high-temperature power conversion modules, the associated control electronics also need to perform at high temperature. This paper presents a silicon-on-insulator (SOI) based high-temperature gate driver integrated circuit (IC) incorporating an on-chip low-power temperature sensor and demonstrating an improved peak output current drive over our previously reported work. This driver IC has been primarily designed for automotive applications, where the underhood temperature can reach 200 C. This new gate driver prototype has been designed and implemented in a 0.8 {micro}m, 2-poly, and 3-metal bipolar CMOS-DMOS (Double-Diffused Metal-Oxide Semiconductor) on SOI process and has been successfully tested for up to 200 C ambient temperature driving a SiC MOSFET and a SiC normally-ON JFET. The salient feature of the proposed universal gate driver is its ability to drive power switches over a wide range of gate turn-ON voltages such as MOSFET (0 to 20 V), normally-OFF JFET (-7 to 3 V), and normally-ON JFET (-20 to 0 V). The measured peak output current capability of the driver is around 5 A and is thus capable of driving several power switches connected in parallel. An ultralow-power on-chip temperature supervisory circuit has also been integrated into the die to safeguard the driver circuit against excessive die temperature ({ge}220 C). This approach utilizes increased diode leakage current at higher temperature to monitor the die temperature. The power consumption of the proposed temperature sensor circuit is below 10 {micro}W for operating temperature up to 200 C.

98 NUCLEAR DISARMAMENT, SAFEGUARDS, AND PHYSICAL P↗