Engineering Papers⌕ Search

SEARCH · Engineering Papers

Results for “Memory device”

Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

Quote a phrase for an exact phrase match. Source license links do not imply unrestricted reuse.

At least 577 records · Page 32

Technique for Solving Electrically Small to Large Structures for Broadband Applications

Fast iterative algorithms are often used for solving Method of Moments (MoM) systems, having a large number of unknowns, to determine current distribution and other parameters. The most commonly used fast methods include the fast multipole method (FMM), the precorrected fast Fourier transform (PFFT), and low-rank QR compression methods. These methods reduce the O(N) memory and time requirements to O(N log N) by compressing the dense MoM system so as to exploit the physics of Green s Function interactions. FFT-based techniques for solving such problems are efficient for spacefilling and uniform structures, but their performance substantially degrades for non-uniformly distributed structures due to the inherent need to employ a uniform global grid. FMM or QR techniques are better suited than FFT techniques; however, neither the FMM nor the QR technique can be used at all frequencies. This method has been developed to efficiently solve for a desired parameter of a system or device that can include both electrically large FMM elements, and electrically small QR elements. The system or device is set up as an oct-tree structure that can include regions of both the FMM type and the QR type. The system is enclosed with a cube at a 0- th level, splitting the cube at the 0-th level into eight child cubes. This forms cubes at a 1st level, recursively repeating the splitting process for cubes at successive levels until a desired number of levels is created. For each cube that is thus formed, neighbor lists and interaction lists are maintained. An iterative solver is then used to determine a first matrix vector product for any electrically large elements as well as a second matrix vector product for any electrically small elements that are included in the structure. These matrix vector products for the electrically large and small elements are combined, and a net delta for a combination of the matrix vector products is determined. The iteration continues until a net delta is obtained that is within the predefined limits. The matrix vector products that were last obtained are used to solve for the desired parameter. The solution for the desired parameter is then presented to a user in a tangible form; for example, on a display.

Jandhyala, Vikram↗

A high-speed digital signal processor for atmospheric radar, part 7.3A

The Model SP-320 device is a monolithic realization of a complex general purpose signal processor, incorporating such features as a 32-bit ALU, a 16-bit x 16-bit combinatorial multiplier, and a 16-bit barrel shifter. The SP-320 is designed to operate as a slave processor to a host general purpose computer in applications such as coherent integration of a radar return signal in multiple ranges, or dedicated FFT processing. Presently available is an I/O module conforming to the Intel Multichannel interface standard; other I/O modules will be designed to meet specific user requirements. The main processor board includes input and output FIFO (First In First Out) memories, both with depths of 4096 W, to permit asynchronous operation between the source of data and the host computer. This design permits burst data rates in excess of 5 MW/s.

Brosnahan, J. W.↗

Analysis of the survivability of the shuttle (ALT) fault-tolerant avionics system

An extension of the Complementary-Analytic-Simulative Technique (CAST) is presented which is applicable to the Shuttle Data Processing Subsystem (DPS). A two step process was used. The first step provides models, both analytic and simulative, for analysis of the Approach-Landing Test (ALT) configuration. The ALT modeling and analysis are presented. Since CAST had already been shown to be multicomputer systems, the emphasis was placed on extending the CAST concept so it is applicable to computer systems including the multiplicity of input and output devices found in a real-time control system application. The DPS mission-critical survivability for a six-hour mission was determined to be 0.999863 for the Shuttle ALT baseline configuration. Thus it can be said that for ALT, the survivability is adequate. However, the fact that orbiting missions of up to 30 days are planned illustrates the necessity of extending the ALT work to be applicable to OFT and actual mission scenarios. The above analysis led to the evaluation of three selected options which identified two areas of possible improvement. These improvements would result from use of a recovery technique which combines roll ahead with memory copy, and increased TACAN fault detectability.

Source record↗

Automated rendezvous and docking with video imagery

For rendezvous and docking, assessing and tracking relative orientation is necessary within a minimum approach distance. Special target light patterns have previously been considered for use with video sensors for ease of determining relative orientation. A generalization of those approaches is addressed. At certain ranges, the entire structure of the target vehicle constitutes an acceptable target; at closer ranges, substructures will suffice. Acting on the same principle as the human intelligence, these structures can be compared with a memory model to assess the relative orientation and range. Models for comparison are constructed from a CAD facet model and current imagery. This approach requires fast image handling, projection, and comparison techniques which rely on rapidly developing parallel processing technology. Relative orientation and range assessment consists of successful comparison of the perceived target aspect with a known aspect. Generating a known projection from a model within required times, say subsecond times, is only now approaching feasibility. With this capability, rates of comparison used by the human brain can be approached and arbitrary known structures can be compared in reasonable times. Future space programs will have access to powerful computation devices which far exceed even this capability. For example, the possibility will exist to assess unknown structures and then control rendezvous and docking, all at very fast rates. The first step which has the current utility, namely applying this to known structures, is taken.

Rodgers, Mike↗

Network-Capable Application Process and Wireless Intelligent Sensors for ISHM

Intelligent sensor technology and systems are increasingly becoming attractive means to serve as frameworks for intelligent rocket test facilities with embedded intelligent sensor elements, distributed data acquisition elements, and onboard data acquisition elements. Networked intelligent processors enable users and systems integrators to automatically configure their measurement automation systems for analog sensors. NASA and leading sensor vendors are working together to apply the IEEE 1451 standard for adding plug-and-play capabilities for wireless analog transducers through the use of a Transducer Electronic Data Sheet (TEDS) in order to simplify sensor setup, use, and maintenance, to automatically obtain calibration data, and to eliminate manual data entry and error. A TEDS contains the critical information needed by an instrument or measurement system to identify, characterize, interface, and properly use the signal from an analog sensor. A TEDS is deployed for a sensor in one of two ways. First, the TEDS can reside in embedded, nonvolatile memory (typically flash memory) within the intelligent processor. Second, a virtual TEDS can exist as a separate file, downloadable from the Internet. This concept of virtual TEDS extends the benefits of the standardized TEDS to legacy sensors and applications where the embedded memory is not available. An HTML-based user interface provides a visual tool to interface with those distributed sensors that a TEDS is associated with, to automate the sensor management process. Implementing and deploying the IEEE 1451.1-based Network-Capable Application Process (NCAP) can achieve support for intelligent process in Integrated Systems Health Management (ISHM) for the purpose of monitoring, detection of anomalies, diagnosis of causes of anomalies, prediction of future anomalies, mitigation to maintain operability, and integrated awareness of system health by the operator. It can also support local data collection and storage. This invention enables wide-area sensing and employs numerous globally distributed sensing devices that observe the physical world through the existing sensor network. This innovation enables distributed storage, distributed processing, distributed intelligence, and the availability of DiaK (Data, Information, and Knowledge) to any element as needed. It also enables the simultaneous execution of multiple processes, and represents models that contribute to the determination of the condition and health of each element in the system. The NCAP (intelligent process) can configure data-collection and filtering processes in reaction to sensed data, allowing it to decide when and how to adapt collection and processing with regard to sophisticated analysis of data derived from multiple sensors. The user will be able to view the sensing device network as a single unit that supports a high-level query language. Each query would be able to operate over data collected from across the global sensor network just as a search query encompasses millions of Web pages. The sensor web can preserve ubiquitous information access between the querier and the queried data. Pervasive monitoring of the physical world raises significant data and privacy concerns. This innovation enables different authorities to control portions of the sensing infrastructure, and sensor service authors may wish to compose services across authority boundaries.

Figueroa, Fernando↗

High Angular Sensitivity, Absolute Rotary Encoding Device with Polygonal Mirror and Stand-Alone Diffraction Gratings

A device for position encoding of a rotating shaft in which a polygonal mirror having a number of facets is mounted to the shaft and a monochromatic light beam is directed towards the facets. The facets of the polygonal mirror direct the light beam to a stand-alone low line density diffraction grating to diffract the monochromatic light beam into a number of diffracted light beams such that a number of light spots are created on a linear array detector. An analog-to-digital converter is connected to the linear array detector for reading the position of the spots on the linear array detector means. A microprocessor with memory is connected to the analog-to-digital converter to hold and manipulate the data provided by the analog-to-digital converter on the position of the spots and to compute the position of the shaft based upon the data from the analog-lo-digital converter.

Leviton, Douglas B.↗

Feasibility study, software design, layout and simulation of a two-dimensional fast Fourier transform machine for use in optical array interferometry

The NASA-Cornell Univ.-Worcester Polytechnic Institute Fast Fourier Transform (FFT) chip based on the architecture of the systolic FFT computation as presented by Boriakoff is implemented into an operating device design. The kernel of the system, a systolic inner product floating point processor, was designed to be assembled into a systolic network that would take incoming data streams in pipeline fashion and provide an FFT output at the same rate, word by word. It was thoroughly simulated for proper operation, and it has passed a comprehensive set of tests showing no operational errors. The black box specifications of the chip, which conform to the initial requirements of the design as specified by NASA, are given. The five subcells are described and their high level function description, logic diagrams, and simulation results are presented. Some modification of the Read Only Memory (ROM) design were made, since some errors were found in it. Because a four stage pipeline structure was used, simulating such a structure is more difficult than an ordinary structure. Simulation methods are discussed. Chip signal protocols and chip pinout are explained.

Boriakoff, Valentin↗

Onward to Petaflops Computing

With the recent demonstration of a computing rate of one Tflop/s at Sandia National Lab, one might ask what lies ahead for high-end computing. The next major milestone is a sustained rate of one Pflop/s (also written one petaflops, or 10(exp 15) floating-point operations per second). It should be emphasized that we could just as well use the term "peta-ops", since it appears that large scientific systems will be required to perform intensive integer and logical computation in addition to floating-point operations, and completely non- floating-point applications are likely to be important as well. In addition to prodigiously high computational performance, such systems must of necessity feature very large main memories, between ten Tbyte (10(exp 13) byte) and one Pbyte (10 (exp 15) byte) depending on application, as well as commensurate I/O bandwidth and huge mass storage facilities. The current consensus of scientists who have performed initial studies in this field is that "affordable" petaflops systems may be feasible by the year 2010, assuming that certain key technologies continue to progress at current rates. A sustained petaflops computing capability however is a daunting challenge; it appears significantly more challenging from today's state-of-the-art than achieving one Tflop/s has been from the level of one Gflop/s about 12 years ago. Challenges are faced in the arena of device technology, system architecture, system software, algorithms and applications. This talk will give an overview of some of these challenges, and describe some of the recent initiatives to address them.

Bailey, David H.↗

The Lick Observatory charge-coupled device /CCD/ and controller

A description is given of a flexible microprocessor-based controller for charge-coupled device two-dimensional detectors. It is noted that the controller can operate under manual control or as a slave to a remote computer linked by coaxial cable. The system is discussed, together with data taken at the telescope and in the laboratory. The flexibility of the controller derives from its modular form and from the use of a programmable 8-bit microprocessor to control and sequence the electronic logic. The electronic circuits for such functions as signal processing, clock sequencing, voltage level adjustment, and temperature control are on small individual plug-in cards, making future improvements and changes simple. The software of the microprocessor is stored in erasable, programmable, read-only memory. Among the limitations of the controller is a scan speed of roughly 35 microsec per pixel.

Robinson, L. B.↗

SEE and TID extension testing of the Xilinx XQR18V04 4Mbit radiation hardened configuration PROM

The XQR18V04 was evaluated for single event upset rates using proton and heavy ions. The PROM was demonstrated to be immune to latch-up, as well as to static upset in the flash memory cells, to an LET > 125 MeV/mg/cmz (effective). The PROM was also tested in a dynamic mode, which revealed three distinct error modes: Read Bit Errors, Address Errors, and a Single Event Functional Interrupt (SEW which affected the data output drivers. Saturation cross-sections, and onset thresholds, for these errorinodes were measured at the heavy ion facility at Texas A&M University, and the proton facility at UC Davis. Additional testing was performed at UC Davis and the Cobalt 60 source at McClellan Air Force Base to examine the effect to TID life as a function of power biasing. The PROM demonstrated a 100% improvement in total TID life with an 84% percent decrease in device usage.

FPGA Virtex II SEU↗

Shape Morphing Adaptive Radiator Technology (SMART) Updates to Techport Entry

The Shape-Morphing Adaptive Radiator Technology (SMART) project builds off the FY16 research effort that developed a flexible composite radiator panel and demonstrated its ability to actuate from SMA's attached to it. The proposed FY17 Shape-Morphing Adaptive Radiator Technology (SMART) project's goal is to 1) develop a practical radiator design with shape memory alloys (SMAs) bonded to the radiator's panel, and 2) build a multi-panel radiator prototype for subsequent system level thermal vacuum tests. The morphing radiator employs SMA materials to passively change its shape to adapt its rate of heat rejection to vehicle requirements. Conceptually, the radiator panel has a naturally closed position (like a cylinder) in a cold environment. Whenever the radiator's temperature gradually rises, SMA's affixed to the face sheet will pull the face sheet open a commensurate amount - increasing the radiators view to space and causing it to reject more heat. In a vehicle, the radiator's variable heat rejection capabilities would reduce the number of additional heat rejection devices in a vehicle's thermal control system. This technology aims to help achieve the required maximum to minimum heat rejection ratio required for manned space vehicles to adopt a lighter, simpler, single loop thermal control architecture (ATCS). Single loop architectures are viewed as an attractive means to reduce mass and complexity over traditional dual-loop solutions. However, fluids generally considered safe enough to flow within crewed cabins (e.g. propylene glycol-water mixtures) have much higher freezing points and viscosities than those used in the external sides of dual loop ATCSs (e.g. Ammonia and HFE7000).

Erickson, Lisa↗

A design study of a photorefractive page composer

A laboratory demonstration and preliminary system analysis of a page composer designed to have the dual advantages of low optical loss and small size, were reported. The current page composer is optically addressed and functions by virtue of optically induced refractive index changes in the active material. Laboratory demonstrations of the device were successfully performed using 10 x 10 bit and 128 x 128 bit data arrays. It was established that the only significant obstacle to the construction of a brass-board model working at megabit data rates is the lack of sensitivity of the photorefractive materials which were considered during the course of this study. Possible materials for future consideration are the photoplastics. While they have more than the required sensitivity, their stability and suitability for double exposure holography was not investigated. If a sufficiently sensitive material is found, then the photorefractive page composer could be built to perform in a highly efficient fashion which would result in a overall reduction of the size of the memory system and an easing of the requirements upon the sensitivity of the holographic recording material.

Source record↗

Mitigation of High Altitude and Low Earth Orbit Radiation Effects on Microelectronics via Shielding or Error Detection and Correction Systems

The NASA Cooperative Agreement NAG4-210 was granted under the FY2000 Faculty Awards for Research (FAR) Program. The project was proposed to examine the effects of charged particles and neutrons on selected random access memory (RAM) technologies. The concept of the project was to add to the current knowledge of Single Event Effects (SEE) concerning RAM and explore the impact of selected forms of radiation on Error Detection and Correction Systems. The project was established as an extension of a previous FAR awarded to Prairie View A&M University (PVAMU), under the direction of Dr. Richard Wilkins as principal investigator. The NASA sponsored Center for Applied Radiation Research (CARR) at PVAMU developed an electronic test-bed to explore and quantify SEE on RAM from charged particles and neutrons. The test-bed was developed using 486DX microprocessor technology (PC-104) and a custom test board to mount RAM integrated circuits or other electronic devices. The test-bed had two configurations - a bench test version for laboratory experiments and a 400 Hz powered rack version for flight experiments. The objectives of this project were to: 1) Upgrade the Electronic Test-bed (ETB) to a Pentium configuration; 2) Accommodate more than only 8 Mbytes of RAM; 3) Explore Error Detection and Correction Systems for radiation effects; 4) Test modern RAM technologies in radiation environments.

Gupta, Kajal↗

Efficient use of bit planes in the generation of motion stimuli

The production of animated motion sequences on computer-controlled display systems presents a technical problem because large images cannot be transferred from disk storage to image memory at conventional frame rates. A technique is described in which a single base image can be used to generate a broad class of motion stimuli without the need for such memory transfers. This technique was applied to the generation of drifting sine-wave gratings (and by extension, sine wave plaids). For each drifting grating, sine and cosine spatial phase components are first reduced to 1 bit/pixel using a digital halftoning technique. The resulting pairs of 1-bit images are then loaded into pairs of bit planes of the display memory. To animate the patterns, the display hardware's color lookup table is modified on a frame-by-frame basis; for each frame the lookup table is set to display a weighted sum of the spatial sine and cosine phase components. Because the contrasts and temporal frequencies of the various components are mutually independent in each frame, the sine and cosine components can be counterphase modulated in temporal quadrature, yielding a single drifting grating. Using additional bit planes, multiple drifting gratings can be combined to form sine-wave plaid patterns. A large number of resultant plaid motions can be produced from a single image file because the temporal frequencies of all the components can be varied independently. For a graphics device having 8 bits/pixel, up to four drifting gratings may be combined, each having independently variable contrast and speed.

Mulligan, Jeffrey B.↗

Aeroservoelastic and Structural Dynamics Research on Smart Structures Conducted at NASA Langley Research Center

An overview of smart structures research currently underway at the NASA Langley Research Center in the areas of aeroservoelasticity and structural dynamics is presented. Analytical and experimental results, plans, potential technology pay-offs, and challenges are discussed. The goal of this research is to develop the enabling technologies to actively and passively control aircraft and rotorcraft vibration and loads using smart devices. These enabling technologies and related research efforts include developing experimentally-validated finite element and aeroservoelastic modeling techniques; conducting bench experimental tests to assess feasibility and understand system trade-offs; and conducting large-scale wind- tunnel tests to demonstrate system performance. The key aeroservoelastic applications of this research include: active twist control of rotor blades using interdigitated electrode piezoelectric composites and active control of flutter, and gust and buffeting responses using discrete piezoelectric patches. In addition, NASA Langley is an active participant in the DARPA/ Air Force Research Laboratory/ NASA/ Northrop Grumman Smart Wing program which is assessing aerodynamic performance benefits using smart materials. Keywords: aeroelasticity, smart structures, piezoelectric actuators, active fiber composites, rotorcraft, buffet load alleviation, individual blade control, aeroservoelasticity, shape memory alloys, damping augmentation, piezoelectric power consumption

McGowan, Anna-Maria Rivas↗

Fault-Tolerant, Real-Time, Multi-Core Computer System

A document discusses a fault-tolerant, self-aware, low-power, multi-core computer for space missions with thousands of simple cores, achieving speed through concurrency. The proposed machine decides how to achieve concurrency in real time, rather than depending on programmers. The driving features of the system are simple hardware that is modular in the extreme, with no shared memory, and software with significant runtime reorganizing capability. The document describes a mechanism for moving ongoing computations and data that is based on a functional model of execution. Because there is no shared memory, the processor connects to its neighbors through a high-speed data link. Messages are sent to a neighbor switch, which in turn forwards that message on to its neighbor until reaching the intended destination. Except for the neighbor connections, processors are isolated and independent of each other. The processors on the periphery also connect chip-to-chip, thus building up a large processor net. There is no particular topology to the larger net, as a function at each processor allows it to forward a message in the correct direction. Some chip-to-chip connections are not necessarily nearest neighbors, providing short cuts for some of the longer physical distances. The peripheral processors also provide the connections to sensors, actuators, radios, science instruments, and other devices with which the computer system interacts.

Gostelow, Kim P.↗

Electronic Still Camera

A handheld, programmable, digital camera is disclosed that supports a variety of sensors and has program control over the system components to provide versatility. The camera uses a high performance design which produces near film quality images from an electronic system. The optical system of the camera incorporates a conventional camera body that was slightly modified, thus permitting the use of conventional camera accessories, such as telephoto lenses, wide-angle lenses, auto-focusing circuitry, auto-exposure circuitry, flash units, and the like. An image sensor, such as a charge coupled device ('CCD') collects the photons that pass through the camera aperture when the shutter is opened, and produces an analog electrical signal indicative of the image. The analog image signal is read out of the CCD and is processed by preamplifier circuitry, a correlated double sampler, and a sample and hold circuit before it is converted to a digital signal. The analog-to-digital converter has an accuracy of eight bits to insure accuracy during the conversion. Two types of data ports are included for two different data transfer needs. One data port comprises a general purpose industrial standard port and the other a high speed/high performance application specific port. The system uses removable hard disks as its permanent storage media. The hard disk receives the digital image signal from the memory buffer and correlates the image signal with other sensed parameters, such as longitudinal or other information. When the storage capacity of the hard disk has been filled, the disk can be replaced with a new disk.

Holland, S. Douglas↗

PE99155 Point-Of-Load Buck Regulator Total Ionizing Dose Test Report

Teledyne’s PE99155 point-of-load buck regulator was tested to evaluate an applicationspecific question about the start-up behavior of the device. This test determined if accumulated total ionizing dose (TID) affected any start-up voltage transient characteristics. Testing was based on pass/fail criterial for the magnitude of the output voltage to ensure the safety of downstream electronics. Two sets of radiation tests were performed. The first group of PE99155s used a high dose rate (HDR) irradiation to 25 krad(Si). A second group of PE99155s used high dose rate irradiation to 30 krad(Si).

TID↗