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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 559 records · Page 31
All sourcesNASA NTRSDOE OSTI
DOE OSTI2020

Cosmogenic activation of silicon

In the production of 3 H, 7 Be, and 22 Na by interactions of cosmic-ray particles with silicon can produce radioactive backgrounds in detectors used to search for rare events. Through controlled irradiation of silicon CCDs and wafers with a neutron beam that mimics the cosmic-ray neutron spectrum, followed by direct counting, we determined that the production rate from cosmic-ray neutrons at sea level is (112 ± 24) atoms/( kg day ) for 3 H, (8.1 ± 1.9) atoms/( kg day ) for 7 Be, and (43.0 ± 7.2) atoms/( kg day ) for 22 Na . Complementing these results with the current best estimates of activation cross sections for cosmic-ray particles other than neutrons, we obtain a total sea-level cosmic-ray production rate of (124 ± 25) atoms/(kg day) for 3 H, (9.4 ± 2.0) atoms/( kg day ) for 7 Be, and (49.6 ± 7.4) atoms/( kg day ) for 22 Na. These measurements will help constrain background estimates and determine the maximum time that silicon-based detectors can remain unshielded during detector fabrication before cosmogenic backgrounds impact the sensitivity of next-generation rare-event searches.

72 PHYSICS OF ELEMENTARY PARTICLES AND FIELDS↗
DOE OSTI2021

Improving GaAsP/Si Tandem Solar Cells Using Silicon Passivated Contacts

The degradation of photocarrier bulk lifetime in Si wafer substrates during the heteroepitaxial growth of III-V materials has been widely reported and is known to limit the efficiency of III-V/Si tandem solar cells. There have been prior strategies to protect Si lifetime in III-V growth chambers, but most require the use of a protective layer that must be removed in subsequent device processing. It would be advantageous for protective layers to remain an active part of the device. In this work, we demonstrate that a polycrystalline silicon (poly-Si) passivated contact can protect the minority carrier lifetime of the Si base wafer during the organometallic vapor phase epitaxy of III-V materials on silicon substrates.

Exascale Computing Project↗
DOE OSTI2020

Sulfurization as a promising surface passivation approach for both n- and p-type Si

Sulfur is shown to be an effective and promising surface passivation element for both n- and p-type Si wafers after reacting in dilute hydrogen sulfide gas (2 - 6% in argon) at 550°C. Effective minority carrier lifetimes of > 2 ms and > 0.25 ms are achieved for n- and p-type Si wafers, respectively, comparable to the industry standard thermal oxide and atomic layer deposited aluminum oxide passivation level. Surface characterization by x-ray photoelectron and emission spectroscopy reveals that sulfur is primarily bonded in a sulfide environment.

42 ENGINEERING↗
DOE OSTI2023

A New Method for the Evaluation of Majority and Minority Carrier Contact Resistivity of Polysilicon on Oxide Contacts

In this contribution we present a novel technique for characterizing the majority and minority carrier contact resistivity in polysilicon on oxide passivating contacts. Traditionally, contact resistivity is measured through the Transfer Length Method (TLM). This method presents difficulties when measuring the minority carrier contact due to the presence of a blocking diode which prevents current flow between the pads. Our novel method is performed by creating a unipolar device which has the same contact on both sides (either symmetric n-type or symmetric p-type) and metalizing the device with a grid on one side, and a full metal contact on the back (the same pattern that will be used in a final cell). We then measure the resistance across the device at increasing illumination. Since the resistivity of the wafer is a function of carrier density, when increasing illumination, the wafer resistivity decreases. We can then fit modeling equations to the measured resistivity and extrapolate the fit to infinite illumination where only the contact resistivity is measured to accurately measure both the minority and majority carrier contact resistivity.

current measurement↗
DOE OSTI2020

Reflectance of Silicon Photomultipliers at Vacuum Ultraviolet Wavelengths

Characterization of the vacuum ultraviolet (VUV) reflectance of silicon photomultipliers (SiPMs) is important for large-scale SiPM-based photodetector systems. In this work, we report the angular dependence of the specular reflectance in vacuum of SiPMs manufactured by Fondazionc Bruno Kessler (FBK) and Hamamatsu Photonics K.K. (HPK) over wavelengths ranging from 120 to 280 nm. Refractive index and extinction coefficient of the thin silicon-dioxide film deposited on the surface of the FBK SiPMs are derived from reflectance data of an FBK silicon wafer with the same deposited oxide film as SiPMs. The diffuse reflectance of SiPMs is also measured at 193 nm. We use the VUV spectral dependence of the optical constants to predict the reflectance of the FBK silicon wafer and FBK SiPMs in liquid xenon.

73 NUCLEAR PHYSICS AND RADIATION PHYSICS↗
DOE OSTI2024

Improving CdMnTe Detector Performance by Adding 2% of Selenium

About 2% of selenium was added to CdMnTe (CMT) to reveal the role of selenium in CMT material used as a gamma-ray detector. The average etch-pit density (EPD) in a typical 2-in CdMnTeSe (CMTS) wafer was measured to be about 8.3×10 3 cm –2 except for the edge regions, and the radial nonuniformity of the bandgap along the wafer was about 2-meV. The typical mobility-lifetime product of electrons and holes was evaluated to be 3.06×10 –3 cm 2 /V and 3.1×10 –4 cm 2 /V, respectively. The energy resolution of the 122-keV photo-peak for a Co-57 radioactive source with a planar CMTS detector was 5.2%, demonstrating a positive effect associated with adding dilute amounts of Se to CMT. Finally, the enhanced detector performance in a planar CMTS detector is attributed to an improved value of hole mobility-lifetime product in CMTS, which mitigates the adverse hole tailing effect found in CdZnTe (CZT) and CMT detectors.

47 OTHER INSTRUMENTATION↗
DOE OSTI2022

Voltage waveform tailoring for high aspect ratio plasma etching of SiO 2 using Ar/CF 4 /O 2 mixtures: Consequences of ion and electron distributions on etch profiles

The quality of high aspect ratio (HAR) features etched into dielectrics for microelectronics fabrication using halogen containing low temperature plasmas strongly depends on the energy and angular distribution of the incident ions (IEAD) onto the wafer, as well as potentially that of the electrons (EEAD). Positive ions, accelerated to high energies by the sheath electric field, have narrow angular spreads and can penetrate deeply into HAR features. Electrons typically arrive at the wafer with nearly thermal energy and isotropic angular distributions and so do not directly penetrate deeply into features. These differences can lead to positive charging of the insides of the features that can slow etching rates and produce geometric defects such as twisting. In this work, we computationally investigated the plasma etching of HAR features into SiO 2 using tailored voltage waveforms in a geometrically asymmetric capacitively coupled plasma sustained in an Ar/CF 4 /O 2 mixture at 40 mTorr. The tailored waveform consisted of a sinusoidal wave and its higher harmonics with a fundamental frequency of 1 MHz. We found that some degree of control of the IEADs and EEADs is possible by adjusting the phase of higher harmonics φ through the resulting generation of electrical asymmetry and electric field reversal. However, the IEADs and EEADs cannot easily be separately controlled. The control of IEADs and EEADs is inherently linked. The highest quality feature was obtained with a phase angle φ = 0° as this value generated the largest (most negative) DC self-bias and largest electric field reversal for accelerating electrons into the feature. That said, the consequences of voltage waveform tailoring (VWT) on etched features are dominated by the change in the IEADs. Although VWT does produce EEADs with higher energy and narrower angular spread, the effect of these electrons on the feature compared to thermal electrons is not large. Finally, this smaller impact of VWT produced EEADs is attributed to thermal electrons being accelerated into the feature by electric fields produced by the positive in-feature charging.

47 OTHER INSTRUMENTATION↗
DOE OSTI2025

Mask-side Hyper-NA EUV imaging on the SHARP microscope

Hyper-NA, the prospective successor to high-numerical aperture (NA) extreme ultraviolet lithography (EUVL) could be inserted soon after 2030. Hyper-NA poses a number of challenges, including reduced depth of focus, amplified mask three-dimensional effects, and increased mask-side angular range. A Hyper-NA capable extreme ultraviolet (EUV) mask-imaging tool can address these challenges and accelerate research and development toward Hyper-NA. The Sharp High-Numerical Aperture Actinic Reticle Review Project (SHARP) EUV mask microscope is supporting mask-side high-NA imaging since 2015. Implementing mask-side Hyper-NA imaging in 2024 enables research and development toward the corresponding nodes of EUVL. Hyper-NA zoneplates at 0.75 4x/8x NA with a 6.7-deg chief ray angle and 0.85 4x/8x NA with a 7.4-deg chief ray angle are added to the SHARP microscope. Imaging at mask-side Hyper-NA is demonstrated. Imaging of 5-nm half-pitch (wafer scale) horizontal lines and spaces is demonstrated using dipole illumination. Imaging of 5-nm half-pitch (wafer scale) vertical lines and spaces is demonstrated using frequency-doubled imaging of 40-nm hp (mask scale) lines and spaces. Normalized image log slope (NILS) and modulation of Hyper-NA image data match closely to simulations for horizontal lines and spaces. A reduction in NILS of 0.3 or less is observed for vertical lines and spaces in the two-beam imaging regime. Through-focus image data are discussed, comparing different dipole sources and mask-side NAs. Mask-side Hyper-NA photomask imaging has been implemented and demonstrated on the SHARP microscope and is now available to users of the instrument.

Benk, Markus↗
DOE OSTI2020

Gallium Oxide Techno-Economic Analysis for the Wide Bandgap Semiconductor Market

More than 30% of electrical energy passes through power electronics today with speculation that in the next decade this could grow to 80%. The wide bandgap semiconductor market is already approaching $1 billon USD in 2019 and is projected to be almost $7 billion USD in 2028. Even with its high cost, SiC, is starting to dislodge the incumbent Si technology in some applications, such as hybrid and electric vehicles, due to smaller size, and higher efficiency. We review and report the IHS Markit’s market predictions for wide bandgap semiconductor technologies, and highlight the technoeconomic analysis results for the manufacturing cost of Ga2O3 wafers. Specifically, we focus on the potential for Ga2O3 to be more economically advantageous than SiC using current manufacturing methods and then identify opportunities where research can further reduce the volume cost of Ga2O3 wafers.

28 EE - Advanced Manufacturing Office (EE-5A)↗
DOE OSTI2024

A Redox-Electrodialysis Model with Zero Fitting Parameters: Insights into Process Limitations, Design, and Material Interventions

Redox-Electrodialysis (r-ED) is an electrochemical desalination cell architecture that has recently received considerable interest, due to its low energy demand relative to electrochemical desalination technologies that rely on electrode-based ion removal. To further improve the energy efficiency of r-ED, we developed a lumped mathematical model with no adjustable parameters to investigate the various sources of overpotential within the cell. Existing models of electrodialysis and r-ED cells either do not accurately incorporate all phenomena contributing to the overpotential or utilize empirical fitting parameters. The model developed here indicates that ohmic overpotentials, especially in the diluate chamber, are the most significant contributors to energy losses. Based on this insight, we hypothesized that adding an ion exchange resin wafer in the diluate compartment would increase the ionic conductivity and decrease the energy demand. Experimental results showed an 18% reduction in specific energy use while achieving the same degree of salt removal (20 mM to 12 mM). Furthermore, the resin wafer enabled complete desalination to potable drinking levels at a current density previously unachievable within practical operating voltage limits (4.93 mA cm -2 ). We also expanded the model to explore differences in r-ED energy use between configurations using multiple cells and a single cell with increased area.

37 INORGANIC, ORGANIC, PHYSICAL, AND ANALYTICAL CH↗
DOE OSTI2022

Effect of Annealing Conditions on Recovery of Lattice Damage in a High-Energy-Implanted 4H-SiC Superjunction PIN Diode

A high energy ion implantation system has been recently developed at the Tandem Van de Graaff facility at Brookhaven National Laboratory with tunable energy to 150 MeV capable of multi-step, deep implantation in 4H-SiC wafers with dopant atoms, such as B, P, Al, and N. Medium and high voltage devices with deep junctions can be fabricated using this system. Lattice strain introduced by the implantation process needs to be recovered and dopant atoms activated by appropriate annealing process as the device performance is strongly associated with the extent of recovery of the lattice. Using Synchrotron X-ray Rocking Curve Topography (SXRCT) and Reciprocal Space Mapping (RSM), the strain induced by high energy implantation of Al and N in 4H-SiC in different patterns are measured and mapped. It is observed that the strain levels correlate with the total fluence levels. PiN diodes fabricated on these implanted wafers were then annealed at temperatures ranging from 1700 °C to 2000 °C for 60 min. The SXRCT and RSM analysis of the annealed samples suggests that for the same annealing duration, higher temperature leads to better lattice recovery.

43 PARTICLE ACCELERATORS↗
DOE OSTI2023

Integrated photonic molecule Brillouin laser with a high-power sub-100-mHz fundamental linewidth

Photonic integrated lasers with an ultra-low fundamental linewidth and a high output power are important for precision atomic and quantum applications, high-capacity communications, and fiber sensing, yet wafer-scale solutions have remained elusive. Here we report an integrated stimulated Brillouin laser (SBL), based on a photonic molecule coupled resonator design, that achieves a sub-100-mHz fundamental linewidth with greater than 10-mW output power in the C band, fabricated on a 200-mm silicon nitride (Si 3 N 4 ) CMOS-foundry compatible wafer-scale platform. The photonic molecule design is used to suppress the second-order Stokes (S2) emission, allowing the primary lasing mode to increase with the pump power without phase noise feedback from higher Stokes orders. The nested waveguide resonators have a 184 million intrinsic and 92 million loaded Q, over an order of magnitude improvement over prior photonic molecules, enabling precision resonance splitting of 198 MHz at the S2 frequency. We demonstrate S2-suppressed single-mode SBL with a minimum fundamental linewidth of 71±18 mHz, corresponding to a 23±6-mHz 2 /Hz white-frequency-noise floor, over an order of magnitude lower than prior integrated SBLs, with an ∼11-mW output power and 2.3-mW threshold power. The frequency noise reaches the resonator-intrinsic thermo-refractive noise from 2-kHz to 1-MHz offset. The laser phase noise reaches −155 dBc/Hz at 10-MHz offset. The performance of this chip-scale SBL shows promise not only to improve the reliability and reduce size and cost but also to enable new precision experiments that require the high-speed manipulation, control, and interrogation of atoms and qubits. Realization in the silicon nitride ultra-low loss platform is adaptable to a wide range of wavelengths from the visible to infrared and enables integration with other components for systems-on-chip solutions for a wide range of precision scientific and engineering applications including quantum sensing, gravitometers, atom interferometers, precision metrology, optical atomic clocks, and ultra-low noise microwave generation.

Liu, Kaikai (ORCID:0000000213609646)↗
DOE OSTI2020

Stackable electronics enabled by freestanding 2d and 3d materials

In this talk, I will discuss about our unique strategy to isolate wafer-scale 2D materials into monolayers and stack them into a heterostructures by using a layer-resolved splitting (LRS) technique [1,2]. This technique enables my group at MIT to explore unprecedented wafer-scale 2D heterodevices. While 2D heterostructures promise interesting futuristic devices, the performance of 2D material-based devices is substantially inferior to that of conventional 3D semiconductor materials. However, 3D materials exist as their bulk form, thus it is challenging to stack them together for heterostructures. Obviously, conformal coating of such single-crystalline bulks on 3D features is impossible. My group at MIT has recently invented a 2D materials-based layer transfer (2DLT) technique that can produce single-crystalline freestanding membranes from any compound materials including III-V, III-N, and complex oxides [3,4]. This technique is based on remote epitaxy of single-crystalline films on graphene followed by peeling from graphene. Stacking of freestanding 3D material membranes will enable unprecedented 3D heterostructures whose performance is expected to be superior to that of 2D heterostructures. I will talk about our group’s effort on 3D heterostructures as well as 2D-3D mixed heterostructured devices [5].

Kim, Jeehwan↗
DOE OSTI2022

Development of Single Photon Sources in GaN

The recent discovery of bright, room-temperature, single photon emitters in GaN leads to an appealing alternative to diamond best single photon emitters given the widespread use and technological maturity of III-nitrides for optoelectronics (e.g. blue LEDs, lasers) and high-speed, high-power electronics. This discovery opens the door to on-chip and on-demand single photon sources integrated with detectors and electronics. Currently, little is known about the underlying defect structure nor is there a sense of how such an emitter might be controllably created. A detailed understanding of the origin of the SPEs in GaN and a path to deterministically introduce them is required. In this project, we develop new experimental capabilities to then investigate single photon emission from GaN nanowires and both GAN and AlN wafers. We ion implant our wafers with the ion implanted with our focused ion beam nanoimplantation capabilities at Sandia, to go beyond typical broad beam implantation and create single photon emitting defects with nanometer precision. We've created light emitting sources using Li + and He + , but single photon emission has yet to be demonstrated. In parallel, we calculate the energy levels of defects and transition metal substitutions in GaN to gain a better understanding of the sources of single photon emission in GaN and AlN. The combined experimental and theoretical capabilities developed throughout this project will enable further investigation into the origins of single photon emission from defects in GaN, AlN, and other wide bandgap semiconductors.

36 MATERIALS SCIENCE↗
DOE OSTI2022

Advanced Heterogeneous Integration Enabled by 3D Freestanding Membranes—From Material Growths to Applications

For the future of electronics such as bioelectronics, 3D integrated electronics, and bendable electronics, the need for flexibility and stackability of electronic products has substantially grown up. However, conventional wafer-based single-crystalline semiconductors cannot catch up with such trends because they are bound to thick rigid wafers such that they are neither flexible nor stackable. Although polymer-based organic electronic materials are more compatible as they are mechanically compliant and less costly than inorganic counterparts, their electronic/photonic performance is substantially inferior to that of single-crystalline inorganic materials. Such performance-mechanical compliance dilemma could be resolved by developing methods to obtain cheap, flexible, stackable, single-crystalline inorganic systems. Such dream electronic systems could be realized by producing single-crystalline freestanding membranes. For the past few decades, various layer transfer techniques (a.k.a layer liftoff techniques) have been developed to produce single-crystalline freestanding membranes. In today's talk, I will present the survey of the layer liftoff techniques and go over how these strategies unlock new ways of manufacturing advanced electronic systems. In addition, I will introduce unprecedented artificial heterostructure devices enabled by stacking of those freestanding 3D material membranes, e.g., the world's smallest vertically-stacked full-color micro-LEDs, the world's best multiferroic devices, chip-less wireless e-skin, and reconfigurable hetero-integrated chips with AI accelerators.

Kim, Jeehwan↗
DOE OSTI2022

Advanced Heterogeneous Integration Enabled by 3D Freestanding Membranes—From Material Growths to Applications

For the future of electronics such as bioelectronics, 3D integrated electronics, and bendable electronics, the need for flexibility and stackability of electronic products has substantially grown up. However, conventional wafer-based single-crystalline semiconductors cannot catch up with such trends because they are bound to thick rigid wafers such that they are neither flexible nor stackable. Although polymer-based organic electronic materials are more compatible as they are mechanically compliant and less costly than inorganic counterparts, their electronic/photonic performance is substantially inferior to that of single-crystalline inorganic materials. Such performance-mechanical compliance dilemma could be resolved by developing methods to obtain cheap, flexible, stackable, single-crystalline inorganic systems. Such dream electronic systems could be realized by producing single-crystalline freestanding membranes. For the past few decades, various layer transfer techniques (a.k.a layer liftoff techniques) have been developed to produce single-crystalline freestanding membranes. In today's talk, I will present the survey of the layer liftoff techniques and go over how these strategies unlock new ways of manufacturing advanced electronic systems. In addition, I will introduce unprecedented artificial heterostructure devices enabled by stacking of those freestanding 3D material membranes, e.g., the world's smallest vertically-stacked full-color micro-LEDs, the world's best multiferroic devices, chip-less wireless e-skin, and reconfigurable hetero-integrated chips with AI accelerators.

Kim, Jeehwan↗
DOE OSTI2023

Sound Assisted Low Temperature Spalling: Upscaling and Throughput

In evaluating the state-of-the-art spalling techniques, the key factor that is missing is the control of crack propagation, which is responsible for low quality wafers due to high surface roughness and Total Thickness Variation, TTV. This project has shown that acoustic waves can alter the conditions at the crack tip during thermal spalling, modifying the propagation speed and the stress field around it (stress intensity factor, K). Both factors are directly related to the roughness of the spalled surface, so as we control speed and stress, we can fine-tune the surface roughness through the entire wafer as suggested by Arakawa.

42 ENGINEERING↗
DOE OSTI2023

Micro-Transfer Printing of Repeaters on Passive Interposer

Silicon-based sensors are central to particle physics experiments and particle tracking detectors. New-generation Large Focal Plane Arrays (LFPAs) cover areas that extend beyond several square meters. Distributing power and transporting data across such areas while maintaining good signal integrity is a complicated challenge. Tiling the detector on an organic interposer would be far too expensive and take too much space while offering little to no advantage regarding signal integrity. Passive silicon interposers are much less expensive and more integrable but would worsen signal integrity because of their inherent higher dielectric constant. Active interposers are a good compromise from the economic and signal integrity standpoint; unfortunately, their yield trends to zero for areas greater than a reticle size, making this technology incompatible with our application. NHanced proposes to duplicate the behavior of a high-yield, low-cost active interposer by printing active microcomponents on a passive interposer with our die-to-wafer micro-transfer printing (MTP) technology. This resolves the signal integrity and power distribution limitations. In Phase I, we designed and simulated analog and digital repeaters to be MTPed onto a passive silicon interposer test wafer.

2.5D↗