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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 559 records · Page 31
All sourcesNASA NTRSDOE OSTI
DOE OSTI2020

Evaluating Interconnection Schemes for Semi-Transparent Perovskite Mini-Modules

This work evaluates the critical issues surrounding P1, P2, and P3 scribing for semi-transparent perovskite module integration. We find that P1 scribing procedures are well-translated from other thin-film technologies. P2 scribing is best performed with a mechanical scribe, but remains a source of series resistance. P3 scribing is found to cause an increase in scribing dead area and a potential degradation source.

degradation↗
DOE OSTI2020

High-density fabric systems interconnected with multi-port aggregated cables

A multi-port aggregated cable includes: a plurality of duplex optical fibers, each duplex optical fiber having a first end and a second end; a first optical interface attached to each of the duplex optical fibers at the first end thereof and defining multiple ports, one for each of the duplex optical fibers, the first optical interface aggregating the duplex optical fibers at the first end thereof; and a second optical interface attached to each of the duplex optical fibers at the second end thereof and defining multiple ports, one for each of the duplex optical fibers, the second optical interface aggregating the duplex optical fibers at the second end thereof.

42 ENGINEERING↗
DOE OSTI2020

Circuit board interconnect decals

A circuit component decal comprising a transparent sheet and an opaque circuit pattern. The transparent sheet includes opposing top and bottom surfaces and a number of edges. The opaque circuit pattern includes an electronic component footprint and a number of circuit lead paths. The electronic component footprint includes a number of contact points representing the location of leads of the electronic component. The circuit lead paths extend from the contact points to the edges of the transparent sheet. The opaque circuit pattern corresponds to only a section of a complete circuit pattern and is configured to block energy from reaching a first portion of the intermediate substrate when the transparent sheet is positioned on the intermediate substrate so as to form the section of the complete circuit pattern.

42 ENGINEERING↗
DOE OSTI2021

Interconnect architecture for three-dimensional processing systems

A processing system includes a plurality of processor cores formed in a first layer of an integrated circuit device and a plurality of partitions of memory formed in one or more second layers of the integrated circuit device. The one or more second layers are deployed in a stacked configuration with the first layer. Each of the partitions is associated with a subset of the processor cores that have overlapping footprints with the partitions. The processing system also includes first memory paths between the processor cores and their corresponding subsets of partitions. The processing system further includes second memory paths between the processor cores and the partitions.

Jayasena, Nuwan S.↗
DOE OSTI2023

Boards having solderless interconnects

This disclosure provides systems, methods, and apparatus related to printed circuit boards. In one aspect, a device includes a first board and a second board. The first board includes at least two pins defined at an end of the first board. The first pin and the second pin are positioned along a first line and parallel to the first line. The second board includes at least two slots defined at an end of the second board. The first slot and the second slot are positioned along a second line and are angled from the second line by about ±10° to 15°. Each of the pins in the first board is engaged with each of the slots in the second board and forms an electrical connection between the first pin and the first slot and the second pin and the second slot.

Wielandt, Stijn↗