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At least 559 records · Page 31

Test of the principle of equivalence by a null gravitational red-shift experiment

A test of the Einstein equivalence principle (EEP) was performed by carrying out a 'null' gravitational red-shift experiment. The experiment compared the rates of a pair of hydrogen maser clocks with those of a set of three superconducting-cavity stabilized oscillator clocks as a function of the solar gravitational potential. If EEP were not valid, the relative rates could vary with potential. During the experiment, the solar potential in the laboratory varied approximately linearly at 3 parts in 10 to the 12th per day because of the earth's orbital motion, and diurnally with an amplitude of 3 parts in 10 to the 13th because of the earth's rotation. An upper limit on the relative frequency variation of 1.7 parts in 100 of the external potential was set. The accuracy was limited by the frequency stability of the clocks and by unmodeled environmental effects. The result is consistent with the EEP at the 2 percent level. The experiment can also be viewed as setting a limit on a possible spatial variation of the fine-structure constant.

Turneaure, J. P.↗

Satellite Time- and Frequency-Transfer System

Time synchronized at distant points within nanosecond. Report describes satellite-borne time-and frequency-transfer system proposed for synchronization of clocks at stations around Earth. Orbiting hydrogen-maser clock and frequency standard communicate by microwave links with Earth stations using hydrogen masers as local clocks. Pulsed-laser time-transfer sub-system also operated concurrently, either synchronized or unsynchronized with microwave subsystems.

Vessot, R. F. C.↗

Maintenance of Time and Frequency in the DSN Using the Global Positioning System

The Deep Space Network must maintain time and frequency within specified limits in order to accurately track the spacecraft engaged in deep space exploration. The DSN has three tracking complexes, located approximately equidistantly around the Earth. Various methods are used to coordinate the clocks among the three complexes. These methods include Loran-C, TV Line 10, very long baseline interferometry (VLBI), and the Global Positioning System (GPS). The GPS is becoming increasingly important because of the accuracy, precision, and rapid availability of the data; GPS receivers have been installed at each of the DSN complexes and are used to obtain daily time offsets between the master clock at each site and UTC(USNO/NBS). Calculations are made to obtain frequency offsets and Allan variances. These data are analyzed and used to monitor the performance of the hydrogen masers that provide the reference frequencies for the DSN frequency and timing system (DFT). A brief history of the GPS timing receivers in the DSN, a description of the data and information flow, data on the performance of the DSN master clocks and GPS measurement system, and a description of hydrogen maser frequency steering using these data are presented.

Clements, P. A.↗

Using GPS and VLBI technology to maintain 14 digit synchronization

To facilitate the navigation of spacecraft to the outer planets, Jupiter and beyond, the JPL-NASA Deep Space Network (DSN) has implemented three ensembles of atomic clocks at widely separated locations. These clocks must be maintained, synchronized, to with a few parts in 10 to the 13th power of each other and, the entire group must be maintained, to a lesser degree, in synchronism with Coordinated Universal Time (UTC)NBS/USNO. Over the last 1 1/2 years the DSN has been using Global Positioning Satellites (GPS) and Very Long Baseline Interferometry (VLBI) technology to perform these critical Frequency and Time (F&T) synchronization tasks. A year of F&T synchronization data collected from the intercomparison of 3 sets of cesium and hydrogen maser driven clock ensembles through the use of GPS and VLBI techniques are covered. Also covered, are some of the problems met and limitations of these two techniques at their present level of technology.

Ward, S. C.↗

Detection of signals by the digital integrate-and-dump filter with offset sampling

The Integrate and Dump Filter (IDF) is used as a matched filter for the detection of signals in additive white Gaussian noise. The performance of the digital integrate and dump filter is evaluated. The case considered is when symbol times are known and the sampling clock is free running at a constant rate, i.e., the sampling clock is not phase locked to the symbol clock. Degradations in the output signal to noise ratio of the digital implementation due to sampling rate, sampling offset, and finite bandwidth, resulting from the anti-aliasing low pass prefilter, are computed and compared with those of the analog counterpart. It is shown that the digital IDF performs within 0.6 dB of the ideal analog IDF whenever the prefilter bandwidth exceeds four times the symbol rate and when sampling is performed at the Nyquist rate. The loss can be reduced to 0.3 dB by doubling the sampling rate, where 0.2 dB loss results from finite bandwidth and 0.1 dB results from the digital IDF.

Sadr, R.↗

Dynamic modelling and estimation of the error due to asynchronism in a redundant asynchronous multiprocessor system

The use of Redundant Asynchronous Multiprocessor System to achieve ultrareliable Fault Tolerant Control Systems shows great promise. The development has been hampered by the inability to determine whether differences in the outputs of redundant CPU's are due to failures or to accrued error built up by slight differences in CPU clock intervals. This study derives an analytical dynamic model of the difference between redundant CPU's due to differences in their clock intervals and uses this model with on-line parameter identification to idenitify the differences in the clock intervals. The ability of this methodology to accurately track errors due to asynchronisity generate an error signal with the effect of asynchronisity removed and this signal may be used to detect and isolate actual system failures.

Huynh, Loc C.↗

Minimizing selective availability error on Topex GPS measurements

GPS measurements made at Topex/Poseidon and the accompanying ground tracking sites will be affected by the selective availability. Although in principle the effects may be removed by differencing between receivers observing the same GPS satellites, this requires accurate synchronization of all receiver clocks. In the case of Topex/Poseidon application, there are two sources of imperfect clock synchronization. The first and larger is due to the constantly drifting clock onboard Topex, which may cause a residual effect as large as 10 cm on Topex carrier phase and 1 m on Topex pseudorange. The second is due to light-time differences between receivers observing the same GPS satellites, which may amount to a few mm error. In this paper a data reduction scheme which incorporates a low-order polynomial interpolation and carrier phase smoothing on pseudorange acquired at Topex and ground receivers is described; a simulation analysis is given demonstrating the effectiveness of the scheme for reducing the GPS S/A effects; and comparison with other schemes is discussed.

Wu, S. C.↗

Geodetic positioning of the Aerospace Electronics Research Lab (ERL) Osborne Time Transfer Receiver (TTR) using the GPS NAVSTAR Block I satellites

Aerospace has routinely processed the Osborne Time Transfer Receiver (TTR) data for the purpose of monitoring the performance of ground and GPS atomic clocks in near real-time with on-line residual displays and characterizing clock stability with Allan Variance calculations. Recently, Aerospace added the ability to estimate the TTR's location by differentially correcting the TTR's location in the WGS84 reference system. This new feature is exercised on a set of TTR clock phase data and Sub-meter accurate station location estimates of the TTR at the Aerospace Electronic Research Lab (ERL) are obtained.

Liu, Anthony S.↗

LASSO, two-way, and GPS time comparisons: A (very) preliminary status report

The first results are presented on the time transfer experiments between TUG (Graz, Austria) and OCA (Grasse, France) using common view Global Positioning System (GPS) and two-way stations at both sites. The present data, providing arms of the clock offsets of 2 to 3 nanoseconds for a three month period, have to be further analyzed before any conclusions on the respective precision and accuracy of these techniques can be drawn. Two years after its start, the Laser Synchronization from Stationary Orbit (LASSO) experiment is finally giving its first results at TUG and OCA. The first analysis of three common sessions permitted researchers to conclude that the LASSO package on board Meteosat P2 is working satisfactorily, and that time transfer using this method should provide clock offsets at better than 1 nanosecond precision, and clock rates at better than 10(exp -12) s/s in a 5 to 10 minutes session. A new method for extracting this information from the raw data sent by LASSO should enhance the performances of this experiment, exploiting the stability of the on-board oscillator.

Veillet, Christian J. L.↗

The Galileo Orbiter - Command and telemetry subsystems on their way to Jupiter

An overview is given of the Galileo command and telemetry subsystems, which exemplify the rigid time-synchronized systems required by TDM (time division multiplexing). The spacecraft clock is examined, along with some of the rationale for the development of the clock structure and timing to give a sense of the design imperatives for rigidly synchronized systems. Additional subjects include the structure of the science and engineering frames, emphasizing the subcommutated structure of the engineering frame and its relationship to the spacecraft clock; ground processing for and basic uses of the telemetry; the various message types used to transmit commands to the spacecraft; and the generation processes for the command message types.

Erickson, James K.↗

Architecture and design of a 500-MHz gallium-arsenide processing element for a parallel supercomputer

The design of the processing element of GASP, a GaAs supercomputer with a 500-MHz instruction issue rate and 1-GHz subsystem clocks, is presented. The novel, functionally modular, block data flow architecture of GASP is described. The architecture and design of a GASP processing element is then presented. The processing element (PE) is implemented in a hybrid semiconductor module with 152 custom GaAs ICs of eight different types. The effects of the implementation technology on both the system-level architecture and the PE design are discussed. SPICE simulations indicate that parts of the PE are capable of being clocked at 1 GHz, while the rest of the PE uses a 500-MHz clock. The architecture utilizes data flow techniques at a program block level, which allows efficient execution of parallel programs while maintaining reasonably good performance on sequential programs. A simulation study of the architecture indicates that an instruction execution rate of over 30,000 MIPS can be attained with 65 PEs.

Fouts, Douglas J.↗

Electronic Control Of Slow Rotations

Digital/analog circuit controls both angular position and speed of rotation of motor shaft with high precision. Locks angular position of motor to phase of rotation-command clock signal at binary submultiple of master clock signal. Circuit or modified version used to control precisely position and velocity of robotic manipulator, to control translation mechanism of crystal-growing furnace, to position hands of mechanical clock, or to control angular position and rate of rotation in any of large variety of rotating mechanisms.

Howard, David E.↗

A formal model of asynchronous communication and its use in mechanically verifying a biphase mark protocol

In this paper we present a formal model of asynchronous communication as a function in the Boyer-Moore logic. The function transforms the signal stream generated by one processor into the signal stream consumed by an independently clocked processor. This transformation 'blurs' edges and 'dilates' time due to differences in the phases and rates of the two clocks and the communications delay. The model can be used quantitatively to derive concrete performance bounds on asynchronous communications at ISO protocol level 1 (physical level). We develop part of the reusable formal theory that permits the convenient application of the model. We use the theory to show that a biphase mark protocol can be used to send messages of arbitrary length between two asynchronous processors. We study two versions of the protocol, a conventional one which uses cells of size 32 cycles and an unconventional one which uses cells of size 18. We conjecture that the protocol can be proved to work under our model for smaller cell sizes and more divergent clock rates but the proofs would be harder.

Moore, J. Strother↗

Parallel variable-band Choleski solvers for computational structural analysis applications on vector multiprocessor supercomputers

A Choleski method used to solve linear systems of equations that arise in large scale structural analyses is described. The method uses a novel variable-band storage scheme and is structured to exploit fast local memory caches while minimizing data access delays between main memory and vector registers. Several parallel implementations of this method are described for the CRAY-2 and CRAY Y-MP computers demonstrating the use of microtasking and autotasking directives. A portable parallel language, FORCE, is also used for two different parallel implementations, demonstrating the use of CRAY macrotasking. Results are presented comparing the matrix factorization times for three representative structural analysis problems from runs made in both dedicated and multi-user modes on both the CRAY-2 and CRAY Y-MP computers. CPU and wall clock timings are given for the various parallel methods and are compared to single processor timings of the same algorithm. Computation rates over 1 GIGAFLOP (1 billion floating point operations per second) on a four processor CRAY-2 and over 2 GIGAFLOPS on an eight processor CRAY Y-MP are demonstrated as measured by wall clock time in a dedicated environment. Reduced wall clock times for the parallel methods relative to the single processor implementation of the same Choleski algorithm are also demonstrated for runs made in multi-user mode.

Poole, E. L.↗

Solution to the indexing problem of frequency domain simulation experiments

A frequency domain simulation experiment is one in which selected system parameters are oscillated sinusoidally to induce oscillations in one or more system statistics of interest. A spectral (Fourier) analysis of these induced oscillations is then performed. To perform this spectral analysis, all oscillation frequencies must be referenced to a common, independent variable - an oscillation index. In a discrete-event simulation, the global simulation clock is the most natural choice for the oscillation index. However, past efforts to reference all frequencies to the simulation clock generally yielded unsatisfactory results. The reason for these unsatisfactory results is explained in this paper and a new methodology which uses the simulation clock as the oscillation index is presented. Techniques for implementing this new methodology are demonstrated by performing a frequency domain simulation experiment for a network of queues.

Mitra, Mousumi↗

Real-time processor for staring receivers

The design, fabrication, and testing of a state-of-the-art, high-throughput on-focal plane IR-image signal processor is described. The processing functions performed are frame differencing and thresholding. The final focal plane array will consist of a 128 x 128-pixel platinum-silicide detector bump-mounted to an on-chip CCD multiplexer. The processor is in a 128-channel parallel-pipeline format. Each channel consists of a pixel regenerator (charge differencer), 128-pixel frame store CCD memory, pixel differencer, second pixel regenerator, thresholder (analog comparator), and digital latch. Four parallel analog outputs and four parallel digital outputs are included. The digital outputs provide a bit map of the image. All analog clock signals (128 KHz, 256 KHz, and 5 MHz) are generated by on-chip TTL-input clock drivers. TTL clock driver inputs are generated off-chip. The technology is low-temperature surface and buried channel CCD/CMOS/indium bump. The design goal was 8-bit resolution at 77 K and 1000 frames/s. Applications include point- or extended-target motion detection with thresholding. Design trade-offs and enhancements (such as on-chip detector gain compensation and a simple window processor) are discussed.

Hanzal, Brian↗

PTTI-aided ephemeris calculation and rapid data link acquisition for manned space flight

Complexity of future manned space flight mission control can be significantly reduced by integrating GPS, the PTTI source, into telemetry, tracking, and command (TT&C). Future telecommunications, space tracking electronic intelligence, metrology, navigation, and data acquisition will thereby be served, including: on-board ephemeris determination, reduced synchronization time for time division multiple access (TDMA) links, and in-flight clock calibration, increasing on-board autonomy and reducing ground support costs. Manned space transportation through the first quarter of the 21st century will probably depend on a mix of vehicles, including the Advanced Manned Launch System (AMLS), the Personnel Launch System (PLS), and continued use of the Shuttle Fleet. Precise Ephemeris is important on-board for mission success, status monitoring, also for rendezvous and docking. Use of GPS can eliminate ground based tracking/processing, enhancing autonomy and reducing communications bandwidth. GPS time can simplify complicated functions used in bandwidth efficient time division multiple access (TDMA) communications, such as: precise and realtime synchronization of receive reference timing, transmit-timing and acquisition control, unique synchronization word (UW) detection, and elastic buffering. High clock accuracy provides increased signal-to-noise (S/N) ratio during acquisition, permitting narrower acquisition frequency and time windows. Spaceborne systems requirements to provide capabilities such as: refinement of the GEM-72 gravity model based on satellite tracking observations from ATS-6 to GEOS-3, relativistic clock experiments, NASA crustal dynamics program for developing space geodetic techniques to study the earth's crust, its gravity field, and earthquake mechanisms, and multi-disciplinary space geodetic tracking for studying global climatic changes are also reviewed.

Anderman, Alfred↗

High accuracy switched-current circuits using an improved dynamic mirror

The switched-current technique, a recently developed circuit approach to analog signal processing, has emerged as an alternative/compliment to the well established switched-capacitor circuit technique. High speed switched-current circuits offer potential cost and power savings over slower switched-capacitor circuits. Accuracy improvements are a primary concern at this stage in the development of the switched-current technique. Use of the dynamic current mirror has produced circuits that are insensitive to transistor matching errors. The dynamic current mirror has been limited by other sources of error including clock-feedthrough and voltage transient errors. In this paper we present an improved switched-current building block using the dynamic current mirror. Utilizing current feedback the errors due to current imbalance in the dynamic current mirror are reduced. Simulations indicate that this feedback can reduce total harmonic distortion by as much as 9 dB. Additionally, we have developed a clock-feedthrough reduction scheme for which simulations reveal a potential 10 dB total harmonic distortion improvement. The clock-feedthrough reduction scheme also significantly reduces offset errors and allows for cancellation with a constant current source. Experimental results confirm the simulated improvements.

Zweigle, G.↗