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At least 559 records · Page 31

Payload Performance of Third Generation TDRS and Future Services

NASA has accepted two of the 3rd generation Tracking and Data Relay Satellites, TDRS K, L, and M, designed and built by Boeing Defense, Space & Security (DSS). TDRS K, L, and M provide S-band Multiple Access (MA) service and S-band, Ku-band and Ka-band Single Access (SA) services to near Earth orbiting satellites. The TDRS KLM satellites offer improved services relative to the 1st generation TDRS spacecraft, such as: an enhanced MA service featuring increased EIRPs and G/T; and Ka-band SA capability which provides a 225 and 650 MHz return service (customer-to-TDRS direction) bandwidth and a 50 MHz forward service (TDRS-to-customer direction) bandwidth. MA services are provided through a 15 element forward phased array that forms up to two beams with onboard active beamforming and a 32 element return phased array supported by ground-based beamforming. SA services are provided through two 4.6m tri-band reflector antennas which support program track pointing and autotrack pointing. Prior to NASAs acceptance of the satellites, payload on-orbit testing was performed on each satellite to determine on-orbit compliance with design requirements. Performance parameters evaluated include: EIRP, G/T, antenna gain patterns, SA antenna autotrack performance, and radiometric tracking performance. On-orbit antenna calibration and pointing optimization was also performed on the MA and SA antennas including 24 hour duration tests to characterize and calibrate out diurnal effects. Bit-Error-Rate (BER) tests were performed to evaluate the end-to-end link BER performance of service through a TDRS K and L spacecraft. The TDRS M is planned to be launched in August 2017. This paper summarizes the results of the TDRS KL communications payload on-orbit performance verification and end-to-end service characterization and compares the results with the performance of the 2nd generation TDRS J. The paper also provides a high-level overview of an optical communications application that will augment the data rates supported by the Space Network.

RF↗

Payload Performance of TDRS KL and Future Services

NASA has accepted two of the 3nd generation Tracking and Data Relay Satellites, TDRS K, L, and M, designed and built by Boeing Defense, Space Security (DSS). TDRS K, L, and M provide S-band Multiple Access (MA) service and S-band, Ku-band and Ka-band Single Access (SA) services to near Earth orbiting satellites. The TDRS KLM satellites offer improved services relative to the 1st generation TDRS spacecraft, such as: an enhanced MA service featuring increased EIRPs and GT; and Ka-band SA capability which provides a 225 and 650 MHz return service (customer-to-TDRS direction) bandwidth and a 50 MHz forward service (TDRS-to-customer direction) bandwidth. MA services are provided through a 15 element forward phased array that forms up to two beams with onboard active beamforming and a 32 element return phased array supported by ground-based beamforming. SA services are provided through two 4.6m tri-band reflector antennas which support program track pointing and autotrack pointing. Prior to NASAs acceptance of the satellites, payload on-orbit testing was performed on each satellite to determine on-orbit compliance with design requirements. Performance parameters evaluated include: EIRP, GT, antenna gain patterns, SA antenna autotrack performance, and radiometric tracking performance. On-orbit antenna calibration and pointing optimization was also performed on the MA and SA antennas including 24 hour duration tests to characterize and calibrate out diurnal effects. Bit-Error-Rate (BER) tests were performed to evaluate the end-to-end link BER performance of service through a TDRS K and L spacecraft. The TDRS M is planned to be launched in August 2017. This paper summarizes the results of the TDRS KL communications payload on-orbit performance verification and end-to-end service characterization and compares the results with the performance of the 2nd generation TDRS J. The paper also provides a high-level overview of an optical communications application that will augment the data rates supported by the Space Network.

Laser↗

Laboratory characterization of silicon avalanche photodiodes (APD) for pulse position modulation (PPM) detection

Two commercially available large area silicon avalanche photodiodes (APD) were characterized in the laboratory. Specifically, the response of the APD’s to a sequence of 8-bit pulse position modulated (256-PPM) laser pulses, with and without background noise, was recorded and stored for post analysis. Empirical probability distribution functions (pdf) were constructed from the signal and noise slot data and compared to pdf’s predicted by an analytical model based on Webb/Gaussian statistics. The limited pulse sequence was also used to generate bit-error rate (BER) versus signal photons per pulse values, albeit with large error bars. These BER measurements were also compared to results predicted using the Gaussian and Webb/Gaussian models for APD channel statistics. While the measurements qualitatively reflect features predicted by theory, significant quantitative deviations are displayed between the measurements and theory. The source of these discrepancies is not currently well understood, but it is surmised that inaccurate knowledge of detector parameters such as gain and noise equivalent temperature models may explain the discrepancies.

Biswas, A.↗

Coherent optical array receiver experiment : design, implementation and BER performance of a multichannel coherent optical receiver for PPM signals under atmospheric turbulence

The performance of a coherent free-space optical communication system operating in the presence of turbulence is investigated. Maximum Likelihood Detection techniques are employed to optimally detect Pulse Position Modulated signals with a focal-plane detector array, and reconstruct the turbulence-degraded signals. The experimental demonstration of this project and results may be divided in three parts; two of which have already been explained in previous publications (1,2). This latest paper shows the final experimental results, including investigation of performance of the Coherent Optical Receiver Experiment (CORE) performed at the laboratory facilities at JPL. Bit Error Rate (BER) is presented for single and multichannel optical receivers, where quasi-shot noise limited performance is achieved, under simulated turbulence conditions using non-coherent post-detection processing techniques.

Hassibi, Babak↗

In-flight observations of multiple-bit upset in DRAMs

In-flight data is examined showing a very high incidence of multiple-bit errors in a solid-state recorder that incorporates error detection and correction. The high MBU rate is shown to be a consequence of the physical selection of memory cell locations in the recorder architecture.

single↗

Statistical optical link budget analysis

In this paper, we describe work on extending statistical analysis methods to optical communications links, with a primary focus on intensity modulated, direct detected photon-counting channel utilizing pulse-position-modulation (PPM). We performed analysis on the relationship between bit error rate (BER) requirement, statistical characteristics of the received signal power and noise power, and the coded performance curves. We presented link analysis results with preliminary uncertainty quantifications of signal power and noise power. We used the Consultative Committee for Space Data Systems (CCSDS) Serially Concatenated convolutionally coded Pulse Position Modulation (SCPPM) prototype software [1] to obtain coded performance curves under different operating conditions with varying signal power, background noise power, code rates,and PPM modulation orders. Comparison with traditional, deterministic analysis shows that extra margin needs to be reserved to compensate for the performance losses caused by uncertainties of the link parameters.

Cheung, Kar-Ming↗

Q4 – A CubeSat Mission to Demonstrate Omnidirectional Optical Communications

We are proposing a technology demonstration mission for JPL’s Inter-Satellite Optical Communicator (ISOC). The ISOC has the potential to enable up to 1 Gbps data rates over a distance up to 200 km in free space. Key features of the ISOC include full sky coverage and the ability to maintain multiple links simultaneously. The Q4 mission consists of (4) 6U CubeSats furnished with ISOCs to demonstrate high data rate communications among the spacecraft. More specifically, we seek to demonstrate the omnidirectionality of the ISOC by providing simultaneous optical links between one spacecraft and the other three. Q4 will be a demonstrator for small spacecraft swarm capabilities. Following a proposed deployment from the ISS, the CubeSats will utilize their onboard thrusters to enter their desired orbit. The orbit consists of one “leader” spacecraft in a circular orbit with a 400 km LEO altitude and three “follower” spacecraft in slightly elliptical orbits rotating azimuthally about the leader. The main mission will consist of three consecutive phases: First, the spacecraft will demonstrate pointing, acquisition, and tracking using newly developed protocols. Next, link establishment and different channel access methods (CDMA and TDMA) will be tested. Finally, Delay Tolerant Network protocols will be implemented to allow fast data sharing among the spacecraft. The distance between the communicating spacecraft will be increased as the mission progresses to characterize the link quality as a function of distance. All communications over the course of the mission will be recorded and analyzed on the ground using bit error rate as a metric for success. The current design for each the four Q4 CubeSats contains an XACT advanced ADCS system for precision beam pointing. Other components currently under consideration include MiPS cold gas thrusters for orbital maneuvering and gimbaled eHaWK 84W solar arrays. In this paper we present design considerations for the Q4 CubeSats, link budget calculations, results from preliminary mission analysis, and expected results.

Velazco, Jose E↗

Development of a Deployable Opitcal Aperature

The Deployable Optical Receive Aperture (DORA),a new technology being developed jointly between JetPropulsion Laboratory (JPL) and Arizona State University(ASU), is based on deploying arrays of fast optical detectors tocreate large receive apertures and seeks to achieve gigabitconnectivity at distances of thousands of kilometers. Smallspacecraft forming the LunaNet communications network andequipped with optical communications systems, such as theproposed DORA aperture, should be able to communicate atGigabit per second rates over long distances. This data rateenhancement can allow gigabit per second connectivitybetween lunar assets (astronauts, rovers, instruments) and thelunar gateway. Under sponsorship of NASA's Small SpacecraftTechnology Program (SSTP), JPL is deploying the DORApayload and ASU is developing a 3U CubeSat for a follow-onlow-Earth-orbit (LEO) mission to demonstrate DORA'scapabilities. The basic DORA payload consists of 5 receiverpanels, a transmitting telescope and processing units. Eachreceiver panel contains dozens of power-combined detectors tomimic a large optical aperture. The total receive aperture ofDORA is provided by the sum of the effective detecting area ofthe 5 panels. The transmit telescope includes a 200mW, 850nmlaser and a voice-coil fast steering mirror (FSM). The resultingDORA terminal should be able to provide duplex connectivityat rates up to 1 gigabit per second at the distances of interest.We have designed the entire DORA payload and plan topresent the test results of our DORA engineering model. Theseresults include angle-of-arrival, data rate and bit error ratemeasurements.

Yi, Lin↗

The design and test results of A Giga-Bit Cable Receiver (GBCR) for the ATLAS Inner Tracker Pixel Detector

This paper presents the design and test results of a Gigabit Cable Receiver ASIC called GBCR for the HL-LHC upgrade of the ATLAS Inner Tracker (ITk) pixel detector. Three prototypes (GBCR1, GBCR2, and GBCR3) have been designed in the CERN-identified 65 nm CMOS technology. GBCR receives seven (GBCR2) or six (GBCR3) channels (RX) each at 1.28 Gbps from the front-end readout chip RD53B via flex cables up to 1 meter and Twinax cables up to 5 meters and sends the equalized and retimed signals to lpGBT. Both GBCR2 and GBCR3 ASICs have two transmitting channels (TX) that pre-emphasize the signals from lpGBT before sending them to RD53B through the same cables. No Single-Event Upset (SEU) is observed in any tested channels of GBCR2 in a 400 MeV proton beam. The extrapolated bit error rate for the future HL-LHC application is below 8*10^(-16), significantly below the specified BER criterion. GBCR3 is designed to improve the immunity to single-event-upset by applying the Triple Modular Redundancy (TMR) technology to all RX channels. The retimed signals from GBCR3 have less total jitter than those from GBCR2 (35 ps versus 79 ps). Each receiver channel of GBCR3 consumes 75% more power than that of GBCR2.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗

Error detection and correction unit with built-in self-test capability for spacecraft applications

The objective of this project was to research and develop a 32-bit single chip Error Detection and Correction unit capable of correcting all single bit errors and detecting all double bit errors in the memory systems of a spacecraft. We designed the 32-bit EDAC (Error Detection and Correction unit) based on a modified Hamming code and according to the design specifications and performance requirements. We constructed a laboratory prototype (breadboard) which was converted into a fault simulator. The correctness of the design was verified on the breadboard using an exhaustive set of test cases. A logic diagram of the EDAC was delivered to JPL Section 514 on 4 Oct. 1988.

Timoc, Constantin↗

Construction of bias-preserving operations for pair-cat codes

Fault-tolerant quantum computation with depolarization error often requires demanding error threshold and resource overhead. If the operations can maintain high noise bias—dominated by dephasing error with small bit-flip error—we can achieve hardware-efficient fault-tolerant quantum computation with a more favorable error threshold. Distinct from two-level physical systems, multilevel systems (such as harmonic oscillators) can achieve a desirable set of bias-preserving quantum operations while using continuous engineered dissipation or Hamiltonian protection to stabilize to the encoding subspace. For example, cat codes stabilized with driven-dissipation or Kerr nonlinearity can possess a set of bias-preserving gates while continuously correcting bosonic dephasing error. However, cat codes are not compatible with continuous quantum error correction against excitation loss error, because it is challenging to continuously monitor the parity to correct photon loss errors. In this work, we generalize the bias-preserving operations to pair-cat codes, which can be regarded as a multimode generalization of cat codes, to be compatible with continuous quantum error correction against both bosonic loss and dephasing errors. In conclusion, our results open the door towards hardware-efficient robust quantum information processing with both bias-preserving operations and continuous quantum error correction simultaneously correcting bosonic loss and dephasing errors.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗

TID, SEE and radiation induced failures in advanced flash memories

We report on TID and SEE tests of multi-level and higher density flash memories. Stand-by currents and functionality tests were used to characterize the response of radiation-induced failures. The radiation-induced failures can be categorized as followings: SEU read errors during irradiation, stuck-bit read errors verified post-irradiation, write errors, erase failures, multiple upsets, and single-event latch up.

Scheick, Leif Z.↗

Cascade Error Projection with Low Bit Weight Quantization for High Order Correlation Data

In this paper, we reinvestigate the solution for chaotic time series prediction problem using neural network approach. The nature of this problem is such that the data sequences are never repeated, but they are rather in chaotic region. However, these data sequences are correlated between past, present, and future data in high order. We use Cascade Error Projection (CEP) learning algorithm to capture the high order correlation between past and present data to predict a future data using limited weight quantization constraints. This will help to predict a future information that will provide us better estimation in time for intelligent control system. In our earlier work, it has been shown that CEP can sufficiently learn 5-8 bit parity problem with 4- or more bits, and color segmentation problem with 7- or more bits of weight quantization. In this paper, we demonstrate that chaotic time series can be learned and generalized well with as low as 4-bit weight quantization using round-off and truncation techniques. The results show that generalization feature will suffer less as more bit weight quantization is available and error surfaces with the round-off technique are more symmetric around zero than error surfaces with the truncation technique. This study suggests that CEP is an implementable learning technique for hardware consideration.

Duong, Tuan A.↗

Method and apparatus for decoding compatible convolutional codes

This invention relates to learning decoders for decoding compatible convolutional codes. The decoder decodes signals which have been encoded by a convolutional coder and allows performance near the theoretical limit of performance for coded data systems. The decoder includes a sub-bit shift register wherein the received sub-bits are entered after regeneration and shifted in synchronization with a clock signal recovered from the received sub-bit stream. The received sub-bits are processed by a sub-bit decision circuit, entered into a sub-bit shift register, decoded by a decision circuit, entered into a data shift register, and updated to reduce data errors. The bit decision circuit utilizes stored sub-bits and stored data bits to determine subsequent data-bits. Data errors are reduced by using at least one up-date circuit.

Doland, G. D.↗

Short-Block Protograph-Based LDPC Codes

Short-block low-density parity-check (LDPC) codes of a special type are intended to be especially well suited for potential applications that include transmission of command and control data, cellular telephony, data communications in wireless local area networks, and satellite data communications. [In general, LDPC codes belong to a class of error-correcting codes suitable for use in a variety of wireless data-communication systems that include noisy channels.] The codes of the present special type exhibit low error floors, low bit and frame error rates, and low latency (in comparison with related prior codes). These codes also achieve low maximum rate of undetected errors over all signal-to-noise ratios, without requiring the use of cyclic redundancy checks, which would significantly increase the overhead for short blocks. These codes have protograph representations; this is advantageous in that, for reasons that exceed the scope of this article, the applicability of protograph representations makes it possible to design highspeed iterative decoders that utilize belief- propagation algorithms.

Divsalar, Dariush↗

Magellan Recorder Data Recovery Algorithms

This paper describes algorithms implemented by the Magellan High Rate Processor to recover radar data corrupted by the failure of an onboard tape recorder that dropped bits. For data with error correction coding, an algorithm was developed that decodes data in the presence of bit errors and missing bits.

Error↗