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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 541 records · Page 30

Producing Silicon Carbide/Silicon Nitride Fibers

Manufacturing process makes CxSiyNz fibers. Precursor fibers spun from extruding machine charged with polycarbosilazane resin. When pyrolyzed, resin converted to cross-linked mixture of silicon carbide and silicon nitride, still in fiber form. CxSiyNz fibers promising substitutes for carbon fibers in high-strength, low-weight composites where high electrical conductivity unwanted.

Source record↗

Solar-grade silicon prepared by carbothermic reduction of silica

An advanced carbothermic reduction (ACR) process was developed to produce solar grade (SC) silicon from high purity silica and carbon. Preparation of starting materials and operation of the arc furnace to product high purity silicon is described. Solar cells prepared from single crystal SG-Si had efficiencies of up to 12.3% practically identical to cells made from electronic grade silicon. The ACR process is not in the pilot stage for further evaluation.

Aulich, H. A.↗

Fabrication of a Silicon Nanowire on a Bulk Substrate by Use of a Plasma Etching and Total Ionizing Dose Effects on a Gate-All-Around Field-Effect Transistor

The gate all around transistor is investigated through experiment. The suspended silicon nanowire for the next generation is fabricated on bulk substrate by plasma etching method. The scallop pattern generated by Bosch process is utilized to form a floating silicon nanowire. By combining anisotropic and istropic silicon etch process, the shape of nanowire is accurately controlled. From the suspended nanowire, the gate all around transistor is demonstrated. As the silicon nanowire is fully surrounded by the gate, the device shows excellent electrostatic characteristics.

Transistor↗

Effect of localization on photoluminescence and zero-field splitting of silicon color centers

The study of defect centers in silicon has been recently reinvigorated by their potential applications in optical quantum information processing. A number of silicon defect centers emit single photons in the telecommunication O-band, making them promising building blocks for quantum networks between computing nodes. The two-carbon G-center, self-interstitial W-center, and spin-1/2 T-center are the most intensively studied silicon defect centers, yet despite this, there is no consensus on the precise configurations of defect atoms in these centers, and their electronic structures remain ambiguous. Here, in this work, we employ ab initio density functional theory to characterize these defect centers, providing insight into the relaxed structures, band structures, and photoluminescence spectra, which are compared to experimental results. Motivation is provided for how these properties are intimately related to the localization of electronic states in the defect centers. In particular, we present the calculation of the zero-field splitting for the excited triplet state of the G-center defect as the structure is linearly interpolated from the A-configuration to the B-configuration, showing a sudden increase in the magnitude of the D zz component of the zero-field-splitting tensor. By performing projections onto the local orbital states of the defect, we analyze this transition in terms of the symmetry and bonding character of the G-center defect, which sheds light on its potential application as a spin-photon interface.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗

Area Reports. Advanced materials and devices research area. Silicon materials research task, and advanced silicon sheet task

The objectives of the Silicon Materials Task and the Advanced Silicon Sheet Task are to identify the critical technical barriers to low-cost silicon purification and sheet growth that must be overcome to produce a PV cell substrate material at a price consistent with Flat-plate Solar Array (FSA) Project objectives and to overcome these barriers by performing and supporting appropriate R&D. Progress reports are given on silicon refinement using silane, a chemical vapor transport process for purifying metallurgical grade silicon, silicon particle growth research, and modeling of silane pyrolysis in fluidized-bed reactors.

Source record↗

Degradation of the lunar vacuum by a moon base

Several industrial processes requiring high and ultra-high vacuum similar to the lunar vacuum are outlined. The effects of a 20-person lunar base and a 250-person industrial facility on this vacuum are discussed. It is shown that exhaust from transport spacecraft and leakage from the habitat will be comparable to the daytime gas pressure for the 20-person base, and will degrade the vacuum to the range of 2 x 10 to the -9th torr for the use of 250-person facility. This will result in replacing the mostly nonreactive gases hydrogen, helium, and neon with more reactive gases containing carbon and oxygen. This vacuum is still good enough to perform many important vacuum processes such as plasma-deposition of amorphous silicon for solar cells, but processes such as molecular beam epitaxy or locating an intersecting beam accelerator on the moon will require additional vacuum pumping.

Landis, Geoffrey↗

Simulated Space Environment Effects on Tether Materials with Protective Coatings

Atomic oxygen (AO) erodes most organic materials. and ultraviolet radiation embrittles polymers. A previous study indicated untreated polymers such as ultra-high molecular weight polyethylene (UHMWPE) are severely degraded when exposed to AO. This test series was performed to determine the effect of AO and UV on the mechanical integrity of tether materials that were treated with AO-protective coatings. Three coating systems were evaluated for their ability to protect the underlying material from AO erosion. The first coating system is the Photosil surface modification process which incorporates silicon-containing functional groups into the top micron of an organic material. The Photosil process has had favorable results with polyurethane- and epoxy-based thermal control coatings . The second coating system is metallization, in this case nickel. The third coating system is silsesquioxane. The Marshall Space Flight Center Atomic Oxygen Beam Facility (AOBF) was used to simulate low Earth orbit AO of 5 eV energy. In addition, some tether samples were exposed to ultraviolet radiation then evaluated for any changes in mechanical strength. Tether missions, such as a momentum-exchange/electrodynamic reboost (MXER) tether, may benefit from this research.

Finckenor, Miria M.↗

Aluminum-Silicon Alloy Having Improved Properties At Elevated Temperatures and Process for Producing Cast Articles Therefrom

A process for making a cast article from an aluminum alloy includes first casting an article from an alloy having the following composition, in weight percent: Silicon 11.0-14.0, Copper 5.6-8.0, Iron 0-0.8, Magnesium 0.5-1.5, Nickel 0.05-0.9, Manganese 0-1.0, Titanium 0.05-1.2, Zirconium 0.12-1.2, Vanadium 0.05-1.2, Zinc 0.05-0.9, Strontium 0.001-0.1, Aluminum balance . In this alloy the ratio of silicon to magnesium is 10 to 25, and the ratio of copper to magnesium is 4 to 15. After an article is cast from the alloy, the cast article is aged at a temperature within the range of 400F to 500F for a time period within the range of four to 16 hours. It has been found especially advantageous if the cast article is first exposed to a solutionizing step prior to the aging step. This solutionizing step is carried out by exposing the cast article to a temperature within the range of 900F to 1000F for a time period of fifteen minutes to four hours. It has also been found to be especially advantageous if the solutionizing step is followed directly with a quenching step, wherein the cast article is quenched in a quenching medium such as water at a temperature within the range of 120F to 300F. The resulting cast article is suitable in a number of high temperature applications, such as heavy-duty pistons for internal combustion engines.

Lee, Jonathan A.↗

Rapid Selective Annealing of Cu Thin Films on Si Using Microwaves

A major goal of the semiconductor indurstry is to lower the processing temperatures needed for interconnects in silicon integrated circuits. Typical rapid thermal annealing processes heat the film as well as the substrate, creating device problems.

silicon integrated circuits microwave thin films↗

One-Pot Coating of Ceramic Powders by Exfoliated Boron Nitride Layers with a Dense CO 2 Medium and Ultrasound-Aided Mixing

The coating or doping of substrates by two-dimensional materials to impart superior functional properties (such as improved thermal conductivity, bacterial resistance, reduced friction) is receiving increased attention. Environmentally benign, rapid and scalable coating techniques are desirable for this purpose. Here, we report a novel process for coating alumina, silicon carbide and boron carbide substrates with hexagonal boron nitride (h-BN) layers. The process consists of two sequential steps. First, h-BN layers are exfoliated from bulk h-BN in supercritical carbon dioxide (scCO 2 ) using ultrasound-aided mixing. This step is followed by self-assembly (i.e., coating) of the exfoliated h-BN on the substrates in liquid CO 2 also aided by ultrasound. The liquid CO 2 state is achieved by simply lowering the pressure and temperature of the first step below the critical point of CO 2 (P c = 72.8 atm; T c = 31.1 °C). Scanning electron microscopy (SEM) and energy dispersive spectroscopy (EDS) micrographs clearly reveal the exfoliation of h-BN under scCO 2 conditions as well as the h-BN assembly on various substrates under liquid CO 2 conditions. X-ray diffraction patterns confirm the structural integrity of the coated h-BN layers. It was also confirmed that without a transition to the liquid CO 2 phase following exfoliation in scCO 2 , there was negligible coating of h-BN on the substrates. Researchers in the field could consider this benign process to rapidly coat or dope materials with h-BN and other 2D materials to impart improved functional properties in myriad applications.

37 INORGANIC, ORGANIC, PHYSICAL, AND ANALYTICAL CH↗

Nanotip Carpets as Antireflection Surfaces

Carpet-like random arrays of metal-coated silicon nanotips have been shown to be effective as antireflection surfaces. Now undergoing development for incorporation into Sun sensors that would provide guidance for robotic exploratory vehicles on Mars, nanotip carpets of this type could also have many uses on Earth as antireflection surfaces in instruments that handle or detect ultraviolet, visible, or infrared light. In the original Sun-sensor application, what is required is an array of 50-micron-diameter apertures on what is otherwise an opaque, minimally reflective surface, as needed to implement a miniature multiple-pinhole camera. The process for fabrication of an antireflection nanotip carpet for this application (see Figure 1) includes, and goes somewhat beyond, the process described in A New Process for Fabricating Random Silicon Nanotips (NPO-40123), NASA Tech Briefs, Vol. 28, No. 1 (November 2004), page 62. In the first step, which is not part of the previously reported process, photolithography is performed to deposit etch masks to define the 50-micron apertures on a silicon substrate. In the second step, which is part of the previously reported process, the non-masked silicon area between the apertures is subjected to reactive ion etching (RIE) under a special combination of conditions that results in the growth of fluorine-based compounds in randomly distributed formations, known in the art as "polymer RIE grass," that have dimensions of the order of microns. The polymer RIE grass formations serve as microscopic etch masks during the next step, in which deep reactive ion etching (DRIE) is performed. What remains after DRIE is the carpet of nano - tips, which are high-aspect-ratio peaks, the tips of which have radii of the order of nanometers. Next, the nanotip array is evaporatively coated with Cr/Au to enhance the absorption of light (more specifically, infrared light in the Sun-sensor application). The photoresist etch masks protecting the apertures are then removed by dipping the substrate into acetone. Finally, for the Sun-sensor application, the back surface of the substrate is coated with a 57-nm-thick layer of Cr for attenuation of sunlight.

Bae, Youngsam↗

Metal-assisted etch combined with regularizing etch

In an aspect of the disclosure, a process for forming nanostructuring on a silicon-containing substrate is provided. The process comprises (a) performing metal-assisted chemical etching on the substrate, (b) performing a clean, including partial or total removal of the metal used to assist the chemical etch, and (c) performing an isotropic or substantially isotropic chemical etch subsequently to the metal-assisted chemical etch of step (a). In an alternative aspect of the disclosure, the process comprises (a) performing metal-assisted chemical etching on the substrate, (b) cleaning the substrate, including removal of some or all of the assisting metal, and (c) performing a chemical etch which results in regularized openings in the silicon substrate.

36 MATERIALS SCIENCE↗

Photophysics of Intrinsic Single‐Photon Emitters in Silicon Nitride at Low Temperatures

A robust process for fabricating intrinsic single-photon emitters in silicon nitride is recently established. These emitters show promise for quantum applications due to room-temperature operation and monolithic integration with technologically mature silicon nitride photonics platforms. Here, the fundamental photophysical properties of these emitters are probed through measurements of optical transition wavelengths, linewidths, and photon antibunching as a function of temperature from 4.2 to 300 K. Important insight into the potential for lifetime-limited linewidths is provided through measurements of inhomogeneous and temperature-dependent broadening of the zero-phonon lines. At 4.2 K, spectral diffusion is found to be the main broadening mechanism, while spectroscopy time series reveal zero-phonon lines with instrument-limited linewidths.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗

Delta-Doping at Wafer Level for High Throughput, High Yield Fabrication of Silicon Imaging Arrays

Systems and methods for producing high quantum efficiency silicon devices. A silicon MBE has a preparation chamber that provides for cleaning silicon surfaces using an oxygen plasma to remove impurities and a gaseous (dry) NH3 + NF3 room temperature oxide removal process that leaves the silicon surface hydrogen terminated. Silicon wafers up to 8 inches in diameter have devices that can be fabricated using the cleaning procedures and MBE processing, including delta doping.

Hoenk, Michael E.↗

High Input Voltage Discharge Supply for High Power Hall Thrusters Using Silicon Carbide Devices

A power processing unit for a 15 kW Hall thruster is under development at NASA Glenn Research Center. The unit produces up to 400 VDC with two parallel 7.5 kW discharge modules that operate from a 300 VDC nominal input voltage. Silicon carbide MOSFETs and diodes were used in this design because they were the best choice to handle the high voltage stress while delivering high efficiency and low specific mass. Efficiencies in excess of 97 percent were demonstrated during integration testing with the NASA-300M 20 kW Hall thruster. Electromagnet, cathode keeper, and heater supplies were also developed and will be integrated with the discharge supply into a vacuum-rated brassboard power processing unit with full flight functionality. This design could be evolved into a flight unit for future missions that requires high power electric propulsion.

Electric Propulsion↗

Structurally stable, thin silicon solar cells

A fabrication process for structurally stable thin solar cell wafers that produce good power output after irradiation is described. The fabrication process is as follows. A 6 mil, circular wafer is oxidized on both sides. One side is then patterned with a rectangular array of holes in the oxide that are nominally 75 mils square and separated by 2 mil spacings. Wells are then etched into the silicon with KOH to a depth of 4 mils, leaving a 2 mil, unetched thickness. Two areas on the surface are left unetched to provide pads for bonding or testing. All oxide is then removed and the rest of the processing is normal; the unetched face is used as the illuminated face. When all other processing is complete, a 2 X 2 cm cell is sawed from the starting wafer leaving a border that is approximately 10 mils wide. The effective thickness, determined by weighing an unmetallized sample, of such a cell is about 2.4 mil.

Arndt, R. A.↗