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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 541 records · Page 30

Fault tolerant onboard packet switch architecture for communication satellites: Shared memory per beam approach

The NASA Lewis Research Center is developing a multichannel communication signal processing satellite (MCSPS) system which will provide low data rate, direct to user, commercial communications services. The focus of current space segment developments is a flexible, high-throughput, fault tolerant onboard information switching processor. This information switching processor (ISP) is a destination-directed packet switch which performs both space and time switching to route user information among numerous user ground terminals. Through both industry study contracts and in-house investigations, several packet switching architectures were examined. A contention-free approach, the shared memory per beam architecture, was selected for implementation. The shared memory per beam architecture, fault tolerance insertion, implementation, and demonstration plans are described.

Shalkhauser, Mary JO↗

In situ investigation of stress-induced martensitic transformation in granular shape memory ceramic packings

Stress-induced martensitic transformation can occur in granular shape memory materials when individual particles experience high stresses and transform from a high-symmetry austenite phase to a low-symmetry martensite phase. This involves a highly heterogeneous distribution of the driving force and very low mechanical constraint for martensite nucleation, so the transformation behavior can be dramatically different from the well-documented case of monolithic solids. In this work, we investigate the stress-induced martensitic transformation in granular shape memory ceramic packings, which consist of single-crystal micro-particles of ZrO 2 -12 at%CeO 2 and ZrO 2 -15 at%CeO 2 . Using in situ neutron diffraction, we study how the phase fraction, lattice strain, and integral peak broadness evolve during external loading, unloading, and subsequent heating. Several peculiar features are discovered, including (i) a continuous mode of transformation with a wide range of transformation loads, (ii) co-evolution of the packing structure, contact deformation, and martensitic transformation, and (iii) a strong correlation between the peak broadening and the transformed phase fraction. In addition, we show the first direct evidence of reversible stress-induced martensitic transformation in granular materials. We additionally discuss the mechanism for martensite nucleation and growth in granular packings and show how that leads to the observed transformation characteristics.

36 MATERIALS SCIENCE↗

Design, processing, and testing of LSI arrays for space station

The development of a beam-leaded low power, high performance metal-oxide-semiconductor (MOS), 256-bit random access memory (RAM) was reported. Previous success with the aluminum-gate current-sense version and a silicon-gate voltage-sense version led to the present effort to make a beam-leaded silicon-gate RAM. Some problems unique to the silicon-on-sapphire beam-lead process development are presented. Beam-leaded SOS TA5388 devices using a Si3N4 passivation layer were shown to have good electrical parameters.

Schneider, W. C.↗

Performance measurements of a data link protocol

The end-to-end performance of a program implementing IEEE Std 802.2 logical link control protocol, which provides virtual circuit and datagram service and which constitutes the top sublayer of the data link layer of the reference model for Local Area Networks is studied. The measurements of relative execution times of various functions required in transferring data, over virtual circuits or as datagrams, showed that most of the program execution time is spent in a few relatively low-level functions. One of these functions performs block movement of data in memory, and two other functions provide access to various queues. Based on this result, two alternative versions of the program which move data efficiently were written and measured. In this paper the results of the study are reported and their impact on designing hardware and software systems for a network interface are discussed.

Kanakia, Hemant↗

Controlling panel flutter using adaptive materials

The effectiveness of using adaptive materials to control panel flutter is examined. Adaptive materials are those whose strain or mechanical properties can be controlled by the application of an external stimulus. Two such material types are piezoelectric (ceramics or polymers) and shape memory alloys. These materials experience controllable strain when subjected to applied voltage and heat, respectively. The present study investigates the use of both material types to modify the flutter characteristics of a simply supported panel in supersonic flow. Piezoelectric materials respond quickly to applied voltages and can be used with feedback control for active vibration suppression. The adaptive process of the shape memory alloy used in this study (geometry and stiffness change) is a relatively low frequency phenomenon; therefore, it is considered for passive (on/off) control schemes only. Nondimensional parameters for these adaptive materials are used with linear panel models, yielding results which allow for a better understanding of their capabilities in controlling aeroelastic responses.

Scott, R. C.↗

High-Temperature Smart Structures for Engine Noise Reduction and Performance Enhancement

One of key NASA goals is to develop and integrate noise reduction technology to enable unrestricted air transportation service to all communities. One of the technical priorities of this activity has been to account for and reduce noise via propulsion/airframe interactions, identifying advanced concepts to be integrated with the airframe to mitigate these noise-producing mechanisms. An adaptive geometry chevron using embedded smart structures technology offers the possibility of maximizing engine performance while retaining and possibly enhancing the favorable noise characteristics of current designs. New high-temperature shape memory alloy (HTSMA) materials technology enables the devices to operate in both low-temperature (fan) and high-temperature (core) exhaust flows. Chevron-equipped engines have demonstrated reduced noise in testing and operational use. It is desirable to have the noise benefits of chevrons in takeoff/landing conditions, but have them deployed into a minimum drag position for cruise flight. The central feature of the innovation was building on rapidly maturing HTSMA technology to implement a next-generation aircraft noise mitigation system centered on adaptive chevron flow control surfaces. In general, SMA-actuated devices have the potential to enhance the demonstrated noise reduction effectiveness of chevron systems while eliminating the associated performance penalty. The use of structurally integrated smart devices will minimize the mechanical and subsystem complexity of this implementation. The central innovations of the effort entail the modification of prior chevron designs to include a small cut that relaxes structural stiffness without compromising the desired flow characteristics over the surface; the reorientation of SMA actuation devices to apply forces to deflect the chevron tip, exploiting this relaxed stiffness; and the use of high-temperature SMA (HTSMA) materials to enable operation in the demanding core chevron environment. The overall conclusion of these design studies was that the cut chevron concept is a critical enabling step in bringing the variable geometry core chevron within reach. The presence of the cut may be aerodynamically undesirable in some respects, but it is present only when the chevron is not immersed in the core jet exhaust. When deployed, the gap closes as the chevron tip enters the high-speed, high-temperature core stream. Aeroacoustic testing and flow visualization support the contention that this cut is inconsequential to chevron performance.

Quackenbush, Todd R.↗

RMACXX: An Efficient High-Level C++ Interface over MPI-3 RMA

Parallel scientific applications can benefit from de- coupling communication and synchronization. One-sided pro- gramming abstractions, which separate communication from syn- chronization, have in fact served as a motivation for partitioned global address space (PGAS) models. However, the use of PGAS models in application codes in a manner that fully exploits the benefit of these programming models requires significant development effort. Meanwhile, a vast majority of scientific codes already use the Message Passing Interface (MPI) and need convenient features to support application-specific one-sided communication scenarios. MPI Remote Memory Access (RMA) can be employed for this purpose. MPI is a low-level API, however, and developing applications with MPI RMA requires programmers to be well versed in its nuances. We present RMACXX, a compact set of C++ bindings to MPI-3 RMA, to ease the use of MPI RMA. Unlike other PGAS models, which may have interoperability issues with MPI, RMACXX is written on top of MPI and uses the same runtime as MPI. The basic functionality of RMACXX adds only a relatively small number of extra instructions (about 20) to the critical communication path. Moreover, RMACXX provides an intuitive API for building a wide variety of scientific applications while enjoying performance matching handwritten MPI-3 RMA codes.

MPI-3 RMA, one-sided communication, PGAS, C++, exp↗

Programmable Analog Memory Resistors For Electronic Neural Networks

Electrical resistance of new solid-state device altered repeatedly by suitable control signals, yet remains at steady value when control signal removed. Resistance set at low value ("on" state), high value ("off" state), or at any convenient intermediate value and left there until new value desired. Circuits of this type particularly useful in nonvolatile, associative electronic memories based on models of neural networks. Such programmable analog memory resistors ideally suited as synaptic interconnects in "self-learning" neural nets. Operation of device depends on electrochromic property of WO3, which when pure is insulator. Potential uses include nonvolatile, erasable, electronically programmable read-only memories.

Ramesham, Rajeshuni↗

Resistive switching in ultra-thin La{sub 0.7}Sr{sub 0.3}MnO{sub 3}/SrRuO{sub 3} superlattices

Superlattices may play an important role in next generation electronic and spintronic devices if the key-challenge of the reading and writing data can be solved. This challenge emerges from the coupling of low dimensional individual layers with macroscopic world. Here, we report the study of the resistive switching characteristics of a hybrid structure made out of a superlattice with ultrathin layers of two ferromagnetic metallic oxides, La{sub 0.7}Sr{sub 0.3}MnO{sub 3} (LSMO) and SrRuO{sub 3} (SRO). Bipolar resistive switching memory effects are measured on these LSMO/SRO superlattices, and the observed switching is explainable by ohmic and space charge-limited conduction laws. It is evident from the endurance characteristics that the on/off memory window of the cell is greater than 14, which indicates that this cell can reliably distinguish the stored information between high and low resistance states. The findings may pave a way to the construction of devices based on nonvolatile resistive memory effects.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗

Multi-objective Bayesian optimization of ferroelectric materials with interfacial control for memory and energy storage applications

Optimization of materials’ performance for specific applications often requires balancing multiple aspects of materials’ functionality. Even for the cases where a generative physical model of material behavior is known and reliable, this often requires search over multidimensional function space to identify low-dimensional manifold corresponding to the required Pareto front. In this work, we introduce the multi-objective Bayesian optimization (MOBO) workflow for the ferroelectric/antiferroelectric performance optimization for memory and energy storage applications based on the numerical solution of the Ginzburg–Landau equation with electrochemical or semiconducting boundary conditions. MOBO is a low computational cost optimization tool for expensive multi-objective functions, where we update posterior surrogate Gaussian process models from prior evaluations and then select future evaluations from maximizing an acquisition function. Using the parameters for a prototype bulk antiferroelectric (PbZrO 3 ), we first develop a physics-driven decision tree of target functions from the loop structures. We further develop a physics-driven MOBO architecture to explore multidimensional parameter space and build Pareto-frontiers by maximizing two target functions jointly—energy storage and loss. This approach allows for rapid initial materials and device parameter selection for a given application and can be further expanded toward the active experiment setting. The associated notebooks provide both the tutorial on MOBO and allow us to reproduce the reported analyses and apply them to other systems (https://github.com/arpanbiswas52/MOBO_AFI_Supplements).

36 MATERIALS SCIENCE↗

Traversing large graphs on GPUs with unified memory

Due to the limited capacity of GPU memory, the majority of prior work on graph applications on GPUs has been restricted to graphs of modest sizes that fit in memory. Recent hardware and software advances make it possible to address much larger host memory transparently as a part of a feature known as unified virtual memory. While accessing host memory over an interconnect is understandably slower, the problem space has not been sufficiently explored in the context of a challenging workload with low computational intensity and an irregular data access pattern such as graph traversal. We analyse the performance of breadth first search (BFS) for several large graphs in the context of unified memory and identify the key factors that contribute to slowdowns. Next, we propose a lightweight offline graph reordering algorithm, HALO (Harmonic Locality Ordering), that can be used as a pre-processing step for static graphs. HALO yields speedups of 1.5x-1.9x over baseline in subsequent traversals. Our method specifically aims to cover large directed real world graphs in addition to undirected graphs whereas prior methods only account for the latter. Additionally, we demonstrate ties between the locality ordering problem and graph compression and show that prior methods from graph compression such as recursive graph bisection can be suitably adapted to this problem.

Gera, Prasun↗

Development and Evaluation of a Novel Curved Biopsy Device for CT-Guided Biopsy of Lesions Unreachable Using Standard Straight Needle Trajectories

PurposeTo evaluate the feasibility of a novel curved CT-guided biopsy needle prototype with shape memory to access otherwise not accessible biopsy targets.Methods and MaterialsA biopsy needle curved by 90° with specific radius was designed. It was manufactured using nitinol to acquire shape memory, encased in a straight guiding trocar to be driven out for access of otherwise inaccessible targets. Fifty CT-guided punctures were conducted in a biopsy phantom and 10 CT-guided punctures in a swine corpse. Biposies from porcine liver and muscle tissue were separately gained using the biopsy device, and histological examination was performed subsequently.ResultsMean time for placement of the trocar and deployment of the inner biopsy needle was ~205 ± 69 and ~93 ± 58 s, respectively, with a mean of ~4.5 ± 1.3 steps to reach adequate biopsy position. Mean distance from the tip of the needle to the target was ~0.7 ± 0.8 mm. CT-guided punctures in the swine corpse took relatively longer and required more biopsy steps (~574 ± 107 and ~380 ± 148 s, 8 ± 2.6 steps). Histology demonstrated appropriate tissue samples in nine out of ten cases (90%).ConclusionsTargets that were otherwise inaccessible via standard straight needle trajectories could be successfully reached with the curved biopsy needle prototype. Shape memory and preformed size with specific radius of the curved needle simplify the target accessibility with a low risk of injuring adjacent structures.

62 RADIOLOGY AND NUCLEAR MEDICINE↗

Method and apparatus for using compression to improve performance of low voltage caches

A method of operating a cache in a computing device includes, in response to receiving a memory access request at the cache, determining compressibility of data specified by the request, selecting in the cache a destination portion for storing the data based on the compressibility of the data and a persistent fault history of the destination portion, and storing a compressed copy of the data in a non-faulted subportion of the destination portion, wherein the persistent fault history indicates that the non-faulted subportion excludes any persistent faults.

Kalamatianos, John↗

Comparison of video fields and frames for transform compression

Because of the interlaced television scan, the two fields that form an interlaced video frame are generated 1/60 of a second apart. If the two fields are compressed independently, the correlation between adjacent lines is unused. The transmission rate can be reduced by using a field memory to form an interlaced frame. Four test images were processed as fields and as interlaced frames, using both theoretical and experimental compression designs. For comparable mean-square error and subjective appearance, field compression requires about one-half bit per sample more than frame compression. However, the overall transmission rate - the number of bits per image times the number of images per second - is more meaningful than the number of bits per sample. When transform compression at low transmission rates merges the adjacent lines, frame compression becomes similar to field repeating, and the memory can be reduced.

Jones, H. W., Jr.↗

Multistate resistance in TaN/(Hf,Zr)O 2 /Ta ferroelectric tunnel junctions

Ferroelectric tunnel junctions (FTJs) utilizing hafnium zirconium oxide (HZO) have emerged as promising non-volatile memory elements for microelectronics, compatible with back end of line (BEOL) complementary–metal–oxide semiconductor fabrication. This study investigates asymmetric electrode TaN/HZO/Ta devices with a 6 nm thick HZO layer as FTJs for multistate resistive memory applications. The individual FTJs exhibit a resistance ratio exceeding 10× when utilized as a binary state device, with pulsing between −1.7 and +1.4 V to set the high resistance state (HRS) and low resistance state (LRS), respectively. Following with reduced write voltage pulses allows the ferroelectric device to operate with a selection of over 32 distinct resistance states (2 5 bits) between the LRS and HRS. This work then explores the stability of the resistance states during write/read pulse cycling, along with the stability of the state after multiple read pulses. Accessing the multibit state shows stability within 50 reads with the binary state remaining stable for more than 4000 reads pulses. With their multistate tunability and versatility, FTJs hold promise as BEOL memory elements for compute-in-memory (CiM) arrays, binary digital memory, or weighted vector matrix multiplication applications with low power consumption during computations.

CMOS↗

Potential High-Temperature Shape-Memory Alloys Identified in the Ti(Ni,Pt) System

"Shape memory" is a unique property of certain alloys that, when deformed (within certain strain limits) at low temperatures, will remember and recover to their original predeformed shape upon heating. It occurs when an alloy is deformed in the low-temperature martensitic phase and is then heated above its transformation temperature back to an austenitic state. As the material passes through this solid-state phase transformation on heating, it also recovers its original shape. This behavior is widely exploited, near room temperature, in commercially available NiTi alloys for connectors, couplings, valves, actuators, stents, and other medical and dental devices. In addition, there are limitless applications in the aerospace, automotive, chemical processing, and many other industries for materials that exhibit this type of shape-memory behavior at higher temperatures. But for high temperatures, there are currently no commercial shape-memory alloys. Although there are significant challenges to the development of high-temperature shape-memory alloys, at the NASA Glenn Research Center we have identified a series of alloy compositions in the Ti-Ni-Pt system that show great promise as potential high-temperature shape-memory materials.

Noebe, Ronald D.↗

Giant spin torque in hybrids with anisotropic p-d exchange interaction

Control of magnetic domain wall movement by the spin-polarized current looks promising for creation of a new generation of magnetic memory devices. A necessary condition for this is the domain wall shift by a low-density current. Here, I show that a strongly anisotropic exchange interaction between mobile heavy holes and localized magnetic moments enormously increases the current-induced torque on the domain wall as compared to systems with isotropic exchange. This enables one to control the domain wall motion by current density 10{sup 4} A/cm{sup 2} in ferromagnet/semiconductor hybrids. The experimental observation of the anisotropic torque will facilitate the integration of ferromagnetism into semiconductor electronics.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗

Nonvolatile Memories in Spiking Neural Network Architectures: Current and Emerging Trends

A sustainable computing scenario demands more energy-efficient processors. Neuromorphic systems mimic biological functions by employing spiking neural networks for achieving brain-like efficiency, speed, adaptability, and intelligence. Current trends in neuromorphic technologies address the challenges of investigating novel materials, systems, and architectures for enabling high-integration and extreme low-power brain-inspired computing. This review collects the most recent trends in exploiting the physical properties of nonvolatile memory technologies for implementing efficient in-memory and in-device computing with spike-based neuromorphic architectures.

42 ENGINEERING↗