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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 541 records · Page 30
All sourcesNASA NTRSDOE OSTI
NASA NTRS1987

Principles for problem aggregation and assignment in medium scale multiprocessors

One of the most important issues in parallel processing is the mapping of workload to processors. This paper considers a large class of problems having a high degree of potential fine grained parallelism, and execution requirements that are either not predictable, or are too costly to predict. The main issues in mapping such a problem onto medium scale multiprocessors are those of aggregation and assignment. We study a method of parameterized aggregation that makes few assumptions about the workload. The mapping of aggregate units of work onto processors is uniform, and exploits locality of workload intensity to balance the unknown workload. In general, a finer aggregate granularity leads to a better balance at the price of increased communication/synchronization costs; the aggregation parameters can be adjusted to find a reasonable granularity. The effectiveness of this scheme is demonstrated on three model problems: an adaptive one-dimensional fluid dynamics problem with message passing, a sparse triangular linear system solver on both a shared memory and a message-passing machine, and a two-dimensional time-driven battlefield simulation employing message passing. Using the model problems, the tradeoffs are studied between balanced workload and the communication/synchronization costs. Finally, an analytical model is used to explain why the method balances workload and minimizes the variance in system behavior.

Nicol, David M.↗
NASA NTRS2018

Design and Development of CubeSat Solar Array Deployment Mechanisms Using Shape Memory Alloys

The Advanced eLectrical Bus (ALBus) project is a technology demonstration mission of a 3U CubeSat with an advanced, digitally controlled electrical power system capability and the novel use of Shape Memory Alloy (SMA) technology for reliable solar array (SA) deployable mechanisms. The ALBus CubeSat deploys four SAs in addition to the body-mounted arrays on each side of the CubeSat. A goal of the mission is to utilize the SMAs being developed at the NASA Glenn Research Center to deploy these SAs. The use of SMAs allows for the ability to test and reset the flight deployment mechanism prior to flight, which reduces the risk of in orbit deployment failures common to CubeSats. As a result, an SMA-driven Retention and Release (R&R) mechanism and an SMA-driven hinge were designed, developed, and integrated for flight. This paper summarizes the development of these mechanisms, types and functionalities of the SMAs used, as well as the lessons learned throughout the process.

cubesat↗
NASA NTRSDate not supplied

Parallelized Convolutional Interleaver Implementation for Efficient DDR Memory Access

Convolutional interleavers are used in many different communications systems to correct for burst errors due to atmospheric fades and scintillation. The interleaver size is related to the channel coherence time and the data rate. Small convolutional interleavers can be implemented in a field programmable gate array (FPGA) block random access memory (BRAM). However, large interleavers exceeding the size of the BRAM on the FPGA are necessary for channels with longer fades and higher data rates. Therefore, an implementation utilizing double data rate (DDR) memory external to the FPGA is necessary. Wide DDR memory data buses can make the use of DDR memory for convolutional interleavers inefficient when individual symbols are written to and read from the memory. DDR memory operational speeds can also limit the data rate of the interleaver. The Consultative Committee for Space Data Systems (CCSDS) Optical Communications High Photon Efficiency (HPE) standard utilizes a convolutional channel symbol interleaver. A previous implementation of the HPE standard utilized BRAM for the convolutional interleaver, but mission requirements for the upcoming Optical Artemis-2 Orion (O2O) communications demonstration dictate the use of an interleaver exceeding the size of the BRAM. An algorithm and method for implementing the convolutional interleaver in the FPGA with DDR memory is described in this paper.

optical communications↗
NASA NTRSDate not supplied

Parallelized convolutional interleaver implementation for efficient DDR memory access

Convolutional interleavers are used in many different communications systems to correct for burst errors due to atmospheric fades and scintillation. The interleaver size is related to the channel coherence time and the data rate. Small convolutional interleavers can be implemented in a field programmable gate array (FPGA) block random access memory (BRAM). However, large interleavers exceeding the size of the BRAM on the FPGA are necessary for channels with longer fades and higher data rates. Therefore, an implementation utilizing double data rate (DDR) memory external to the FPGA is necessary. Wide DDR memory data buses can make the use of DDR memory for convolutional interleavers inefficient when individual symbols are written to and read from the memory. DDR memory operational speeds can also limit the data rate of the interleaver. The Consultative Committee for Space Data Systems (CCSDS) Optical Communications High Photon Efficiency (HPE) standard utilizes a convolutional channel symbol interleaver. A previous implementation of the HPE standard utilized BRAM for the convolutional interleaver, but mission requirements for the upcoming Optical Artemis-2 Orion (O2O) communications demonstration dictate the use of an interleaver exceeding the size of the BRAM. An algorithm and method for implementing the convolutional interleaver in the FPGA with DDR memory is described in this paper.

Optical communications↗
NASA NTRS1987

A comparison of the Cray-2 performance before and after the installation of memory pseudo-banking

A suite of 13 large Fortran benchmark codes were run on a Cray-2 configured with memory pseudo-banking circuits, and floating point operation rates were measured for each under a variety of system load configurations. These were compared with similar flop measurements taken on the same system before installation of the pseudo-banking. A useful memory access efficiency parameter was defined and calculated for both sets of performance rates, allowing a crude quantitative measure of the improvement in efficiency due to pseudo-banking. Programs were categorized as either highly scalar (S) or highly vectorized (V) and either memory-intensive or register-intensive, giving 4 categories: S-memory, S-register, V-memory, and V-register. Using flop rates as a simple quantifier of these 4 categories, a scatter plot of efficiency gain vs Mflops roughly illustrates the improvement in floating point processing speed due to pseudo-banking. On the Cray-2 system tested this improvement ranged from 1 percent for S-memory codes to about 12 percent for V-memory codes. No significant gains were made for V-register codes, which was to be expected.

Schmickley, Ronald D.↗
NASA NTRS1991

A multicomputer simulation of the Galileo spacecraft command and data subsystem

A detailed simulation of the command and data subsystem of the Galileo spacecraft on a distributed memory multicomputer is described. The simulation is based on an ensemble of Inmos Transputers for simulating, to the bit level, the execution of instruction sequences for the six RCA 1802 microcomputers and the intricate bus traffic between them and other components of the spacecraft. Expressions were developed to estimate the performance of the simulator on a distributed system given the processor clock speed, memory access time, and communication characteristics.

Zipse, John E.↗
NASA NTRS1984

IMAGES: A digital computer program for interactive modal analysis and gain estimation for eigensystem synthesis

An interactive digital computer program for modal analysis and gain estimation for eigensystem synthesis was written. Both mathematical and operation considerations are described; however, the mathematical presentation is limited to those concepts essential to the operational capability of the program. The program is capable of both modal and spectral synthesis of multi-input control systems. It is user friendly, has scratchpad capability and dynamic memory, and can be used to design either state or output feedback systems.

Jones, R. L.↗
NASA NTRS1994

Hierarchical modeling for reliability analysis using Markov models

Markov models represent an extremely attractive tool for the reliability analysis of many systems. However, Markov model state space grows exponentially with the number of components in a given system. Thus, for very large systems Markov modeling techniques alone become intractable in both memory and CPU time. Often a particular subsystem can be found within some larger system where the dependence of the larger system on the subsystem is of a particularly simple form. This simple dependence can be used to decompose such a system into one or more subsystems. A hierarchical technique is presented which can be used to evaluate these subsystems in such a way that their reliabilities can be combined to obtain the reliability for the full system. This hierarchical approach is unique in that it allows the subsystem model to pass multiple aggregate state information to the higher level model, allowing more general systems to be evaluated. Guidelines are developed to assist in the system decomposition. An appropriate method for determining subsystem reliability is also developed. This method gives rise to some interesting numerical issues. Numerical error due to roundoff and integration are discussed at length. Once a decomposition is chosen, the remaining analysis is straightforward but tedious. However, an approach is developed for simplifying the recombination of subsystem reliabilities. Finally, a real world system is used to illustrate the use of this technique in a more practical context.

Fagundo, Arturo↗
NASA NTRS2018

Design and Development of CubeSat Solar Array Deployment Mechanisms Using Shape Memory Alloys

The Advanced eLectrical Bus (ALBus) project is a technology demonstration mission of a 3-U CubeSat with an advanced, digitally controlled electrical power system capability and the novel use of Shape Memory Alloy (SMA) technology for reliable solar array deployable mechanisms. The ALBus cubesat has a need to deploy four solar arrays in addition to the body-mounted arrays on each side of the cubesat. A goal of the mission is to utilize the SMAs being developed at the NASA Glenn Research Center to deploy these solar arrays. The use of SMAs allows for the ability to test and reset the flight deployment mechanism prior to flight which reduces the risk of on orbit deployment failures common on cubesats. As a result, an SMA driven Retention and Release mechanism and an SMA driven hinge was designed, developed, and being prepared for flight. This paper summarized the development of these mechanisms, types and functionalities of SMAs used, and lessons learned throughout the process.

solar array deployment↗
NASA NTRS1993

A multiarchitecture parallel-processing development environment

A description is given of the hardware and software of a multiprocessor test bed - the second generation Hypercluster system. The Hypercluster architecture consists of a standard hypercube distributed-memory topology, with multiprocessor shared-memory nodes. By using standard, off-the-shelf hardware, the system can be upgraded to use rapidly improving computer technology. The Hypercluster's multiarchitecture nature makes it suitable for researching parallel algorithms in computational field simulation applications (e.g., computational fluid dynamics). The dedicated test-bed environment of the Hypercluster and its custom-built software allows experiments with various parallel-processing concepts such as message passing algorithms, debugging tools, and computational 'steering'. Such research would be difficult, if not impossible, to achieve on shared, commercial systems.

Townsend, Scott↗
NASA NTRS1979

Digital Image Display Control System, DIDCS

DIDCS is an interactive image display and manipulation system that is used for a variety of astronomical image reduction and analysis operations. The hardware system consists of a PDP 11/40 main frame with 32K of 16-bit core memory; 96K of 16-bit MOS memory; two 9 track 800 BPI tape drives; eight 2.5 million byte RKO5 type disk packs, three user terminals, and a COMTAL 8000-S display system which has sufficient memory to store and display three 512 x 512 x 8 bit images along with an overlay plane and function table for each image, a pseudo color table and the capability for displaying true color. The software system is based around the language FORTH, which will permit an open ended dictionary of user level words for image analyses and display. A description of the hardware and software systems will be presented along with examples of the types of astronomical research that are being performed. Also a short discussion of the commonality and exchange of this type of image analysis system will be given.

Fischel, D.↗
NASA NTRS1986

Ground Software Maintenance Facility (GSMF) user's manual. Appendices NASA-CR-178806 NAS 1.26:178806 Rept-41849-G159-026-App HC A05/MF A01

Procedures are presented that allow the user to assemble tasks, link, compile, backup the system, generate/establish/print display pages, cancel tasks in memory, and to TET an assembly task without having to enter the commands every time. A list of acronyms is provided. Software identification, payload checkout unit operating system services, data base generation, and MITRA operating procedures are also discussed.

Aquila, V.↗
NASA NTRS1977

Retransmission error control with memory

In this paper, an error control technique that is a basic improvement over automatic-repeat-request ARQ is presented. Erroneously received blocks in an ARQ system are used for error control. The technique is termed ARQ-with-memory (MRQ). The general MRQ system is described, and simple upper and lower bounds are derived on the throughput achievable by MRQ. The performance of MRQ with respect to throughput, message delay and probability of error is compared to that of ARQ by simulating both systems using error data from a VHF satellite channel being operated in the ALOHA packet broadcasting mode.

Sindhu, P. S.↗
NASA NTRS2006

Asynchronous Message Service for Deep Space Mission Operations

While the CCSDS (Consultative Committee for Space Data Systems) File Delivery Protocol (CFDP) provides internationally standardized file transfer functionality that can offer significant benefits for deep space mission operations, not all spacecraft communication requirements are necessarily best met by file transfer. In particular, continuous event-driven asynchronous message exchange may also be useful for communications with, among, and aboard spacecraft. CCSDS has therefore undertaken the development of a new Asynchronous Message Service (AMS) standard, designed to provide common functionality over a wide variety of underlying transport services, ranging from shared memory message queues to CCSDS telemetry systems. The present paper discusses the design concepts of AMS, their applicability to deep space mission operations problems, and the results of preliminary performance testing obtained from exercise of a prototype implementation.

asynchronous message exchanges↗
NASA NTRS1976

An interface between a datametrics 1085A manometer and a Hewlett-Packard 2100S computer

A hardware/software interface designed to mate a Datametrics models 1085A electronic manometer to a Hewlett-Packard (HP) model 2100S computer is described. The software driver operates in the basic control system (BCS) and requires 173 words of memory; the hardware interface uses an HP data source interface (DSI) card which requires one computer input/output channel. Results obtained by incorporating this interface into a data acquisition system indicate that the interface operates successfully.

Hillard, M. E., Jr.↗
NASA NTRS1979

Radar image processing of real aperture SLAR data for the detection and identification of iceberg and ship targets

An iceberg detection and identification system consisting of a moderate resolution Side Looking Airborne Radar (SLAR) interfaced with a Radar Image Processor (RIP) based on a ROLM 1664 computer with a 32K core memory updatable to 64K is described. The system can be operated in high- or low-resolution sampling modes. Specifically designed algorithms are applied to digitized signal returns to provide automatic target detection and location, geometrically correct video image display and data recording. The real aperture Motorola AN/APS-94D SLAR operates in the X-band and is tunable between 9.10 and 9.40 GHz; its output power is 45 kW peak with a pulse repetition rate of 750 pulses per hour. Schematic diagrams of the system are provided, together with preliminary test data.

Marthaler, J. G.↗
NASA NTRS1980

Optical mass memory investigation

The MASTER 1 optical mass storage system advanced working model (AWM) was designed to demonstrate recording and playback of imagery data and to enable quantitative data to be derived as to the statistical distribution of raw errors experienced through the system. The AWM consists of two subsystems, the recorder and storage and retrieval. The recorder subsystem utilizes key technologies such as an acoustic travelling wave lens to achieve recording of digital data on fiche at a rate of 30 Mbits/sec, whereas the storage and retrieval reproducer subsystem utilizes a less complex optical system that employs an acousto-optical beam deflector to achieve data readout at a 5 Mbits/sec rate. The system has the built in capability for detecting and collecting error statistics. The recorder and storage and retrieval subsystems operate independent of one another and are each constructed in modular form with each module performing independent functions. The operation of each module and its interface to other modules is controlled by one controller for both subsystems.

Source record↗