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At least 541 records · Page 30

Magnetoelectric inverter

A magneto-electric (ME) inverter includes two anti-ferromagnetic spin orbit read (AFSOR) circuit elements, each AFSOR circuit element has a CMOS inverter; and an AFSOR device with a ME base layer; a semiconductor channel layer on the ME base layer and comprising a source terminal and a drain terminal, where the source terminal is coupled to an output of the CMOS inverter; and a gate electrode on the semiconductor channel layer. The gate electrode of a second AFSOR device of the two AFSOR circuit elements is coupled to the drain terminal of a first AFSOR device of the two AFSOR circuit elements.

Gaul, Nishtha Sharma↗

Design and Modeling of the Charge Readout of a SiMOS Quantum Dot with a Single Electron Transistor and CryoCMOS

Single electron spin qubits trapped in SiMOS quantum dots are a promising technology for scaling to thousand- or million-qubit systems due to their compatibility with mature CMOS manufacturing processes. A readout system that combines a single electron transistor with a custom cryogenic CMOS amplification and digitization chain offers key advantages by avoiding the use of bulky RF components or room-temperature interconnects. We present design techniques and simulation results for an optimized qubit-SET cryoCMOS interface, culminating in the design of the QNDR1 ASIC, the first cryogenic readout ASIC designed under the Quandarum project, which targets the development of a many-channel spin qubit based detector for use in high energy physics.

Quinn, Adam [Fermilab] (ORCID:0009000605056371)↗

Sub-Microsecond Polarization Switching in (Al,Sc)N Ferroelectric Capacitors Grown on Complementary Metal-Oxide-Semiconductor-Compatible Aluminum Electrodes

In this work, the frequency-dependent ferroelectric properties of 45 nm (Al,Sc)N films sputter deposited on complementary metal–oxide–semiconductor (CMOS)-compatible Al metal electrodes are measured and compared. Low in-plane compressive stress (-10 ± 20 MPa) is observed in (Al,Sc)N thin films deposited on Al electrodes. The (Al,Sc)N films exhibit an imprint in the measured coercive fields (E c ) of -4.3/+5.3 MV cm -1 at 10 kHz. Using positive-up negative-down (PUND) measurements, ferroelectric switching is observed within ≈200 ns of an applied voltage pulse, which demonstrates the ability of ferroelectric (Al,Sc)N to achieve the fast read/write speeds desired in memory devices.

77 NANOSCIENCE AND NANOTECHNOLOGY↗

The Timepix4 analog front-end design: Lessons learnt on fundamental limits to noise and time resolution in highly segmented hybrid pixel detectors

This manuscript describes the optimization of the front-end readout electronics for high granularity hybrid pixel detectors. The theoretical study aims at minimizing the noise and jitter. The model presented here is validated with both circuit post layout simulations and measurements on the Timepix4 Application Specific Integrated Circuit (ASIC). The analog front-end circuit and the procedure to optimize the dimensions of the main transistors are described with detail. The Timepix4 is the most recent ASIC designed in the framework of the Medipix4 Collaboration. It was manufactured in 65nm CMOS process, and consists of a four side buttable matrix of 448 × 512 pixels with 55µm pitch. The analog front-end has a gain of ~36mV/ke - when configured in High Gain Mode, and ~20mV/ke - when configured in Low Gain Mode. The Equivalent Noise Charge (ENC) is ~68e - rms and ~80e - rms in High Gain Mode and in Low Gain Mode respectively. In event driven mode the incoming hits can be time stamped within a ~ 200ps time bin and the chip can deal with a maximum flux of ~ 3.6MHzmm –2 s –1 . In photon counting mode, the chip can deal with up to ~ 5GHzmm –2 s –1 . The routine designed to optimize the Timepix4 front-end is then used to analyze the performance limits in terms of jitter and noise for Charge Sensitive Amplifiers in pixel detectors.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗

Ultrafast radiographic imaging and tracking: An overview of instruments, methods, data, and applications

Ultrafast radiographic imaging and tracking (U-RadIT) use state-of-the-art ionizing particle and light sources to experimentally study sub-nanosecond transients or dynamic processes in physics, chemistry, biology, geology, materials science and other fields. These processes are fundamental to modern technologies and applications, such as nuclear fusion energy, advanced manufacturing, communication, and green transportation, which often involve one mole or more atoms and elementary particles, and thus are challenging to compute by using the first principles of quantum physics or other forward models. One of the central problems in U-RadIT is to optimize information yield through, e.g. high-luminosity X-ray and particle sources, efficient imaging and tracking detectors, novel methods to collect data, and large-bandwidth online and offline data processing, regulated by the underlying physics, statistics, and computing power. We review and highlight recent progress in: (a.) Detectors such as high-speed complementary metal-oxide semiconductor (CMOS) cameras, hybrid pixelated array detectors integrated with Timepix4 and other application-specific integrated circuits (ASICs), and digital photon detectors; (b.) U-RadIT modalities such as dynamic phase contrast imaging, dynamic diffractive imaging, and four-dimensional (4D) particle tracking; (c.) U-RadIT data and algorithms such as neural networks and machine learning, and (d.) Applications in ultrafast dynamic material science using XFELs, synchrotrons and laser-driven sources. Hardware-centric approaches to U-RadIT optimization are constrained by detector material properties, low signal-to-noise ratio, high cost and long development cycles of critical hardware components such as ASICs. Interpretation of experimental data, including comparisons with forward models, is frequently hindered by sparse measurements, model and measurement uncertainties, and noise. Alternatively, U-RadIT make increasing use of data science and machine learning algorithms, including experimental implementations of compressed sensing. Machine learning and artificial intelligence approaches, refined by physics and materials information, may also contribute significantly to data interpretation, uncertainty quantification and U-RadIT optimization.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗

AstroPix: A pixelated HVCMOS sensor for space-based gamma-ray measurement

A next-generation medium-energy gamma-ray telescope targeting the MeV range would address open questions in astrophysics regarding how extreme conditions accelerate cosmic-ray particles, produce relativistic jet outflows, and more. One concept, AMEGO-X, relies upon the mission-enabling CMOS Monolithic Active Pixel Sensor silicon chip AstroPix. AstroPix is designed for space-based use, featuring low noise, low power consumption, and high scalability. Desired performance of the device include an energy resolution of 5 keV (or 10% FWHM) at 122 keV and a dynamic range per-pixel of 25–700 keV, enabled by the addition of a high-voltage bias to each pixel which supports a depletion depth of 500 μ m. This work reports on the status of the AstroPix development process with emphasis on the current version under test, version three (v3), and highlights of version two (v2). Version 3 achieves energy resolution of 10.4 ± 3.2% at 59.5 keV and 94 ± 6 μ m depletion in a low-resistivity test silicon substrate.

Astrophysics instrumentation↗

Advances in phosphor two-color ratio method thermography for full-field surface temperature measurements

We report thermographic phosphors can be employed for optical sensing of surface, gas phase, and bulk material temperatures through different strategies including the time-decay method, time-integrated method, and frequency-domain method. We focus on the time-integrated method, also known as the ratio method, as it can be more practical in many situations. This work advances the ratio method using two machine vision cameras with CMOS detectors for full-field temperature measurements of a solid surface. A phosphor calibration coupon is fabricated using aerosol deposition and employed for in situ determination of the temperature-versus-intensity ratio relationship. Algorithms from digital image correlation are employed to determine the stereoscopic imaging system intrinsic and extrinsic parameters, and accurately register material points on the sample to subpixel locations in each image with 0.07 px or better accuracy. Detector nonlinearity is carefully characterized and corrected. Temperature-dependent, spatial non-uniformity of the full-field intensity ratio—posited to be caused by a blue-shift effect of the bandpass filter for non-collimated light and/or a wavelength-dependent transmission efficiency of the lens—is assessed and treated for cases where a standard flat-field correction fails to correct the non-uniformity. In sum, pixel-wise calibration curves relating the computed intensity ratio to temperature in the range of T = 300–430 K are generated, with an embedded error of less than 3 K. This work offers a full calibration methodology and several improvements on two-color phosphor thermography, opening the door for full-field temperature measurements in dynamic tests with deforming test articles.

37 INORGANIC, ORGANIC, PHYSICAL, AND ANALYTICAL CH↗

A 32-channels readout ASIC for X-ray spectrometry and tracking in the GAPS experiment

Here this work describes the architecture and the experimental results from the characterization of a 32-channels mixed-signal Application-Specific Integrated Circuit (ASIC) developed for the readout of the lithium-drifted silicon, Si(Li), detectors of the General AntiParticle Spectrometer (GAPS) experiment dedicated to searching for dark matter. The instrument is designed for the identification of antiprotons, antideuterons and antihelium nuclei from cosmic rays during an Antarctic balloon mission scheduled for late 2024. A full custom integrated circuit, named SLIDER32 (32-channels Si-LI DEtector Readout) ASIC, has been produced in a commercial 180 nm CMOS technology. The ASIC is comprised of 32 low-noise analog readout channels featuring dynamic signal compression to comply with the wide input range, an 11-bit SAR ADC and a digital back-end section which is responsible for channel setting and for sending digital information to the data acquisition system (DAQ). The circuit design criteria and the experimental results are discussed in the paper.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗

Inverter Matrix for the Clementine Mission

An inverter matrix test circuit was designed for the Clementine space mission and is built into the RRELAX (Radiation and Reliability Assurance Experiment). The objective is to develop a circuit that will allow the evaluation of the CMOS FETs using a lean data set in the noisy spacecraft environment.

CMOS FETs spacecraft environment RRELAX orbit moon↗

Impact of Device Scaling on Deep Sub-micron Transistor Reliability: A Study of Reliability Trends using SRAM

As microelectronics are scaled in to the deep sub-micron regime, users of advanced technology CMOS, particularly in high-reliability applications, should reassess how scaling effects impact long-term reliability. An experimental based reliability study of industrial grade SRAMs, consisting of three different technology nodes, is proposed to substantiate current acceleration models for temperature and voltage life-stress relationships. This reliability study utilizes step-stress techniques to evaluate memory technologies (0.25mum, 0.15mum, and 0.13mum) embedded in many of today's high-reliability space/aerospace applications. Two acceleration modeling approaches are presented to relate experimental FIT calculations to Mfr's qualification data.

CMOS integrated circuits↗

On-Chip p-MOSFET Dosimetry

On-chip p-FETs were developed to monitor the radiation dose of n-well CMOS ICs by monitoring the threshold voltage shifts due to radiation induced oxide and interface charge.

FET's↗

Ionizing Radiation Effects on Hole Collection Backside-Illuminated P-Type Deep-Trench Pinned Photo-MOS Pixels under Image Acquisition

Dark current degradation, origins, and annealing behavior after x-ray irradiation are studied in a P-type, hole collecting, backside-illuminated image sensor currently being developed at STMicroelectronics and based on deep-trenched photo-MOS pixels. Different biasing conditions during irradiation, i.e. grounded or biased and sequenced, are compared. The dark current increase with total ionizing dose (TID) and the dark current annealing behavior seem to be driven by the backside interface between the P-epitaxy of the pixels and the ONO stack. Despite still being under development, this pixel architecture already exhibits both very good electro-optical performance and a better radiation hardness than pinned photodiode-based CMOS Image sensors that benefit from the same advanced CIS processing technologies. At high total dose range, the photogate challenges custom Radiation-Hardened-by-Design photodiodes by exhibiting a comparable radiation tolerance while bringing new features such as high-resolution or Correlated Double Sampling.

CMOS Image Sensor (CIS)↗

Displacement Damage Induced Dark Current and Random Telegraph Signal in P-Type Deep-Trench Pinned Photogates

This study focuses on displacement damage induced dark current and Random Telegraph Signal (RTS) in STMicroelectronics P-Type photogate, a device moving away from the 4T Pinned-Photodiode, with a sensitive volume exclusively made of boron-doped P-type epitaxy, and collecting holes instead of electrons. Results show a typical trend for the shape of dark current and RTS degradation in CMOS Image Sensors with the exception that the measured generation rates seem 2 times smaller than typical literature values in irradiated silicon. Different hypothesis on the origin of this discrepancy are explored.

displacement damage dose↗

Scalable Nanoimprint Manufacturing of Functional Multilayer Metasurface Devices

Optical metasurfaces, consisting of subwavelength-scale meta-atom arrays, hold great promise of overcoming the fundamental limitations of conventional optics. Due to their structural complexity, metasurfaces usually require high-resolution yet slow and expensive fabrication processes. Here, using a metasurface polarimetric imaging device as an example, the photonic structures and the Nanoimprint lithography (NIL) processes are designed, creating two separate NIL molds over a patterning area of > 20 mm2 with designed Moiré alignment markers by electron-beam writing, and further subsequently integrate silicon and aluminum metasurface structures on a chip. Uniquely, the silicon and aluminum metasurfaces are fabricated by using the nanolithography and 3D pattern-transfer capabilities of NIL, respectively, achieving nanometer-scale linewidth uniformity, sub-200 nm translational overlay accuracy, and <0.017 rotational alignment error while significantly reducing fabrication complexity and surface roughness. Here, the micro-sized multilayer metasurfaces have high circular polarization extinction ratios as large as ≈20 and ≈80 in blue and red wavelengths. Further, the metasurface chip-integrated CMOS imager demonstrates high accuracy in broad-band, full Stokes parameter analysis in the visible wavelength ranges and single-shot polarimetric imaging. This novel, NIL-based, multilayered nanomanufacturing approach is applicable to the scalable production of large-area functional structures for ultra-compact optic, electronic, and quantum devices.

36 MATERIALS SCIENCE↗

Beyond Substrates: Strain Engineering of Ferroelectric Membranes

Strain engineering in perovskite oxides provides for dramatic control over material structure, phase, and properties, but is restricted by the discrete strain states produced by available high-quality substrates. Here, using the ferroelectric BaTiO3, production of precisely strain-engineered, substrate-released nanoscale membranes is demonstrated via an epitaxial lift-off process that allows the high crystalline quality of films grown on substrates to be replicated. In turn, fine structural tuning is achieved using interlayer stress in symmetric trilayer oxide-metal/ferroelectric/oxide-metal structures fabricated from the released membranes. Additionally, in devices integrated on silicon, the interlayer stress provides deterministic control of ordering temperature (from 75 to 425 °C) and releasing the substrate clamping is shown to dramatically impact ferroelectric switching and domain dynamics (including reducing coercive fields to <10 kV cm-1 and improving switching times to <5 ns for a 20 µm diameter capacitor in a 100-nm-thick film). In devices integrated on flexible polymers, enhanced room-temperature dielectric permittivity with large mechanical tunability (a 90% change upon ±0.1% strain application) is demonstrated. This approach paves the way toward the fabrication of ultrafast CMOS-compatible ferroelectric memories and ultrasensitive flexible nanosensor devices, and it may also be leveraged for the stabilization of novel phases and functionalities not achievable via direct epitaxial growth.

36 MATERIALS SCIENCE↗

All‐Polymer Bulk‐Heterojunction Organic Electrochemical Transistors with Balanced Ionic and Electronic Transport

Abstract The rapid development of organic electrochemical transistor (OECTs)‐based circuits brings new opportunities for next‐generation integrated bioelectronics. The all‐polymer bulk‐heterojunction (BHJ) offers an attractive, inexpensive alternative to achieve efficient ambipolar OECTs, and building blocks of logic circuits constructed from them, but have not been investigated to date. Here, the first all‐polymer BHJ‐based OECTs are reported, consisting of a blend of new p‐type ladder conjugated polymer and a state‐of‐the‐art n‐type ladder polymer. The whole ladder‐type polymer BHJ also proves that side chains are not necessary for good ion transport. Instead, the polymer nanostructures play a critical role in the ion penetration and transportation and thus in the device performance. It also provides a facile strategy and simplifies the fabrication process, forgoing the need to pattern multiple active layers. In addition, the development of complementary metal–oxide–semiconductor (CMOS)‐like OECTs allows the pursuit of advanced functional logic circuitry, including inverters and NAND gates, as well as for amplifying electrophysiology signals. This work opens a new approach to the design of new materials for OECTs and will contribute to the development of organic heterojunctions for ambipolar OECTs toward high‐performing logic circuits.

Chemistry↗

Reconfigurable Cascaded Thermal Neuristors for Neuromorphic Computing

While the complementary metal-oxide semiconductor (CMOS) technology is the mainstream for the hardware implementation of neural networks, an alternative route is explored based on a new class of spiking oscillators called “thermal neuristors”, which operate and interact solely via thermal processes. Utilizing the insulator-to-metal transition (IMT) in vanadium dioxide, a wide variety of reconfigurable electrical dynamics mirroring biological neurons is demonstrated. Notably, inhibitory functionality is achieved just in a single oxide device, and cascaded information flow is realized exclusively through thermal interactions. To elucidate the underlying mechanisms of the neuristors, a detailed theoretical model is developed, which accurately reflects the experimental results. In conclusion, this study establishes the foundation for scalable and energy-efficient thermal neural networks, fostering progress in brain-inspired computing.

36 MATERIALS SCIENCE↗