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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 55 records · Page 3

Evaluation of 3D Plus Packaging Test Structures for NASA Goddard Space Flight Center

Environmental tests were performed on packaging test structures designed and manufactured for ESA and CNES by 3D PLus ELectronics. The design provided circuit elements that acted as thermal, mechanical and moisture sensors. Other design features showed the compatibility of the packaging with chip passives, bare electronic dice and plastic encapsulated microcircuits packaged together in an innovative, stacked multichip module. The NASA GSFC testing augmented long duration testing on the same units carried out by ESA and CNES. The NASA portion demonstrated packaging stability over temperature, in moisture, with voltage stress, in shock and in vibration environments.

Plante, Jeannette↗

Layer-Dependent Bit Error Variation in 3-D NAND Flash Under Ionizing Radiation

In this paper, we studied the total ionization dose (TID) effects on the multilevel-cell (MLC) 3-D NAND flash memory using Co-60 gamma radiation. We found a significant page-to-page bit error variation within a physical memory block of the irradiated memory chip. Our analysis showed that the origin of the bit error variation is the unique vertical layer-dependent TID response of the 3-D NAND. We found that the memory pages located at the upper and lower layers of the 3-D stack show higher fails compared to the middle-layer pages of a given memory block. We confirmed our findings by comparing radiation response of four different chips of the same specification. In addition, we compared the TID response of the MLC 3-D NAND with that of the 2-D NAND chip, which showed less page-to-page variation in bit error within a given memory block. We discuss the possible application of our findings for the radiation-tolerant smart memory controller design.

3-D NAND flash↗

Record thermopower found in an IrMn-based spintronic stack

The Seebeck effect converts thermal gradients into electricity. As an approach to power technologies in the current Internet-of-Things era, on-chip energy harvesting is highly attractive, and to be effective, demands thin film materials with large Seebeck coefficients. In spintronics, the antiferromagnetic metal IrMn has been used as the pinning layer in magnetic tunnel junctions that form building blocks for magnetic random access memories and magnetic sensors. Spin pumping experiments revealed that IrMn Néel temperature is thickness-dependent and approaches room temperature when the layer is thin. Here, we report that the Seebeck coefficient is maximum at the Néel temperature of IrMn of 0.6 to 4.0 nm in thickness in IrMn-based half magnetic tunnel junctions. We obtain a record Seebeck coefficient 390 (±10) μV K -1 at room temperature. Our results demonstrate that IrMn-based magnetic devices could harvest the heat dissipation for magnetic sensors, thus contributing to the Power-of-Things paradigm.

42 ENGINEERING↗

Low-temperature processed beta-phase In 2 Se 3 ferroelectric semiconductor thin film transistors

As scaling becomes increasingly difficult, there is growing interest in vertical or three-dimensional stacking of transistors and especially memory. Ferroelectric semiconductor field effect transistors can be key enablers to improve energy efficiency and overall chip and memory performance. In this work, low-temperature processed, back-end-of-the-line compatible transistors were demonstrated by depositing a layered chalcogenide ferroelectric semiconductor, beta-phase In 2 Se 3 , at temperature as low as 400 °C. Top gate n-channel In 2 Se 3 thin film transistors were fabricated with field-effect mobility ∼1 cm 2 V −1 s −1 , and simple polarization switching based memory results are presented.

36 MATERIALS SCIENCE↗

Bioinspired engineering of exploration systems for NASA and DoD

A new approach called bioinspired engineering of exploration systems (BEES) and its value for solving pressing NASA and DoD needs are described. Insects (for example honeybees and dragonflies) cope remarkably well with their world, despite possessing a brain containing less than 0.01% as many neurons as the human brain. Although most insects have immobile eyes with fixed focus optics and lack stereo vision, they use a number of ingenious, computationally simple strategies for perceiving their world in three dimensions and navigating successfully within it. We are distilling selected insect-inspired strategies to obtain novel solutions for navigation, hazard avoidance, altitude hold, stable flight, terrain following, and gentle deployment of payload. Such functionality provides potential solutions for future autonomous robotic space and planetary explorers. A BEES approach to developing lightweight low-power autonomous flight systems should be useful for flight control of such biomorphic flyers for both NASA and DoD needs. Recent biological studies of mammalian retinas confirm that representations of multiple features of the visual world are systematically parsed and processed in parallel. Features are mapped to a stack of cellular strata within the retina. Each of these representations can be efficiently modeled in semiconductor cellular nonlinear network (CNN) chips. We describe recent breakthroughs in exploring the feasibility of the unique blending of insect strategies of navigation with mammalian visual search, pattern recognition, and image understanding into hybrid biomorphic flyers for future planetary and terrestrial applications. We describe a few future mission scenarios for Mars exploration, uniquely enabled by these newly developed biomorphic flyers.

Space Flight↗

Beam test performance of a prototype module with Short Strip ASICs for the CMS HL-LHC tracker upgrade

The Short Strip ASIC (SSA) is one of the four front-end chips designed for the upgrade of the CMS Outer Tracker for the High Luminosity LHC. Together with the Macro-Pixel ASIC (MPA) it will instrument modules containing a strip and a macro-pixel sensor stacked on top of each other. The SSA provides both full readout of the strip hit information when triggered, and, together with the MPA, correlated clusters called stubs from the two sensors for use by the CMS Level-1 (L1) trigger system. Results from the first prototype module consisting of a sensor and two SSA chips are presented. The prototype module has been characterized at the Fermilab Test Beam Facility using a 120 GeV proton beam.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗

Enabling Highly Efficient Capsule Networks Processing Through A PIM-Based Architecture Design

In recent years, the CNNs have achieved great successes in the image processing tasks, e.g., image recognition and object detection. Unfortunately, traditional CNN's classication is found to be easily misled by increasingly complex image features due to the usage of pooling operations, hence unable to preserve accurate position and pose information of the objects. To address this challenge, a novel neural network structure called Capsule Network has been proposed, which introduces equivariance through capsules to signicantly enhance the learning ability for image segmentation and object detection. Due to its requirement of performing a high volume of matrix operations, CapsNets have been generally accelerated on modern GPU platforms that provide highly optimized software library for common deep learning tasks. However, based on our performance characterization on modern GPUs, CapsNets exhibit low effciency due to the special program and execution features of their routing procedure, including massive unshareable intermediate variables and intensive syn- chronizations, which are very dicult to optimize at software level. To address these challenges, we propose a hybrid computing architecture design named PIM-CapsNet. It preserves GPU's on-chip computing capability for accelerating CNN types of layers in CapsNet, while pipelining with an off-chip in-memory acceleration solution that effectively tackles routing procedure's ineffciency by leveraging the processing-in-memory capability of today's 3D stacked memory. Using routing procedure's inherent parallellization feature, our design enables hierarchical improvements on CapsNet inference effciency through minimizing data movement and maximizing parallel processing in memory. Evaluation results demonstrate that our proposed design can achieve substantial improvement on both performance and energy savings for CapsNet inference, with almost zero accuracy loss. The results also suggest good performance scalability in optimizing the routing procedure with increasing network size.

Zhang, Xingyao↗

A Dual Linear/Circular Polarized Wideband Flat Panel Phased Array Antenna for K/Ka-band 6U CubeSat Communications Applications

Circular polarized (CP) electromagnetic waves are preferred for space-to-space and space-to-ground satellite communications (SATCOM). CubeSats with 6U sizes (1U represents a 10 cm x 10 cm x 10 cm), that will rotate together with the Moon as it orbits Earth require high gain CP antenna systems to maintain reliable communication links. Here, we have designed an 8x8 dual linear and dual circularly polarized phased array antenna (PAA) aperture that offers 22-28 GHz bandwidth, with maximum gain of 23 dBic, and beam scanning capability of ±50o with acceptable axial ratio over all scan angles. A stacked patch topology is selected to achieve wide impedance bandwidth. Each driven patch has two via feed point locations that are connected to grounded coplanar waveguide (CPW) feed structures. By utilizing phase shifters from the Anokiwave RFICs (AWMF-0165) employed for the beamforming network (BFN), we have generated both dual linear polarization and dual circular polarization in each patch. Each driven and parasitic patch is innovatively shaped to achieve excellent isolation between two feed points which, in turn, leads to low cross polarization, high efficiency and good axial ratio over the entire bandwidth. Each chip has eight outputs which feed one 2x2 sub-array consisting of four dual linear or dual circularly polarized driven patches, simultaneously. Each 2x2 sub-array of the 8x8 array are sequentially rotated which improves axial ratio performance when the antenna operates in the dual circularly polarized mode. By utilizing a mirror effect, cross-polarized fields are also improved when operated in a dual linear polarized mode. The 8x8 array aperture is simulated taking into account the effect of the multilayer printed circuit board (PCB) stack-up of the BFN and co-simulated with the power splitter outputs and chip outputs and results are compared with only passive array performance. The performance of the antenna is still excellent when non-ideal chip performances are included in the simulation analysis. The fabricated array will be tested for radiation patterns in the Antenna and Microwave Laboratory (AML) of the San Diego State University and the NASA Glenn Research Center (GRC) spherical near field chambers. The design of the 8x8 antenna array with BFN layout is shown in Fig. 1.

5G↗

Conceptual design of a hybrid Ge:Ga detector array

For potential applications in space infrared astronomy missions such as the Space Infrared Telescope Facility and the Large Deployable Reflector, integrated arrays of long-wavelength detectors are desired. The results of a feasibility study which developed a design for applying integrated array techniques to a long-wavelength (gallium-doped germanium) material to achieve spectral coverage between 30 and 200 microns are presented. An approach which builds up a two-dimensional array by stacking linear detector modules is presented. The spectral response of the Ge:Ga detectors is extended to 200 microns by application of uniaxial stress to the stack of modules. The detectors are assembled with 1 mm spacing between the elements. Multiplexed readout of each module is accomplished with integration sampling of a metal-oxide-semiconductor (MOS) switch chip. Aspects of the overall design, including the anticipated level of particle effects on the array in the space environment, a transparent electrode design for 200 microns response, estimates of optical crosstalk, and mechanical stress design calculations are included.

Parry, C. M.↗

Dual Common Planes for Time Multiplexing of Dual-Color QWIPs

A proposed improved method of externally controlled time multiplexing of the readouts of focal-plane arrays of pairs of stacked quantum-well infrared photodetectors (QWIPs) that operate in different wavelength bands is based on a dual-detector-common-plane circuit configuration. The method would be implemented in a QWIP integrated-circuit chip hybridized with a readout integrated-circuit (ROIC) chip.

Rafol, Sir B.↗

Multijunction InGaAs thermophotovoltaic power converter

The experimental performance of a multijunction monolithic In(0.53)Ga(0. 47)As power converter under blackbody irradiation is reported. Eight InGaAs PN junctions grown epitaxially on a semi-insulating wafer were monolithically integrated in series to boost the approximately 0.4 V photovoltage per typical InGaAs junction to over 3 volts for the 1 sq cm chip. This chip was originally designed and characterized for free-space 1.3 micron laser power beaming. This is the first report of such a multijunction TPV. This is not a traditional tandem cell in which the junctions are stacked vertically. The junctions are each about 1mm long by 1 cm wide and are laterally connected across the 1 sq cm device area. This multijunction design has the potential for lower I(sup 2)R power loss since the smaller PN junction area limits the current to one-eighth that of the equivalent surface area. In essence, the current is traded for voltage to avoid the I(sup 2)R loss, analogous to the way power utilities avoid I(sup 2)P loss in high-tension power lines, by transforming the high current, low voltage generated at a power plant into a high voltage at a low current before transmitting the power over great distances.

Wojtczuk, Steven↗

Influence of side-chain isomerization on the isothermal crystallization kinetics of poly(3-alkylthiophenes)

Flexible alkyl side chain in conjugate polymers (CPs) improves the solubility and promotes solution processability, in addition, it affects interchain packing and charge mobilities. Despite the well-known charge mobility and morphology correlation for these semi-crystalline polymers, there is a lack of fundamental understanding of the impact of side chain on their crystallization kinetics. In the present work, isothermal crystallization of five poly(3-alkylthiophene-2,5-diyl) (P3ATs) with different side-chain structures were systematically investigated. To suppress the extremely fast crystallization and trap the sample into amorphous glass, an advanced fast scanning chip calorimetry technique, which is able to quench the sample with few to tens thousands of K/s, was applied. Results show that the crystallization of P3ATs was greatly inhibited after incorporation of branched side chains, as indicated by a dramatic up to six orders of magnitude decrease in the crystallization rate. The suppressed crystallization of P3ATs were correlated with an increased π–π stacking distance due to unfavorable side-chain steric interaction. This research provides a pathway to use side-chain engineering to control the crystallization behavior for CPs, thus to control device performance.

36 MATERIALS SCIENCE↗

Laterally stacked Schottky diodes for infrared sensor applications

Laterally stacked Schottky diodes for infrared sensor applications are fabricated utilizing porous silicon having pores. A Schottky metal contract is formed in the pores, such as by electroplating. The sensors may be integrated with silicon circuits on the same chip with a high quantum efficiency, which is ideal for IR focal plane array applications due to uniformity and reproducibility.

Lin, True-Lon↗

A Two-Dimensional, Semiconducting Bolometer Array for HAWC

The Stratospheric Observatory For Infrared Astronomy's (SOFIA's) High resolution Airborne Wideband Camera (HAWC) will use an ion-implanted silicon bolometer array developed at NASA s Goddard Space Flight Center (GSFC). The GSFC Pop-Up Detectors (PUDs) use a unique folding technique to enable a 12 x 32 element closepacked array of bolometers with a filling factor greater than 95%. The HAWC detector uses a resistive metal film on silicon to provide frequency independent, approx. 50% absorption over the 40 - 300 micron band. The silicon bolometers are manufactured in 32-element rows within silicon frames using Micro Electro Mechanical Systems (MEMS) silicon etching techniques. The frames are then cut, "folded", and glued onto a metallized, ceramic, thermal bus "bar". Optical alignment using micrometer jigs ensures their uniformity and correct placement. The rows are then stacked side-by-side to create the final 12 x 32 element array. A kinematic Kevlar suspension system isolates the 200 mK bolometer cold stage from the rest of the 4K detector housing. GSFC - developed silicon bridge chips make electrical connection to the bolometers, while maintaining thermal isolation. The Junction Field Effect Transistor (JFET) preamplifiers for all the signal channels operate at 120 K, yet they are electrically connected and located in close proximity to the bolometers. The JFET module design provides sufficient thermal isolation and heat sinking for these, so that their heat is not detected by the bolometers. Preliminary engineering results from the flight detector dark test run are expected to be available in July 2004. This paper describes the array assembly and mechanical and thermal design of the HAWC detector and the JFET module.

Voellmer, George M.↗

Giant Nonlinear Optical Response via Coherent Stacking of In-Plane Ferroelectric Layers

Thin ferroelectric materials hold great promise for compact nonvolatile memory and nonlinear optical and optoelectronic devices. Herein, an ultrathin in-plane ferroelectric material that exhibits a giant nonlinear optical effect, group-IV monochalcogenide SnSe, is reported. Nanometer-scale ferroelectric domains with ≈90°/270° twin boundaries or ≈180° domain walls are revealed in physical-vapor-deposited SnSe by lateral piezoresponse force microscopy. Atomic structure characterization reveals both parallel and antiparallel stacking of neighboring van der Waals ferroelectric layers, leading to ferroelectric or antiferroelectric ordering. Ferroelectric domains exhibit giant nonlinear optical activity due to coherent enhancement of second-harmonic fields and the as-resulted second-harmonic generation was observed to be 100 times more intense than monolayer WS 2 . This work demonstrates in-plane ferroelectric ordering and giant nonlinear optical activity in SnSe, which paves the way for applications in on-chip nonlinear optical components and nonvolatile memory devices.

36 MATERIALS SCIENCE↗

Chip packaging technique

A hermetically sealed package for at least one semiconductor chip is provided which is formed of a substrate having electrical interconnects thereon to which the semiconductor chips are selectively bonded, and a lid which preferably functions as a heat sink, with a hermetic seal being formed around the chips between the substrate and the heat sink. The substrate is either formed of or includes a layer of a thermoplastic material having low moisture permeability which material is preferably a liquid crystal polymer (LCP) and is a multiaxially oriented LCP material for preferred embodiments. Where the lid is a heat sink, the heat sink is formed of a material having high thermal conductivity and preferably a coefficient of thermal expansion which substantially matches that of the chip. A hermetic bond is formed between the side of each chip opposite that connected to the substrate and the heat sink. The thermal bond between the substrate and the lid/heat sink may be a pinched seal or may be provided, for example by an LCP frame which is hermetically bonded or sealed on one side to the substrate and on the other side to the lid/heat sink. The chips may operate in the RF or microwave bands with suitable interconnects on the substrate and the chips may also include optical components with optical fibers being sealed into the substrate and aligned with corresponding optical components to transmit light in at least one direction. A plurality of packages may be physically and electrically connected together in a stack to form a 3D array.

Jayaraj, Kumaraswamy↗

Packaging of a large capacity magnetic bubble domain spacecraft recorder

A Solid State Spacecraft Data Recorder (SSDR), based on bubble domain technology, having a storage capacity of 10 to the 8th power bits, was designed and is being tested. The recorder consists of two memory modules each having 32 cells, each cell containing sixteen 100 kilobit serial bubble memory chips. The memory modules are interconnected to a Drive and Control Unit (DCU) module containing four microprocessors, 500 integrated circuits, a RAM core memory and two PROM's. The two memory modules and DCU are housed in individual machined aluminum frames, are stacked in brick fashion and through bolted to a base plate assembly which also houses the power supply.

Becker, F. J.↗