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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.
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Process makes microscopic, low-resistance electrical contacts on hexagonal n-type silicon carbide crystals used for microelectronic devices. A vacuum deposition of aluminum is etched to expose the bare silicon carbide where the electrical contacts are made. Sputtering alternating layers of tantalum and gold forms the alloy film.
A compact, high-current, hollow cathode utilizing a lanthanum hexaboride (LaB6) thermionic electron emitter has been developed for use with high-power Hall thrusters and ion thrusters. LaB6 cathodes are being investigated due to their long life, high current capabilities, and less stringent xenon purity and handling requirements compared to conventional barium oxide (BaO) dispenser cathodes. The new cathode features a much smaller diameter than previously developed versions that permit it to be mounted on axis of a Hall thruster ( internally mounted ), as opposed to the conventional side-mount position external to the outer magnetic circuit ("externally mounted"). The cathode has also been reconfigured to be capable of surviving vibrational loads during launch and is designed to solve the significant heater and materials compatibility problems associated with the use of this emitter material. This has been accomplished in a compact design with the capability of high-emission current (10 to 60 A). The compact, high-current design has a keeper diameter that allows the cathode to be mounted on the centerline of a 6- kW Hall thruster, inside the iron core of the inner electromagnetic coil. Although designed for electric propulsion thrusters in spacecraft station- keeping, orbit transfer, and interplanetary applications, the LaB6 cathodes are applicable to the plasma processing industry in applications such as optical coatings and semiconductor processing where reactive gases are used. Where current electrical propulsion thrusters with BaO emitters have limited life and need extremely clean propellant feed systems at a significant cost, these LaB6 cathodes can run on the crudest-grade xenon propellant available without impact. Moreover, in a laboratory environment, LaB6 cathodes reduce testing costs because they do not require extended conditioning periods under hard vacuum. Alternative rare earth emitters, such as cerium hexaboride (CeB6) can be used in this configuration with possibly an even longer emitter life. This cathode is specifically designed to integrate on the centerline of a high-power Hall thruster, thus eliminating the asymmetries in the plasma discharge common to cathodes previously mounted externally to the thruster s magnetic circuit. An alternative configuration for the cathode uses an external propellant feed. This diverts a fraction of the total cathode flow to an external feed, which can improve the cathode coupling efficiency at lower total mass flow rates. This can improve the overall thruster efficiency, thereby decreasing the required propellant loads for different missions. Depending on the particular mission, reductions in propellant loads can lead to mission enabling capabilities by allowing launch vehicle step-down, greater payload capability, or by extending the life of a spacecraft.
The Automatic Particle Fallout Monitor (APFM) is an automated instrument that assesses real-time particle contamination levels in a facility by directly imaging, sizing, and counting contamination particles. It allows personnel to respond to particle contamination before it becomes a major problem. For NASA, the APFM improves the ability to mitigate, avoid, and explain mission-compromising incidents of contamination occurring during payload processing, launch vehicle ground processing, and potentially, during flight operations. Commercial applications are in semiconductor processing and electronics fabrication, as well as aerospace, aeronautical, and medical industries. The product could also be used to measure the air quality of hotels, apartment complexes, and corporate buildings. IDEA sold and delivered its first four units to the United Space Alliance for the Space Shuttle Program at Kennedy. NASA used the APFM in the Kennedy Space Station Processing Facility to monitor contamination levels during the assembly of International Space Station components.
Impurity diffusion process produces precision silicon semiconductor junctions economically and fast. Oxide is deposited on a silicon wafer and a controlled concentration of impurity atoms in gaseous form is simultaneously introduced into the reaction.
Goddard Space Flight Center microelectronics program - integrated circuit block and semiconductor process development
A proof-of-concept solar cell process has been developed that is adaptable to automation. This involved the development of a new contact system, a new antireflection coating system, a drift field cell design and a new contoured surface treatment. All these processes are performed without the use of vacuum chambers and expensive masking techniques, thus providing the possibility of reduced costs by automation using conventional semiconductor processing machinery. The contacts were printed on the cells by conventional silk screen machinery. The P(+) back field was formed by diffusing in aluminum from a printed aluminum back contact. The antireflection coating was formed by spinning on and baking a TiO2-SiO2 glass film. Air-mass-zero efficiencies of over 10% were achieved using this completely vacuum-free process.
Etching and deposition of materials are critical steps in semiconductor processing for device manufacturing. Both etching and deposition may have isotropic and anisotropic components, due to directional sputtering and redeposition of materials, for example. Previous attempts at modeling profile evolution have used so-called "string theory" to simulate the moving solid-gas interface between the semiconductor and the plasma. One complication of this method is that extensive de-looping schemes are required at the profile corners. We will present a 2D profile evolution simulation using level set theory to model the surface. (1) By embedding the location of the interface in a field variable, the need for de-looping schemes is eliminated and profile corners are more accurately modeled. This level set profile evolution model will calculate both isotropic and anisotropic etch and deposition rates of a substrate in low pressure (10s mTorr) plasmas, considering the incident ion energy angular distribution functions and neutral fluxes. We will present etching profiles of Si substrates in Ar/Cl2 discharges for various incident ion energies and trench geometries.
Through research contracts with NASA, Materials and Electrochemical Research Corporation (MER), of Tucson, Arizona, contributed a number of technologies to record-breaking hypersonic flights. Through this research, MER developed a coating that successfully passed testing to simulate Mach 10 conditions, as well as provide several additional carbon-carbon (C-C) composite components for the flights. MER created all of the leading edges for the X-43A test vehicles at Dryden-considered the most critical parts of this experimental craft. In addition to being very heat resistant, the coating had to be very lightweight and thin, as the aircraft was designed to very precise specifications and could not afford to have a bulky coating. MER patented its carbon-carbon (C-C) composite process and then formed a spinoff company, Frontier Materials Corporation (FMC), also based in Tucson. FMC is using the patent in conjunction with low-cost PAN (polyacrylonitrile)-based fibers to introduce these materials to the commercial markets. The C-C composites are very lightweight and exceptionally strong and stiff, even at very high temperatures. The composites have been used in industrial heating applications, the automotive and aerospace industries, as well as in glass manufacturing and on semiconductors. Applications also include transfer components for glass manufacturing and structural members for carrier support in semiconductor processing.
Microprocessor, Graphics Processing Units (GPUs) and DDRx memory devices have emerged as promising next-generation technologies that enables both high performance processing and acceleration of complex algorithms for the latest challenges in human spaceflight, autonomous vehicles and artificial intelligence (AI). The feature sets of these devices offer exponential increases to throughput, calculation capability and system autonomy when compared to legacy flight systems. NASA's Electronic Part and Packaging (NEPP) Program has conducted an investigation into the radiation susceptibility of leading edge devices and process technologies by establishing standardized test approaches. Unlike most discrete devices, these require state of the art test systems to induce specific hardware activity similar to application software, thus allowing the characterization of failure modes within the system. To best characterize the tested part, NEPP eliminates variables that may impact device performance under radiation. Simplification of remaining system-level variables leads to an improved understanding of complex computational devices and their intended applications. The failure modes and error signatures that are recorded during testing are used to determine radiation sensitivity of the semiconductor process and the microcode architecture of the design. This presentation will discuss the test methodology that NASA Electronic Parts and Packaging (NEPP) is working to establish for its microprocessor, GPU and DDRx memory test programs to provide guidance on these devices and their underlying technology, in regards to their potential usage in future space flight systems.
A new approach for fabricating macroscopic (approximately 10x10x10 mm(exp 3)) structures with micron accuracy has been developed. This approach combines the precision of semiconductor processing and fiber optic technologies. A (100) silicon wafer is anisotropically etched to create four orthogonal v-grooves and an aperture on each 10x12 mm die. Precision 308 micron optical fibers are sandwiched between the die to align the v-grooves. The fiber is then anodically bonded to the die above and below it. This procedure is repeated to create thick structures and a stack of 5 or 6 die will be used to create a miniature scanning electron microscope (MSEM). Two die in the structure will have a segmented electrode to deflect the beam and correct for astigmatism. The entire structure is UHV compatible. The performance of an SEM improves as its length is reduced and a sub-cm 2 keV MSEM with a field emission source should have approximately 1 nm resolution. A low voltage high resolution MSEM would be useful for the examination of biological specimens and semiconductors with a minimum of damage. The first MSEM will be tested with existing 6 micron thermionic sources. In the future a micromachined field emission source will be used. The stacking technology presented in this paper can produce an array of MSEMs 1 to 30 mm in length with a 1 mm or larger period. A key question being addressed by this research is the optimum size for a low voltage MSEM which will be determined by the required spatial resolution, field of view, and working distance.
Criteria applied to semiconductor materials and deposition processes for thick film, insulated gate field effect transistor fabrication
Features of characterization requirements for crystals, devices and completed products are discussed. Key parameters of interest in semiconductor processing are presented. Characterization as it applies to process control, diagnostics and research needs is discussed with appropriate examples.
An improved Charge Injection Device (CID) stellar tracking sensor and an operating sensor in a control/readout electronics board were developed. The sensor consists of a shift register scanned, 256x256 CID array organized for readout of 4x4 subarrays. The 4x4 subarrays can be positioned anywhere within the 256x256 array with a 2 pixel resolution. This allows continuous tracking of a number of stars simultaneously since nine pixels (3x3) centered on any star can always be read out. Organization and operation of this sensor and the improvements in design and semiconductor processing are described. A hermetic package incorporating an internal thermoelectric cooler assembled using low temperature solders was developed. The electronics board, which contains the sensor drivers, amplifiers, sample hold circuits, multiplexer, analog to digital converter, and the sensor temperature control circuits, is also described. Packaged sensors were evaluated for readout efficiency, spectral quantum efficiency, temporal noise, fixed pattern noise, and dark current. Eight sensors along with two tracker electronics boards were completed, evaluated, and delivered.
Within the framework of the proposed research, emphasis was placed on application of magnetic fields to semiconductor growth systems. It was found that magnetic fields up to 3 kGauss do not affect the growth behavior nor the macro-segregation behavior in the system Ge(Ga). Applied fields are found to significantlty alter the radial dopant distribution, which is attributed to alterations in the spatial orientation of convective cells. Increasing the magnetic field to 30 kGauss is found to have a fundamental effect on dopant segregation. Emphasis is also placed on the potential of KC-135 flights for preliminary studies on the effects of reduced gravity environments on the wetting behavior of semiconductor systems in growth configuration. The limited number of experiments conducted does not allow any conclusions on the merits of KC-135 flights for semiconductor processing research.
Switch box designed for use in simultaneously controlling flows of as many as four out of total of six available gases into semiconductor-processing chamber. Contains switches, relays, logic circuitry, display devices, and other circuitry for connecting each of as many as four gas controllers to any one of as many as six available mass-flow controllers. Front panel of switch box apprises technician of statuses of flows of various gases.
The factors that enter into the development of an all-metal, nonvolatile magnetic RAM, in which multilayer giant magnetoresistive films are used for all functions - storage, readout, and support electronics - are described. Four significant characteristics are expected to favor all-metal over hybrid magnetic RAM. First, silicon-technology fabrication requires a large number of masking steps, including complex ones such as ion implantation. Conversely, all-metal technology is inherently simple: fewer masking steps, no doping, scaling to lithographic limits, very little operating power. Second, the all-metal footprint is significantly smaller than the hybrid one. Third, an all-metal RAM is expected to be able to be miniaturized to lithographic limits; miniaturization of hybrid magnetic RAMs is likely to be limited by the semiconductor circuitry. Finally, semiconductor processing and magnetic processing in MRAM are done separately because the former requires high temperatures, whereas magnetic fabrication is a low-temperature process. By contrast, because both GMR electronics and the memory elements are made of the same materials, the two major components are deposited and patterned concurrently on the same substrate.
Etching in semiconductor processing typically involves using halides because of the relatively fast rates. Bromine containing plasmas can generate high aspect ratio trenches, desirable for DRAM and MEMS applications, with relatively straight sidewalk We present scanning electron microscope images for silicon-etched trenches in a HBr plasma. Using a feature profile simulation, we show that the removal yield parameter, or number of neutrals removed per incident ion due to all processes (sputtering, spontaneous desorption, etc.), dictates the profile shape. We find that the profile becomes pinched off when the removal yield is a constant, with a maximum aspect ratio (AR) of about 5 to 1 (depth to height). When the removal yield decreases with increasing ion angle, the etch rate increases at the comers and the trench bottom broadens. The profiles have ARs of over 9:1 for yields that vary with ion angle. To match the experimentally observed etched time of 250 s for an AR of 9:1 with a trench width of 0.135 microns, we find that the neutral flux must be 3.336 x 10(exp 17)sq cm/s.
High-capacity cooling options remain limited for many small-scale applications such as microelectronic components, miniature sensors, and microsystems. A microelectromechanical system (MEMS) is currently under development at the NASA Glenn Research Center to meet this need. It uses a thermodynamic cycle to provide cooling or heating directly to a thermally loaded surface. The device can be used strictly in the cooling mode, or it can be switched between cooling and heating modes in milliseconds for precise temperature control. Fabrication and assembly are accomplished by wet etching and wafer bonding techniques routinely used in the semiconductor processing industry. Benefits of the MEMS cooler include scalability to fractions of a millimeter, modularity for increased capacity and staging to low temperatures, simple interfaces and limited failure modes, and minimal induced vibration.