Engineering Papers⌕ Search

SEARCH · Engineering Papers

Results for “semiconductor processing”

Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

Quote a phrase for an exact phrase match. Source license links do not imply unrestricted reuse.

At least 55 records · Page 3
All sourcesNASA NTRSDOE OSTI
NASA NTRS2016

The Impact of Standard Semiconductor Fabrication Processes on Polycrystalline Nb Thin Film Surfaces

Polycrystalline Nb thin films are extensively used for microwave kinetic inductance detectors (MKIDs) and superconducting transmission line applications. The microwave and mm-wave loss in these films is impacted, in part, by the presence of surface nitrides and oxides. In this study, glancing incidence x-ray diffraction was used to identify the presence of niobium nitride and niobium monoxide surface layers on Nb thin films which had been exposed to chemicals used in standard photolithographic processing. A method of mitigating the presence of ordered niobium monoxide surface layers is presented. Furthermore, we discuss the possibility of using glancing incidence x-ray diffraction as a non-destructive diagnostic tool for evaluating the quality of Nb thin films used in MKIDs and transmission lines. For a given fabrication process, we have both the X-ray diffraction data of the surface chemistry and a measure of the mm-wave and microwave loss, the latter being made in superconducting resonators.

superconducting films↗
NASA NTRS1980

An automated oxide and diffusion facility for IC's

Report discusses totally-automated oxidation and diffusion facility for fabricating IC's. Several innovations are demonstrated: process controller specifically designed for semiconductor processing; automatic loading system to accept wafers from air track, insert them in quartz carrier, and place carrier on paddle for insertion into furnace; automatic unloading of wafers back onto air track; and boron diffusion using diborane.

Kennedy, B. W.↗
NASA NTRS1993

Rapid Thermal Processing (RTP) of semiconductors in space

The progress achieved on the project entitled 'Rapid Thermal Processing of Semiconductors in Space' for a 12 month period of activity ending March 31, 1993 is summarized. The activity of this group is being performed under the direct auspices of the ROMPS program. The main objective of this program is to develop and demonstrate the use of advanced robotics in space with rapid thermal process (RTP) of semiconductors providing the test technology. Rapid thermal processing is an ideal processing step for demonstration purposes since it encompasses many of the characteristics of other processes used in solid state device manufacturing. Furthermore, a low thermal budget is becoming more important in existing manufacturing practice, while a low thermal budget is critical to successful processing in space. A secondary objective of this project is to determine the influence of microgravity on the rapid thermal process for a variety of operating modes. In many instances, this involves one or more fluid phases. The advancement of microgravity processing science is an important ancillary objective.

Anderson, T. J.↗
NASA NTRS1967

Thin film process forms effective electrical contacts on semiconductor crystals

Process makes microscopic, low-resistance electrical contacts on hexagonal n-type silicon carbide crystals used for microelectronic devices. A vacuum deposition of aluminum is etched to expose the bare silicon carbide where the electrical contacts are made. Sputtering alternating layers of tantalum and gold forms the alloy film.

Formigoni, N. P.↗
NASA NTRS2010

Compact Rare Earth Emitter Hollow Cathode

A compact, high-current, hollow cathode utilizing a lanthanum hexaboride (LaB6) thermionic electron emitter has been developed for use with high-power Hall thrusters and ion thrusters. LaB6 cathodes are being investigated due to their long life, high current capabilities, and less stringent xenon purity and handling requirements compared to conventional barium oxide (BaO) dispenser cathodes. The new cathode features a much smaller diameter than previously developed versions that permit it to be mounted on axis of a Hall thruster ( internally mounted ), as opposed to the conventional side-mount position external to the outer magnetic circuit ("externally mounted"). The cathode has also been reconfigured to be capable of surviving vibrational loads during launch and is designed to solve the significant heater and materials compatibility problems associated with the use of this emitter material. This has been accomplished in a compact design with the capability of high-emission current (10 to 60 A). The compact, high-current design has a keeper diameter that allows the cathode to be mounted on the centerline of a 6- kW Hall thruster, inside the iron core of the inner electromagnetic coil. Although designed for electric propulsion thrusters in spacecraft station- keeping, orbit transfer, and interplanetary applications, the LaB6 cathodes are applicable to the plasma processing industry in applications such as optical coatings and semiconductor processing where reactive gases are used. Where current electrical propulsion thrusters with BaO emitters have limited life and need extremely clean propellant feed systems at a significant cost, these LaB6 cathodes can run on the crudest-grade xenon propellant available without impact. Moreover, in a laboratory environment, LaB6 cathodes reduce testing costs because they do not require extended conditioning periods under hard vacuum. Alternative rare earth emitters, such as cerium hexaboride (CeB6) can be used in this configuration with possibly an even longer emitter life. This cathode is specifically designed to integrate on the centerline of a high-power Hall thruster, thus eliminating the asymmetries in the plasma discharge common to cathodes previously mounted externally to the thruster s magnetic circuit. An alternative configuration for the cathode uses an external propellant feed. This diverts a fraction of the total cathode flow to an external feed, which can improve the cathode coupling efficiency at lower total mass flow rates. This can improve the overall thruster efficiency, thereby decreasing the required propellant loads for different missions. Depending on the particular mission, reductions in propellant loads can lead to mission enabling capabilities by allowing launch vehicle step-down, greater payload capability, or by extending the life of a spacecraft.

Watkins, Ronald↗
NASA NTRS2002

An IDEA of What's in the Air

The Automatic Particle Fallout Monitor (APFM) is an automated instrument that assesses real-time particle contamination levels in a facility by directly imaging, sizing, and counting contamination particles. It allows personnel to respond to particle contamination before it becomes a major problem. For NASA, the APFM improves the ability to mitigate, avoid, and explain mission-compromising incidents of contamination occurring during payload processing, launch vehicle ground processing, and potentially, during flight operations. Commercial applications are in semiconductor processing and electronics fabrication, as well as aerospace, aeronautical, and medical industries. The product could also be used to measure the air quality of hotels, apartment complexes, and corporate buildings. IDEA sold and delivered its first four units to the United Space Alliance for the Space Shuttle Program at Kennedy. NASA used the APFM in the Kennedy Space Station Processing Facility to monitor contamination levels during the assembly of International Space Station components.

Source record↗
DOE OSTI2025

Development of a reliable Potting process for Photoconductive Semiconductor Switches (PCSS)

Electrical potting is an important process to protect semiconductor devices from damaging external elements (mechanical stress, moisture, high voltage, etc.) and provides structural support for delicate devices for electrical connectivity to a larger platform. This internship will focus on the development of a universal potting jig for photoconductive semiconductor switches (PCSS). The goal is to design a reliable compression jig that is cross compatible with various PCSS designs that allow for easy potting of devices with a high dielectric breakdown strength material. The challenge with the current potting jig is that the design is only compatible with one style of PCSS and applies uneven pressure that can lead to leakage of potting material. Our approach is to move from a design that applies pressure by binder clip to utilizing a micrometer based compressing jig for a reliable packaging process that can pot a variety of devices without having to have a unique compressing jig for each of style of PCSS. Possible roadblocks with the new design include epoxy leakage into the optical path and misalignment of the electrode – metal contact bond.

42 ENGINEERING↗
NASA NTRS1975

Recent advancements in low cost solar cell processing

A proof-of-concept solar cell process has been developed that is adaptable to automation. This involved the development of a new contact system, a new antireflection coating system, a drift field cell design and a new contoured surface treatment. All these processes are performed without the use of vacuum chambers and expensive masking techniques, thus providing the possibility of reduced costs by automation using conventional semiconductor processing machinery. The contacts were printed on the cells by conventional silk screen machinery. The P(+) back field was formed by diffusing in aluminum from a printed aluminum back contact. The antireflection coating was formed by spinning on and baking a TiO2-SiO2 glass film. Air-mass-zero efficiencies of over 10% were achieved using this completely vacuum-free process.

Ralph, E. L.↗
NASA NTRS1997

Etch Profile Simulation Using Level Set Methods

Etching and deposition of materials are critical steps in semiconductor processing for device manufacturing. Both etching and deposition may have isotropic and anisotropic components, due to directional sputtering and redeposition of materials, for example. Previous attempts at modeling profile evolution have used so-called "string theory" to simulate the moving solid-gas interface between the semiconductor and the plasma. One complication of this method is that extensive de-looping schemes are required at the profile corners. We will present a 2D profile evolution simulation using level set theory to model the surface. (1) By embedding the location of the interface in a field variable, the need for de-looping schemes is eliminated and profile corners are more accurately modeled. This level set profile evolution model will calculate both isotropic and anisotropic etch and deposition rates of a substrate in low pressure (10s mTorr) plasmas, considering the incident ion energy angular distribution functions and neutral fluxes. We will present etching profiles of Si substrates in Ar/Cl2 discharges for various incident ion energies and trench geometries.

Hwang, Helen H.↗
NASA NTRS2007

Hypersonic Composites Resist Extreme Heat and Stress

Through research contracts with NASA, Materials and Electrochemical Research Corporation (MER), of Tucson, Arizona, contributed a number of technologies to record-breaking hypersonic flights. Through this research, MER developed a coating that successfully passed testing to simulate Mach 10 conditions, as well as provide several additional carbon-carbon (C-C) composite components for the flights. MER created all of the leading edges for the X-43A test vehicles at Dryden-considered the most critical parts of this experimental craft. In addition to being very heat resistant, the coating had to be very lightweight and thin, as the aircraft was designed to very precise specifications and could not afford to have a bulky coating. MER patented its carbon-carbon (C-C) composite process and then formed a spinoff company, Frontier Materials Corporation (FMC), also based in Tucson. FMC is using the patent in conjunction with low-cost PAN (polyacrylonitrile)-based fibers to introduce these materials to the commercial markets. The C-C composites are very lightweight and exceptionally strong and stiff, even at very high temperatures. The composites have been used in industrial heating applications, the automotive and aerospace industries, as well as in glass manufacturing and on semiconductors. Applications also include transfer components for glass manufacturing and structural members for carrier support in semiconductor processing.

Source record↗
NASA NTRS2019

Standardizing Microprocessor and GPU Radiation Test Approaches

Microprocessor, Graphics Processing Units (GPUs) and DDRx memory devices have emerged as promising next-generation technologies that enables both high performance processing and acceleration of complex algorithms for the latest challenges in human spaceflight, autonomous vehicles and artificial intelligence (AI). The feature sets of these devices offer exponential increases to throughput, calculation capability and system autonomy when compared to legacy flight systems. NASA's Electronic Part and Packaging (NEPP) Program has conducted an investigation into the radiation susceptibility of leading edge devices and process technologies by establishing standardized test approaches. Unlike most discrete devices, these require state of the art test systems to induce specific hardware activity similar to application software, thus allowing the characterization of failure modes within the system. To best characterize the tested part, NEPP eliminates variables that may impact device performance under radiation. Simplification of remaining system-level variables leads to an improved understanding of complex computational devices and their intended applications. The failure modes and error signatures that are recorded during testing are used to determine radiation sensitivity of the semiconductor process and the microcode architecture of the design. This presentation will discuss the test methodology that NASA Electronic Parts and Packaging (NEPP) is working to establish for its microprocessor, GPU and DDRx memory test programs to provide guidance on these devices and their underlying technology, in regards to their potential usage in future space flight systems.

GPU↗
NASA NTRS1993

A sub-cm micromachined electron microscope

A new approach for fabricating macroscopic (approximately 10x10x10 mm(exp 3)) structures with micron accuracy has been developed. This approach combines the precision of semiconductor processing and fiber optic technologies. A (100) silicon wafer is anisotropically etched to create four orthogonal v-grooves and an aperture on each 10x12 mm die. Precision 308 micron optical fibers are sandwiched between the die to align the v-grooves. The fiber is then anodically bonded to the die above and below it. This procedure is repeated to create thick structures and a stack of 5 or 6 die will be used to create a miniature scanning electron microscope (MSEM). Two die in the structure will have a segmented electrode to deflect the beam and correct for astigmatism. The entire structure is UHV compatible. The performance of an SEM improves as its length is reduced and a sub-cm 2 keV MSEM with a field emission source should have approximately 1 nm resolution. A low voltage high resolution MSEM would be useful for the examination of biological specimens and semiconductors with a minimum of damage. The first MSEM will be tested with existing 6 micron thermionic sources. In the future a micromachined field emission source will be used. The stacking technology presented in this paper can produce an array of MSEMs 1 to 30 mm in length with a 1 mm or larger period. A key question being addressed by this research is the optimum size for a low voltage MSEM which will be determined by the required spatial resolution, field of view, and working distance.

Feinerman, A. D.↗