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Introduction to Quantum Computing

Quantum computing offers the potential to revolutionize high-performance computing by providing a means to solve certain computational problems asymptotically faster than any classical computer. Quantum computing has advanced recently from merely a theoretical possibility to engineered reality, including commercial entities offering early prototype quantum processors, both special-purpose quantum annealers and general-purpose gate-model processors. The media have been showcasing each new development and implicitly conveying the message that quantum-computing ubiquity is nigh. Here, we will respond to this hype and provide an overview of the exciting but still early state of the field. In this tutorial, we introduce participants to the computational models that give quantum computing its immense computational power. We examine the thought processes that programmers need to map problems to quantum computers. And we discuss hardware and algorithmic challenges that must be overcome before quantum computing becomes a component of every software developer's repertoire. (Update of 2022 slides)

Quantum computing↗

Front-illuminated CCD with open pinned-phase region and two-phase transfer gate regions

A front-illuminated CCD of relative high quantum efficiency (QE) and high charge transfer efficiency (CTE) utilizes an open-phase region for receiving photons and two-phase gate regions (.phi..sub.1 and .phi..sub.2) for transferring electrons collected in one pixel to the next. The open-phase region is implanted with additional n-type elements (phosphorus) in order to increase the potential of the CCD channel in the open-phase region for collection of electrons and additionally implanted with concentrated and very shallow p-type elements (boron) to pin the surface of the n-channel in the open-phase region to OV, while gate region .phi..sub.1 and .phi..sub.2 are biased to -3.5V and driven to +10V by a two-phase transfer clock. The open pinned-phase (OPP) region thus permits two-phase transfer clocking and optimum reception of photons during the integration periods between transfer clock pulses.

Janesick, James R.↗

Self-consistent Quantum Iteratively Sparsified Hamiltonian Algorithm (SQuISH)

Due to coherence time limitations, reducing the resources required to run quantum algorithms and simulate physical systems on a quantum computer is crucial. With regards to Hamiltonian simulation, a significant effort has focused on building efficient algorithms using various factorizations and truncations, typically derived from the Hamiltonian alone. We introduce a new paradigm for improving Hamiltonian simulation and reducing the cost of ground state problems based on ideas recently developed for classical chemistry simulations. The key idea is that one can find efficient ways to reduce resources needed by quantum algorithms by making use of two key pieces of information: the Hamiltonian operator and an approximate ground state wavefunction. We refer to our algorithm as the self-consistent quantum iteratively sparsified Hamiltonian (SQuISH). By performing our scheme iteratively, one can drive SQuISH to create an accurate wavefunction using a truncated, resource-efficient Hamiltonian. By utilizing this more compact Hamiltonian, our algorithm provides an approach to reduce the gate complexity of ground state calculations on quantum hardware. As proof of principle, we implement SQuISH using configuration interaction for small molecules and coupled cluster for larger systems. Through our combination of approaches, we demonstrate how it performs on a range of systems, the largest of which would require more than 200 qubits to run on quantum hardware.

Diana Chamaki↗

Dc and microwave characteristics of a high current double interface GaAs/InGaAs/AlGaAs pseudomorphic modulation-doped field-effect transistor

Extremely large current double interface GaAs/In(0.15)Ga(0.85)As/Al(0.15)Ga(0.85)As pseudomorphic modulation-doped field-effect transistors (MODFET's) grown by molecular beam epitaxy were achieved. The 1-micron gate devices studied have peak current levels (430 mA/mm at 300 K and 483mA/mm at 77 K) roughly one and a half to two times that found in single interface pseudomorphic MODFET's. These devices also retain high transconductances over a broad range of gate voltage, peaking at 312 mS/mm at 300 K and 362 mS/mm at 77 K. Excellent microwave performance is also obtained with a maximum frequency of oscillation (f-max) of 37 GHz and a current gain cut-off frequency of as high as 23 GHz at 300 K. An output power level of 14 dBm (1 dB gain compression) was obtained at 6 GHz for a 290-micron gate width. This double interface single quantum well MODFET may be of great importance in millimeter wave power amplifiers.

Henderson, T.↗

Producing CCD imaging sensor with flashed backside metal film

A backside illuminated CCD imaging sensor for reading out image charges from wells of the array of pixels is significantly improved for blue, UV, far UV and low energy x-ray wavelengths (1-5000.ANG.) by so overthinning the backside as to place the depletion edge at the surface and depositing a thin transparent metal film of about 10.ANG. on a native-quality oxide film of less than about 30.ANG. grown on the thinned backside. The metal is selected to have a higher work function than that of the semiconductor to so bend the energy bands (at the interface of the semiconductor material and the oxide film) as to eliminate wells that would otherwise trap minority carriers. A bias voltage may be applied to extend the frontside depletion edge to the interface of the semiconductor material with the oxide film in the event there is not sufficient thinning. This metal film (flash gate), which improves and stabilizes the quantum efficiency of a CCD imaging sensor, will also improve the QE of any p-n junction photodetector.

Janesick, James R.↗

CCD imaging sensor with flashed backside metal film

A backside illuminated CCD imaging sensor for reading out image charges from wells of the array of pixels is significantly improved for blue, UV, far UV and low energy x-ray wavelengths (1-5000.ANG.) by so overthinning the backside as to place the depletion edge at the surface and depositing a thin transparent metal film of about 10.ANG. on a native-quality oxide film of less than about 30.ANG. grown on the thinned backside. The metal is selected to have a higher work function than that of the semiconductor to so bend the energy bands (at the interface of the semiconductor material and the oxide film) as to eliminate wells that would otherwise trap minority carriers. A bias voltage may be applied to extend the frontside depletion edge to the interface of the semiconductor material with the oxide film in the event there is not sufficient thinning. This metal film (flash gate), which improves and stabilizes the quantum efficiency of a CCD imaging sensor, will also improve the QE of any p-n junction photodetector.

Janesick, James R.↗

Low-noise behavior of InGaAs quantum-well-structured modulation-doped FET's from 10 to the -2nd to 10 to the 8 Hz

Equivalent gate noise voltage spectra of 1-micron gate-length modulation-doped FET's with pseudomorphic InGaAs quantum-well structure have been measured for the frequency range of 0.01 Hz to 100 MHz and commpared with the noise spectra of conventional AlGaAs/GaAs MODFET's and GaAs MESFET's. The prominent generation-recombination (g-r) noise bulge commonly observed in the vicinity of 10 kHz in conventional MODFET's at 300 K does not appear in the case of the new InGaAs quantum-well MODFET. Instead, its noise spectra indicate the presence of low-intensity multiple g-r noise components superimposed on a reduced 1/f noise. The LF noise intensity in the new device appears to be the lowest among those observed in any MODFET or MESFET. The noise spectra at 82 K in the new device represent nearly true 1/f noise. This unusual low-noise behavior of the new structure suggests the effectiveness of electron confinement in the quantum well that significantaly reduces electron trapping in the n-AlGaAs, and thus eliminates the g-r noise bulge observed in conventional MODFET's.

Liu, Shih-Ming J.↗

Selective equilibration among the current-carrying states in the quantum Hall regime

The Hall resistance of a two-dimensional electron gas is measured with gated probes to determine the extent of equilibration among the N current-carrying states in the quantum Hall regime. After traveling macroscopic distances, current injected into the first state is equilibrated among the N - 1 lowest states but equilibration into the highest state varies strongly across the Hall plateau. This is attributed to a change in the Nth state from being localized within a magnetic length of the edge to substantially extending into the sample.

Alphenaar, B. W.↗

The CCD flash gate

Preliminary findings are presented for a new approach that significantly improves the quantum efficiency of the current generation of high-performance, thinned, backside illuminated silicon CCDs. Experiments have shown that the application of a less than 4-micron thick layer of metal with high work function to the backside of the CCD can yield 100-percent internal quantum efficiency in the visible, UV, XUV and soft X-ray regions of the spectrum. Theory and solid state models describing the new technique (the 'CCD flash gate'), and a considerable amount of experimental data, are discussed. Specific recommendations for use of the flash gate in present and future CCDs are also reviewed.

Janesick, James↗

Dynamical Decoupling of Crosstalk on Superconducting Qubit Devices

Current NISQ devices are prone to errors. In order to be used for practical applications or achieve fault-tolerant thresholds, strategies to suppress error rates will be needed to maximize the potential of noisy devices. Dynamical decoupling (DD) is one such strategy for suppressing — or at least alleviating — the effects of decoherence, in which sequences of pulses are applied to qubits to decouple their interaction with the environment. Through experimental runs performed on several Rigetti quantum computing units (QPUs), we first demonstrate that DD is capable of improving coherence times for isolated qubits, as well as suppressing errors caused by the ZZ coupling between pairs of qubits. Extending this framework to cycles containing2-qubit gates, we show that DD can be inserted to decouple qubits from crosstalk occurring during neighboring 2-qubit gates, and demonstrate the efficacy of this procedure on quantum approximate optimization algorithm (QAOA) circuits. We also explore the usage of tailored DD sequences for the suppression of characterized error channels. We are grateful for support from the NASA Ames Research Center and from the DARPA ONISQ program under interagency agreement IAA 8839,Annex 114. HYH is supported by the USRA Feynman QuantumAcademy funded by the NAMS R&D Student Program and a UCHellman Fellowship. JS, ZGI and ZW are supported by USRA NASAAcademic Mission Service (NNA16BD14C).

Dynamical decoupling↗

Scheme for Quantum Computing Immune to Decoherence

A constructive scheme has been devised to enable mapping of any quantum computation into a spintronic circuit in which the computation is encoded in a basis that is, in principle, immune to quantum decoherence. The scheme is implemented by an algorithm that utilizes multiple physical spins to encode each logical bit in such a way that collective errors affecting all the physical spins do not disturb the logical bit. The scheme is expected to be of use to experimenters working on spintronic implementations of quantum logic. Spintronic computing devices use quantum-mechanical spins (typically, electron spins) to encode logical bits. Bits thus encoded (denoted qubits) are potentially susceptible to errors caused by noise and decoherence. The traditional model of quantum computation is based partly on the assumption that each qubit is implemented by use of a single two-state quantum system, such as an electron or other spin-1.2 particle. It can be surprisingly difficult to achieve certain gate operations . most notably, those of arbitrary 1-qubit gates . in spintronic hardware according to this model. However, ironically, certain 2-qubit interactions (in particular, spin-spin exchange interactions) can be achieved relatively easily in spintronic hardware. Therefore, it would be fortunate if it were possible to implement any 1-qubit gate by use of a spin-spin exchange interaction. While such a direct representation is not possible, it is possible to achieve an arbitrary 1-qubit gate indirectly by means of a sequence of four spin-spin exchange interactions, which could be implemented by use of four exchange gates. Accordingly, the present scheme provides for mapping any 1-qubit gate in the logical basis into an equivalent sequence of at most four spin-spin exchange interactions in the physical (encoded) basis. The complexity of the mathematical derivation of the scheme from basic quantum principles precludes a description within this article; it must suffice to report that the derivation provides explicit constructions for finding the exchange couplings in the physical basis needed to implement any arbitrary 1-qubit gate. These constructions lead to spintronic encodings of quantum logic that are more efficient than those of a previously published scheme that utilizes a universal but fixed set of gates.

Williams, Colin↗

Pseudomorphic InGaAs/AlGaAs modulation-doped FET's with reduced low-frequency noise and thermally stable performance

A high-performance MODFET structure grown by MBE with the incorporation of a single quantum well In(0.15)Ga(0.85)As layer for the transport of two-dimensional electron gas has been critically examined for its thermal stability at 80 K and low-frequency noise form 0.01 to 10 to the 8th Hz. Experimental results indicate that the behavior of this device in both these respects is much superior when compared with the same behavior of conventional MODFETs. A maximum low-field carrier mobility of 29,000 sq cm/s at 80 K and an average carrier saturation velocity of 2 x 10 to the 7th cm/s at 300 K in a 1-micron gate device clearly indicate that the quality of the pseudomorphic quantum well (InGaAs) layer is either comparable or better than that of the usual GaAs buffer layer. The deep level spectra, obtained through photo-FET measurements, and the low-frequency noise spectra at different temperatures obtained for the new pseudomorphic and conventional MODFET's have clearly indicated that contributions from various deep levels present in the new structure are significantly reduced.

Liu, Shih-Ming↗

Dynamical Decoupling for Measuring and Suppressing Crosstalk

Dynamical decoupling (DD) is a noise-mitigating strategy in which sequences of pulses are applied to single qubits to average out their interaction with the environment. DD has been extensively studied and demonstrated for suppressing single-qubit decoherence and can be tailored for different noise spectrum. We report another important adaptation of DD where crosstalk between qubits are suppressed. We demonstrate the efficiency of this procedure on quantum circuits on superconducting transmon-based quantum devices. We designed a family of syncopated DD sequences that effectively suppress ZZ coupling between qubit pairs, which is the dominating crosstalk form on the device. We insert DD to a quantum circuit whenever single qubits are idle (often during two-qubits gates on other qubits). While standard periodic DD suppress crosstalk between these qubits and their neighbors, the syncopated DD further decouples crosstalk between these qubits. We further designed short sequences that maximize the application of DD without adding time to the quantum circuit execution. Such DD sequences yield significant improvement of the performance of the algorithm on the hardware. The performance is further boosted by combining DD with another mitigation strategy, randomized compilation. Our work demonstrated that syncopated DD is effective and practical way to suppress crosstalk in quantum circuits and serves as a great probe to characterize the crosstalk and inform hardware design.

Quantum Computing↗

Time-delay-and-integration charge coupled devices /CCDs/ applied to the Thematic Mapper

The visible focal plane of the Thematic Mapper, the next generation sensor system for application to earth resource survey, uses complex hybrid assembly techniques to interface silicon photodiodes to JFET preamplifiers. This complexity can be ameliorated by the use of a 20-channel time-delay-and-integration (TDI) CCD with nine stages of integration per channel. By going to a CCD array operating in a TDI mode, over 700 individual op amps can be replaced with only 48 op amps. Smooth spectral response and 70% quantum efficiency have been provided by using doped tin oxide gates over the imaging region.

Thompson, L. L.↗

2-D Modeling of Nanoscale MOSFETs: Non-Equilibrium Green's Function Approach

We have developed physical approximations and computer code capable of realistically simulating 2-D nanoscale transistors, using the non-equilibrium Green's function (NEGF) method. This is the most accurate full quantum model yet applied to 2-D device simulation. Open boundary conditions and oxide tunneling are treated on an equal footing. Electrons in the ellipsoids of the conduction band are treated within the anisotropic effective mass approximation. Electron-electron interaction is treated within Hartree approximation by solving NEGF and Poisson equations self-consistently. For the calculations presented here, parallelization is performed by distributing the solution of NEGF equations to various processors, energy wise. We present simulation of the "benchmark" MIT 25nm and 90nm MOSFETs and compare our results to those from the drift-diffusion simulator and the quantum-corrected results available. In the 25nm MOSFET, the channel length is less than ten times the electron wavelength, and the electron scattering time is comparable to its transit time. Our main results are: (1) Simulated drain subthreshold current characteristics are shown, where the potential profiles are calculated self-consistently by the corresponding simulation methods. The current predicted by our quantum simulation has smaller subthreshold slope of the Vg dependence which results in higher threshold voltage. (2) When gate oxide thickness is less than 2 nm, gate oxide leakage is a primary factor which determines off-current of a MOSFET (3) Using our 2-D NEGF simulator, we found several ways to drastically decrease oxide leakage current without compromising drive current. (4) Quantum mechanically calculated electron density is much smaller than the background doping density in the poly silicon gate region near oxide interface. This creates an additional effective gate voltage. Different ways to. include this effect approximately will be discussed.

Svizhenko, Alexei↗

Increase in the Random Dopant Induced Threshold Fluctuations and Lowering in Sub 100 nm MOSFETs Due to Quantum Effects: A 3-D Density-Gradient Simulation Study

In this paper we present a detailed simulation study of the influence of quantum mechanical effects in the inversion layer on random dopant induced threshold voltage fluctuations and lowering in sub 100 nm MOSFETs. The simulations have been performed using a 3-D implementation of the density gradient (DG) formalism incorporated in our established 3-D atomistic simulation approach. This results in a self-consistent 3-D quantum mechanical picture, which implies not only the vertical inversion layer quantisation but also the lateral confinement effects related to current filamentation in the 'valleys' of the random potential fluctuations. We have shown that the net result of including quantum mechanical effects, while considering statistical dopant fluctuations, is an increase in both threshold voltage fluctuations and lowering. At the same time, the random dopant induced threshold voltage lowering partially compensates for the quantum mechanical threshold voltage shift in aggressively scaled MOSFETs with ultrathin gate oxides.

Asenov, Asen↗

2D Quantum Mechanical Study of Nanoscale MOSFETs

With the onset of quantum confinement in the inversion layer in nanoscale MOSFETs, behavior of the resonant level inevitably determines all device characteristics. While most classical device simulators take quantization into account in some simplified manner, the important details of electrostatics are missing. Our work addresses this shortcoming and provides: (a) a framework to quantitatively explore device physics issues such as the source-drain and gate leakage currents, DIBL, and threshold voltage shift due to quantization, and b) a means of benchmarking quantum corrections to semiclassical models (such as density-gradient and quantum-corrected MEDICI). We have developed physical approximations and computer code capable of realistically simulating 2-D nanoscale transistors, using the non-equilibrium Green's function (NEGF) method. This is the most accurate full quantum model yet applied to 2-D device simulation. Open boundary conditions and oxide tunneling are treated on an equal footing. Electrons in the ellipsoids of the conduction band are treated within the anisotropic effective mass approximation. We present the results of our simulations of MIT 25, 50 and 90 nm "well-tempered" MOSFETs and compare them to those of classical and quantum corrected models. The important feature of quantum model is smaller slope of Id-Vg curve and consequently higher threshold voltage. Surprisingly, the self-consistent potential profile shows lower injection barrier in the channel in quantum case. These results are qualitatively consistent with ID Schroedinger-Poisson calculations. The effect of gate length on gate-oxide leakage and subthreshold current has been studied. The shorter gate length device has an order of magnitude smaller current at zero gate bias than the longer gate length device without a significant trade-off in on-current. This should be a device design consideration.

Svizhenko, Alexei↗

2D Quantum Transport Modeling in Nanoscale MOSFETs

With the onset of quantum confinement in the inversion layer in nanoscale MOSFETs, behavior of the resonant level inevitably determines all device characteristics. While most classical device simulators take quantization into account in some simplified manner, the important details of electrostatics are missing. Our work addresses this shortcoming and provides: (a) a framework to quantitatively explore device physics issues such as the source-drain and gate leakage currents, DIBL, and threshold voltage shift due to quantization, and b) a means of benchmarking quantum corrections to semiclassical models (such as density- gradient and quantum-corrected MEDICI). We have developed physical approximations and computer code capable of realistically simulating 2-D nanoscale transistors, using the non-equilibrium Green's function (NEGF) method. This is the most accurate full quantum model yet applied to 2-D device simulation. Open boundary conditions, oxide tunneling and phase-breaking scattering are treated on equal footing. Electrons in the ellipsoids of the conduction band are treated within the anisotropic effective mass approximation. Quantum simulations are focused on MIT 25, 50 and 90 nm "well- tempered" MOSFETs and compared to classical and quantum corrected models. The important feature of quantum model is smaller slope of Id-Vg curve and consequently higher threshold voltage. These results are quantitatively consistent with I D Schroedinger-Poisson calculations. The effect of gate length on gate-oxide leakage and sub-threshold current has been studied. The shorter gate length device has an order of magnitude smaller current at zero gate bias than the longer gate length device without a significant trade-off in on-current. This should be a device design consideration.

Svizhenko, Alexei↗