Engineering Papers⌕ Search

SEARCH · Engineering Papers

Results for “pixel detector”

Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

Quote a phrase for an exact phrase match. Source license links do not imply unrestricted reuse.

At least 55 records · Page 3
All sourcesNASA NTRSDOE OSTI
DOE OSTI2025

Rad-hard readout system for Timepix3 Hybrid Pixel Detectors

The Beam Gas Ionisation (BGI) profile monitor, located in the Proton Synchrotron (PS) and Super Proton Synchrotron (SPS) at CERN, requires a radiation-tolerant readout system to transfer data from the challenging accelerator surroundings to the back-end for processing. The system needs to control and acquire data from four Timepix3 Hybrid Pixel Detectors (HPDs) located directly inside the beam pipe, a highly radioactive environment. It must ensure reliability given limited hardware access and preserve signal integrity for the high-speed data (32 channels at 320 MHz). However, due to the unavailability of a suitable rad-hard Timepix3 readout, the Beam Instrumentation PiXeL (BIPXL) readout system was designed to meet these requirements. This system employs radiation-hardened components such as the GBTx and the FEASTMP, both developed at CERN. It will be compatible with forthcoming hybrid pixel detector initiatives in similarly harsh radiation conditions.

47 OTHER INSTRUMENTATION↗
DOE OSTI2023

Conceptual study of a two-layer silicon pixel detector to tag the passage of muons from cosmic sources through quantum processors

Abstract Recent studies in quantum computing have shown that quantum error correction with large numbers of physical qubits are limited by ionizing radiation from high-energy particles. Depending on the physical setup of the quantum processor, the contribution of muons from cosmic sources can constitute a significant fraction of these interactions. As most of these muons are difficult to stop, we perform a conceptual study of a two-layer silicon pixel detector to tag their hits on a solid-state quantum processor instead. With a typical dilution refrigerator geometry model, we find that efficiencies greater than 50% are most likely to be achieved if at least one of the layers is operated at the deep-cryogenic (<1 K) flanges of the refrigerator. Following this finding, we further propose a novel research program that could allow the development of silicon pixel detectors that are fast enough to provide input to quantum error correction algorithms, can operate at deep-cryogenic temperatures, and have very low power consumption.

Instruments & Instrumentation↗
NASA NTRS2002

Charge Sharing and Charge Loss in a Cadmium-Zinc-Telluride Fine-Pixel Detector Array

Because of its high atomic number, room temperature operation, low noise, and high spatial resolution a Cadmium-Zinc-Telluride (CZT) multi-pixel detector is ideal for hard x-ray astrophysical observation. As part of on-going research at MSFC (Marshall Space Flight Center) to develop multi-pixel CdZnTe detectors for this purpose, we have measured charge sharing and charge loss for a 4x4 (750micron pitch), lmm thick pixel array and modeled these results using a Monte-Carlo simulation. This model was then used to predict the amount of charge sharing for a much finer pixel array (with a 300micron pitch). Future work will enable us to compare the simulated results for the finer array to measured values.

Gaskin, J. A.↗
DOE OSTI2023

PIXEL2020: Tenth International Workshop on Semiconductor Pixel Detectors for Particles and Imaging

This workshop covers various topics related to pixel detector technology. Development and applications will be discussed for charged particle tracking in High Energy Physics, Nuclear Physics, Astrophysics, and X-ray imaging in Astronomy, Biology, Medicine and Material Science. The conference program will also include reports on front and back end electronics, radiation effects, low mass mechanics and construction techniques, and new technologies such as monolithic and 3D integrated detectors.

Sally, Seidel↗
DOE OSTI2017

Characterisation of the high dynamic range Large Pixel Detector (LPD) and its use at X-ray free electron laser sources

The STFC Rutherford Appleton Laboratory have delivered the Large Pixel Detector (LPD) for MHz frame rate imaging at the European XFEL. The detector system has an active area of 0.5 m × 0.5 m and consists of a million pixels on a 500 μm pitch. Sensors have been produced from 500 μm thick Hammamatsu silicon tiles that have been bump bonded to the readout ASIC using a silver epoxy and gold stud technique. Each pixel of the detector system is capable of measuring 10 5 12 keV photons per image readout at 4.5 MHz. In this paper results from the testing of these detectors at the Diamond Light Source and the Linac Coherent Light Source (LCLS) are presented. As a result, the performance of the detector in terms of linearity, spatial uniformity and the performance of the different ASIC gain stages is characterised.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗
DOE OSTI2018

Quest for a Top Quark Partner and Upgrade of the Pixel Detector Readout Chain at the CMS

After the observation of a new particle at CERN experiments, which is consistent with being the Higgs boson, the partner of the top quark is the most anticipated candidate to be discovered next. In many extensions of the standard model of particle physics the principle of naturalness dictates that the top quark partner should exist and be relatively light, at or below the TeV scale. It is hence expected to be accessible at energies and luminosities provided by the LHC machine within the next years of running. This proposal calls for supporting the effort targeting the searches for the top quark partner at the CMS experiment. We focus on scenarios and techniques that have not yet been fully explored at CMS, and that carry a large potential for new physics discovery in the immediate future. The second part of the proposal focuses on the R&D effort aiming for continuing high-quality physics program at the CMS at the high instantaneous luminosities. We propose to take one of the leading roles in the forthcoming upgrade of the Pixel detector at the CMS, and upgrade the data acquisition readout chain that would increase the data volume throughput for the new detector.

72 PHYSICS OF ELEMENTARY PARTICLES AND FIELDS↗
DOE OSTI2016

High-speed imaging at high x-ray energy: CdTe sensors coupled to charge-integrating pixel array detectors

Pixel Array Detectors (PADs) consist of an x-ray sensor layer bonded pixel-by-pixel to an underlying readout chip. This approach allows both the sensor and the custom pixel electronics to be tailored independently to best match the x-ray imaging requirements. Here we describe the hybridization of CdTe sensors to two different charge-integrating readout chips, the Keck PAD and the Mixed-Mode PAD (MM-PAD), both developed previously in our laboratory. The charge-integrating architecture of each of these PADs extends the instantaneous counting rate by many orders of magnitude beyond that obtainable with photon counting architectures. The Keck PAD chip consists of rapid, 8-frame, in-pixel storage elements with framing periods <150 ns. The second detector, the MM-PAD, has an extended dynamic range by utilizing an in-pixel overflow counter coupled with charge removal circuitry activated at each overflow. This allows the recording of signals from the single-photon level to tens of millions of x-rays/pixel/frame while framing at 1 kHz. Both detector chips consist of a 128×128 pixel array with (150 µm){sup 2} pixels.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗
DOE OSTI2019

A Low Power, High Speed Readout for Pixel Detectors Based on an Arbitration Tree

A low-power, high-speed arbitration tree for pixel detector readout is presented. The synchronized, binary tree priority encoder establishes a position dependent priority list at the start of every time frame. Pixels that indicate the presence of data for readout, are sequentially granted access to a shared bus for data transfer to the periphery, without the use of an additional global strobe signal. It can be used for either full frame imaging or zero-suppressed readout, in which case it can simultaneously generate the pixel address. To increase the readout frame rate, the pixel array is subdivided into two halves, which allows interleaved latching of data at the output serializer. The design was implemented in a 65 nm LP-CMOS process for the readout of a 64 x 64 pixel array. Measurement results demonstrate a deadtime-less, full frame imaging rate of ~50 kfps, achieved with a dedicated output for every (32 x 32) 1024 pixels and for a pixel data packet of 11 bits, with no bit errors detected over 1000 frames. The measured energy per bit is 0.94 pJ.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗
NASA NTRS1992

Modulation transfer function measurement technique for small-pixel detectors

A modulation transfer function (MTF) measurement technique suitable for large-format, small-pixel detector characterization has been investigated. A volume interference grating is used as a test image instead of the bar or sine wave target images normally used. This technique permits a high-contrast, large-area, sinusoidal intensity distribution to illuminate the device being tested, avoiding the need to deconvolve raw data with imaging system characteristics. A high-confidence MTF result at spatial frequencies near 200 cycles/mm is obtained. We present results at several visible light wavelengths with a 6.8-micron-pixel CCD. Pixel response functions are derived from the MTF results.

Marchywka, Mike↗
DOE OSTI2015

Radiation hardness assessment of the charge-integrating hybrid pixel detector JUNGFRAU 1.0 for photon science

JUNGFRAU (adJUstiNg Gain detector FoR the Aramis User station) is a two-dimensional hybrid pixel detector for photon science applications in free electron lasers, particularly SwissFEL, and synchrotron light sources. JUNGFRAU is an automatic gain switching, charge-integrating detector which covers a dynamic range of more than 10{sup 4} photons of an energy of 12 keV with a good linearity, uniformity of response, and spatial resolving power. The JUNGFRAU 1.0 application-specific integrated circuit (ASIC) features a 256 × 256 pixel matrix of 75 × 75 μm{sup 2} pixels and is bump-bonded to a 320 μm thick Si sensor. Modules of 2 × 4 chips cover an area of about 4 × 8 cm{sup 2}. Readout rates in excess of 2 kHz enable linear count rate capabilities of 20 MHz (at 12 keV) and 50 MHz (at 5 keV). The tolerance of JUNGFRAU to radiation is a key issue to guarantee several years of operation at free electron lasers and synchrotrons. The radiation hardness of JUNGFRAU 1.0 is tested with synchrotron radiation up to 10 MGy of delivered dose. The effect of radiation-induced changes on the noise, baseline, gain, and gain switching is evaluated post-irradiation for both the ASIC and the hybridized assembly. The bare JUNGFRAU 1.0 chip can withstand doses as high as 10 MGy with minor changes to its noise and a reduction in the preamplifier gain. The hybridized assembly, in particular the sensor, is affected by the photon irradiation which mainly shows as an increase in the leakage current. Self-healing of the system is investigated during a period of 11 weeks after the delivery of the radiation dose. Annealing radiation-induced changes by bake-out at 100 °C is investigated. It is concluded that the JUNGFRAU 1.0 pixel is sufficiently radiation-hard for its envisioned applications at SwissFEL and synchrotron beam lines.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗
DOE OSTI2025

Detector pixel calibration of time-of-flight neutron diffractometers accelerated by machine learning

Modern time-of-flight neutron diffractometers at spallation neutron source are equipped with two dimensional detectors with fine pixelations. The flight path of neutrons from the moderator to the sample and to the detector needs to be precisely calibrated at detector pixel level using standard powders so the diffraction data from all the detector pixels can be correctly time-focused to produce high resolution diffraction peaks. The number of pixels can reach to millions which makes a single-pixel calibration process time-consuming, or even impossible, with conventional fitting routine. Here we presented a machine learning aided calibration process via a “training and predict” process by training machine learning models with the relations between the individual pixel time-of-flight diffraction pattern and fitted diffraction constant. The training models take a portion of the available pixels to predict the diffraction constants precisely and rapidly for massive pixel diffraction patterns.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗
DOE OSTI2020

Characterization of a gigabit transceiver for the ATLAS inner tracker pixel detector readout upgrade

We present a gigabit transceiver prototype Application Specific Integrated Circuit (ASIC), GBCR, for the ATLAS Inner Tracker (ITk) Pixel detector readout upgrade. GBCR is designed in a 65-nm CMOS technology and consists of four upstream receiver channels, a downstream transmitter channel, and an Inter-Integrated Circuit (I2C) slave. The upstream channels receive the data at 5.12 Gbps passing through 5-meter 34-American Wire Gauge (AWG) Twin-axial (Twinax) cables, equalize and retime them with a recovered clock, and then drive an optical transmitter. The downstream channel receives the data at 2.56 Gbps from an optical receiver and drives the cable as same as the upstream channels. The jitter of the upstream channel output is measured to be 35 ps (peak-peak) when the Clock-Data Recovery (CDR) module is turned on and the jitter of the downstream channel output after the cable is 138 ps (peak-peak). The power consumption of each upstream channel is 72 mW when the CDR module is turned on and the downstream channel consumes 27 mW. GBCR survives the total ionizing dose of 200 kGy.

47 OTHER INSTRUMENTATION↗
DOE OSTI2018

Noise propagation issues in Belle II pixel detector power cable

The vertex detector used in the upgrade of High-Energy physics experiment Belle II includes DEPFET pixel detector (PXD) technology. In this complex topology the power supply units and the front-end electronics are connected through a PXD power cable bundle which may propagate the output noise from the power supplies to the vertex area. This article presents a study of the propagation of noise caused by power converters in the PXD cable bundle based on Multi-conductor Transmission Line (MTL) theory. The work exposes the effect of the complex cable topology and shield connections on the noise propagation, which has an impact on the requirements of the power supplies. This analysis is part of the electromagnetic compatibility based design focused on functional safety to define the shield connections and power supply specifications required to ensure the successful integration of the detector and, specifically, to achieve the designed performance of the front-end electronics.

42 ENGINEERING↗
DOE OSTI2014

Development of an X-ray pixel detector with multi-port charge-coupled device for X-ray free-electron laser experiments

This paper presents development of an X-ray pixel detector with a multi-port charge-coupled device (MPCCD) for X-ray Free-Electron laser experiments. The fabrication process of the CCD was selected based on the X-ray radiation hardness against the estimated annual dose of 1.6 × 10{sup 14} photon/mm{sup 2}. The sensor device was optimized by maximizing the full well capacity as high as 5 Me- within 50 μm square pixels while keeping the single photon detection capability for X-ray photons higher than 6 keV and a readout speed of 60 frames/s. The system development also included a detector system for the MPCCD sensor. This paper summarizes the performance, calibration methods, and operation status.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗
DOE OSTI2023

Flatfielding of hybrid pixel detectors in tender x-ray scattering

The ability of the soft matter interfaces beamline at National Synchrotron Light Source II to access x-ray energy in the tender x-ray regime, i.e., from 2.1 to 5 keV, enables new resonant x-ray scattering studies at the sulfur K-edge and others. We present a new approach to correct data acquired in the tender x-ray regime with a Pilatus3 detector in order to improve the data quality and to correct the various artifacts inherent to hybrid pixel detectors, such as variations in modules’ efficiency or noisy detector module junctions. Further, this new flatfielding significantly enhances the data quality and enables detection of weak scattering signals.

47 OTHER INSTRUMENTATION↗
DOE OSTI2015

The overvoltage protection module for the power supply system for the pixel detector at Belle II experiment at KEK

In this paper the overvoltage protection modules (OVP) for the power supply (PS) system of the Belle II pixel detector (PXD) are described. The aim of the OVP is to protect the detector and associated electronics against overvoltage conditions. Most critical in the system are voltages supplying the front-end ASICs. The PXD detector consists of the DEPFET sensor modules with integrated chips like the Drain Current Digitizer, the Switcher and the Data Handling Processor. These chips, implemented in modern sub-micron technologies, are quite vulnerable to variations in the supply voltages. The PXD will be placed in the Belle II experiment as close as possible to the interaction point, where access during experiment is very limited or even impossible, thus the PS and OVP systems exploit the remote-sensing method. Overvoltage conditions are due to failures of the PS itself, wrong setting of the output voltages or transient voltages coming out of hard noisy environment of the experiment. The OVP modules are parts of the PS modules. For powering the PXD 40 PS modules are placed 15 m outside the Belle II spectrometer. Each one is equipped with the OVP board. All voltages (22) are grouped in 4 domains: Analog, Digital, Steering and Gate which have independent grounds. The OVP boards are designed from integrated circuits from Linear Technology. All configurations were simulated with the Spice program. The control electronics is designed in a Xilinx CPLD. Two types of integrated circuits were used. LT4356 surge stopper protects loads from high voltage transients. The output voltages are limited to a safe value and also protect loads against over current faults. For less critical voltages, the LTC2912 voltage monitors are used that detect under-voltage and overvoltage events. It has to be noted that the OVP system is working independently of any other protection of the PS system, which increases its overall reliability. (authors)

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗
DOE OSTI2017

Design and Test of a 65nm CMOS Front-End with Zero Dead Time for Next Generation Pixel Detectors

This work is concerned with the experimental characterization of a synchronous analog processor with zero dead time developed in a 65 nm CMOS technology, conceived for pixel detectors at the HL-LHC experiment upgrades. It includes a low noise, fast charge sensitive amplifier with detector leakage compensation circuit, and a compact, single ended comparator able to correctly process hits belonging to two consecutive bunch crossing periods. A 2-bit Flash ADC is exploited for digital conversion immediately after the preamplifier. A description of the circuits integrated in the front-end processor and the initial characterization results are provided

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗
DOE OSTI2023

The design and test results of A Giga-Bit Cable Receiver (GBCR) for the ATLAS Inner Tracker Pixel Detector

This paper presents the design and test results of a Gigabit Cable Receiver ASIC called GBCR for the HL-LHC upgrade of the ATLAS Inner Tracker (ITk) pixel detector. Three prototypes (GBCR1, GBCR2, and GBCR3) have been designed in the CERN-identified 65 nm CMOS technology. GBCR receives seven (GBCR2) or six (GBCR3) channels (RX) each at 1.28 Gbps from the front-end readout chip RD53B via flex cables up to 1 meter and Twinax cables up to 5 meters and sends the equalized and retimed signals to lpGBT. Both GBCR2 and GBCR3 ASICs have two transmitting channels (TX) that pre-emphasize the signals from lpGBT before sending them to RD53B through the same cables. No Single-Event Upset (SEU) is observed in any tested channels of GBCR2 in a 400 MeV proton beam. The extrapolated bit error rate for the future HL-LHC application is below 8*10^(-16), significantly below the specified BER criterion. GBCR3 is designed to improve the immunity to single-event-upset by applying the Triple Modular Redundancy (TMR) technology to all RX channels. The retimed signals from GBCR3 have less total jitter than those from GBCR2 (35 ps versus 79 ps). Each receiver channel of GBCR3 consumes 75% more power than that of GBCR2.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗