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At least 55 records · Page 3
All sourcesNASA NTRSDOE OSTI
NASA NTRS1993

Improvements to pulsed phase locked loop strain monitor

A pulse phase locked loop system according to the present invention is described. A frequency generator such as a voltage controlled oscillator (VCO) generates an output signal and a reference signal having a frequency equal to that of the output signal. A transmitting gate gates the output frequency signal and this gated signal drives a transmitting transducer which transmits an acoustic wave through a material. A sample/hold samples a signal indicative of the transmitted wave which is received by a receiving transducer. Divide-by-n counters control these gating and sampling functions in response to the reference signal of the frequency generator. Specifically, the output signal is gated at a rate of F/h, wherein F is the frequency of the output signal and h is an integer; and the received signal is sampled at a delay of F/n wherein n is an integer.

Froggatt, Mark E.↗
NASA NTRS1995

Pulsed phase locked loop strain monitor

A pulse phase locked loop system according to the present invention is described. A frequency generator such as a voltage controlled oscillator (VCO) generates an output signal and a reference signal having a frequency equal to that of the output signal. A transmitting gate gates the output frequency signal and this gated signal drives a transmitting transducer which transmits an acoustic wave through a material. A sample/hold samples a signal indicative of the transmitted wave which is received by a receiving transducer. Divide-by-n counters control these gating and sampling functions in response to the reference signal of the frequency generator. Specifically, the output signal is gated at a rate of F/h, wherein F is the frequency of the output signal and h is an integer; and the received signal is sampled at a delay of F/n wherein n is an integer.

Froggatt, Mark E.↗
NASA NTRS1968

Phase-lock loop frequency control and the dropout problem

Technique automatically sets the frequency of narrow band phase-lock loops within automatic lock-in-range. It presets a phase-lock loop to a desired center frequency with a closed loop electronic frequency discriminator and holds the phase-lock loop to that center frequency until lock is achieved.

Attwood, S.↗
NASA NTRS1972

A class of all digital phase locked loops - Modelling and analysis.

An all digital phase locked loop which tracks the phase of the incoming signal once per carrier cycle is proposed. The different elements and their functions, and the phase lock operation are explained in detail. The general digital loop operation is governed by a non-linear difference equation from which a suitable model is developed. The lock range for the general model is derived. The performance of the digital loop for phase step, and frequency step inputs for different levels of quantization without loop filter, are studied. The analytical results are checked by simulating the actual system on the digital computer.

Reddy, C. P.↗
NASA NTRS1973

A class of all digital phase locked loops - Modeling and analysis

An all digital phase locked loop which tracks the phase of the incoming signal once per carrier cycle is proposed. The different elements and their functions, and the phase lock operation are explained in detail. The general digital loop operation is governed by a nonlinear difference equation from which a suitable model is developed. The lock range for the general model is derived. The performance of the digital loop for phase step and frequency step inputs for different levels of quantization without loop filter are studied. The analytical results are checked by simulating the actual system on the digital computer.

Reddy, C. P.↗
NASA NTRS1975

Uniform sampling analysis of a hybrid phase-locked loop with a sample-and-hold phase detector

Phase-locked-loop (PLL) bit synchronizers often employ integrate-and-dump type phase detectors that provide phase error information only at discrete points in time. Usually these phase detectors are followed by sample-and-hold circuits to produce a stairstep error voltage as the input to a standard analog circuit loop filter. When the loop is configured in this manner, it is referred to as a hybrid PLL. Sampled-data analysis methods (Z transforms) are used to determine the stability and transient response of this loop.

Barab, S.↗
NASA NTRS1993

Analysis Of Noise In Optical Phase-Locked Loop

Report presents theoretical and experimental analysis of noise in coherent optical phase-locked loop. Optical phase-locked loop being considered for use in heterodyne reception of binary pulse-position modulation at data rate of 100 Kb/s in optical communication system in which transmitter also includes frequency-stabilized laser.

Win, Moe Z.↗
NASA NTRS1961

A Threshold Theory for Phase-Locked Loops

A model of a phase-locked loop has been developed which is valid for all signal-to-noise ratios. The model is in the form of a nonlinear feedback system with randomly time-varying parameters. The analysis considers two operating regions. In low signal-to-noise ratio regions, the important consideration is stability. We want to study the asymptotic stability in the mean of a nonlinear system. It follows directly that a necessary condition for asymptotic stability of any nonlinear system is that a linearized model about some equilibrium point be asymptotically stable. By considering all possible equilibrium points, we can find an upper bound on the value of noise density which makes the system unstable. This upper bound represents a threshold value for system operation. In high signal-to-noise ratio regions, our results provide an exact statistical. description of system behavior. Therefore, knowledge of the spectrum of the signal and noise may be used to optimize the system configuration.

Van Trees, H. L.↗