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All sources NASA NTRS DOE OSTI

NASA NTRS1990

A concatenated coded modulation scheme for error control

A concatenated coded modulation scheme for error control in data communications is presented. The scheme is achieved by concatenating a Reed-Solomon outer code and a bandwidth efficient block inner code for M-ary PSK modulation. Error performance of the scheme is analyzed for an AWGN channel. It is shown that extremely high reliability can be attained by using a simple M-ary PSK modulation inner code and relatively powerful Reed-Solomon outer code. Furthermore, if an inner code of high effective rate is used, the bandwidth expansion required by the scheme due to coding will be greatly reduced. The proposed scheme is particularly effective for high speed satellite communications for large file transfer where high reliability is required. Also presented is a simple method for constructing block codes for M-ary PSK modulation. Some short M-ary PSK codes with good minimum squared Euclidean distance are constructed. These codes have trellis structure and hence can be decoded with a soft-decision Viterbi decoding algorithm.

Kasami, Tadao↗

NASA NTRS1985

Further Results on Rate 1/N Convolutional Code Constructions with Minimum Required SNR Criterion

New good (K, 1/N) convolutional codes for 8 or = to K or = to 13 and 2 or = to N or = to 8 were found and tabulated which require minimum signal-to-noise ratio (SNR) for given desired bit error rates (BER) with Viterbi decoding. The transfer function bound was used for the BER evaluations. These low-rate codes are expected to have a number of applications, especially for systems having large bandwidth-bit time products such as deep space and spread spectrum communication systems.

Lee, P. J.↗

NASA NTRS1985

Further results on rate 1/N convolutional code constructions with minimum required SNR criterion

Lee, P. J.↗

NASA NTRS1992

Binary weight distributions of some Reed-Solomon codes

The binary weight distributions of the (7,5) and (15,9) Reed-Solomon (RS) codes and their duals are computed using the MacWilliams identities. Several mappings of symbols to bits are considered and those offering the largest binary minimum distance are found. These results are then used to compute bounds on the soft-decoding performance of these codes in the presence of additive Gaussian noise. These bounds are useful for finding large binary block codes with good performance and for verifying the performance obtained by specific soft-coding algorithms presently under development.

Pollara, F.↗

NASA NTRS1979

On the distribution of computation for sequential decoding using the stack algorithm

A method is developed for estimating the computational distribution for the stack algorithm for sequential decoding, that is, the probability that the computation required to decode the first branch of the tree is greater than or equal to N, for small N. The analysis relies heavily on the theory of multitype branching processes. A step in the analysis is the determination of the distribution of the minimum of the cumulative metrics along the transmitted path in the code tree. This is used to obtain the distribution of the number of computations made by the decoder in order to decode the first branch in the tree, and this random variable serves as an approximation of the average number of computations per decoded branch. At information rates below the cutoff rate, the calculated computational performance is virtually identical to that obtained by time-consuming simulations.

Johannesson, R.↗

NASA NTRS1990

Tutorial on Reed-Solomon error correction coding

This tutorial attempts to provide a frank, step-by-step approach to Reed-Solomon (RS) error correction coding. RS encoding and RS decoding both with and without erasing code symbols are emphasized. There is no need to present rigorous proofs and extreme mathematical detail. Rather, the simple concepts of groups and fields, specifically Galois fields, are presented with a minimum of complexity. Before RS codes are presented, other block codes are presented as a technical introduction into coding. A primitive (15, 9) RS coding example is then completely developed from start to finish, demonstrating the encoding and decoding calculations and a derivation of the famous error-locator polynomial. The objective is to present practical information about Reed-Solomon coding in a manner such that it can be easily understood.

Geisel, William A.↗

NASA NTRS1986

A single chip VLSI Reed-Solomon decoder

A new VLSI design of a pipeline Reed-Solomon decoder is presented. The transform decoding technique used in a previous design is replaced by a time domain algorithm. A new architecture that implements such an algorithm permits efficient pipeline processing with minimum circuitry. A systolic array is also developed to perform erasure corrections in the new design. A modified form of Euclid's algorithm is implemented by a new architecture that maintains the throughput rate with less circuitry. Such improvements result in both enhanced capability and a significant reduction in silicon area, therefore making it possible to build a pipeline (31,15)RS decoder on a single VLSI chip.

Shao, H. M.↗

NASA NTRS1987

Bandwidth efficient block codes for M-ary PSK modulation

A class of bandwidth efficient block codes for M-ary PSK modulation is presented. A soft-decision decoding for this class of codes is devised. Some specific short codes for Quad Phase Shift Key (QPSK), 8-PSK and 16-PSK modulations are constructed. These codes have good minimum squared Euclidean distances and provide 2 to 5.8 dB coding gains over uncoded QPSK modulation without (or with little) bandwidth expansion. The complete weight distributions of these specific codes are determined. Based on these weight distributions, their error probabilities are evaluated. Some of these codes have simple trellis structures and hence can be decoded by Viterbi decoding algorithm with relatively simple implementation. Moreover, the codes are very suitable for use as inner codes for various cascaded coding schemes with Reed-Solomon codes as outer codes.

Lin, Shu↗

NASA NTRS1973

Minimum switching network for generating the weight of a binary vector

Vector is divided into three variable sections, and each section is processed by unary-to-binary decoder or adder. Resulting network performs on iterative collection process; all outputs of same kind are collected in same manner. In combination with simple comparator gates, weighting network can also be used as majority network.

Anderson, T. O.↗

NASA NTRS2003

Low Density Parity Check Codes: Bandwidth Efficient Channel Coding

Low Density Parity Check (LDPC) Codes provide near-Shannon Capacity performance for NASA Missions. These codes have high coding rates R=0.82 and 0.875 with moderate code lengths, n=4096 and 8176. Their decoders have inherently parallel structures which allows for high-speed implementation. Two codes based on Euclidean Geometry (EG) were selected for flight ASIC implementation. These codes are cyclic and quasi-cyclic in nature and therefore have a simple encoder structure. This results in power and size benefits. These codes also have a large minimum distance as much as d,,, = 65 giving them powerful error correcting capabilities and error floors less than lo- BER. This paper will present development of the LDPC flight encoder and decoder, its applications and status.

Fong, Wai↗

NASA NTRS1993

Add/Compare/Select Circuit For Rapid Decoding

Prototype decoding system operates at 200 Mb/s. ACS (add/compare/select) gate array is highly integrated emitter-coupled-logic circuit implementing arithmetic operations essential to Viterbi decoding of convolutionally encoded data signals. Principal advantage of circuit is speed. Operates as single unit performing eight additions and finds minimum of eight sums, or operates as two independent units, each performing four additions and finding minimum of four sums. Flexibility enables application to variety of different codes. Includes built-in self-testing circuitry, enabling unit to be tested at full speed with help of only simple test fixture.

Budinger, James M.↗

NASA NTRS2006

Protograph LDPC Codes Over Burst Erasure Channels

In this paper we design high rate protograph based LDPC codes suitable for binary erasure channels. To simplify the encoder and decoder implementation for high data rate transmission, the structure of codes are based on protographs and circulants. These LDPC codes can improve data link and network layer protocols in support of communication networks. Two classes of codes were designed. One class is designed for large block sizes with an iterative decoding threshold that approaches capacity of binary erasure channels. The other class is designed for short block sizes based on maximizing minimum stopping set size. For high code rates and short blocks the second class outperforms the first class.

protgraph based codes↗

NASA NTRS1999

Low Density Parity Check Codes Based on Finite Geometries: A Rediscovery and More

Low density parity check (LDPC) codes with iterative decoding based on belief propagation achieve astonishing error performance close to Shannon limit. No algebraic or geometric method for constructing these codes has been reported and they are largely generated by computer search. As a result, encoding of long LDPC codes is in general very complex. This paper presents two classes of high rate LDPC codes whose constructions are based on finite Euclidean and projective geometries, respectively. These classes of codes a.re cyclic and have good constraint parameters and minimum distances. Cyclic structure adows the use of linear feedback shift registers for encoding. These finite geometry LDPC codes achieve very good error performance with either soft-decision iterative decoding based on belief propagation or Gallager's hard-decision bit flipping algorithm. These codes can be punctured or extended to obtain other good LDPC codes. A generalization of these codes is also presented.

Kou, Yu↗

NASA NTRS1993

Box codes of lengths 48 and 72

A self-dual code length 48, dimension 24, with Hamming distance essentially equal to 12 is constructed here. There are only six code words of weight eight. All the other code words have weights that are multiples of four and have a minimum weight equal to 12. This code may be encoded systematically and arises from a strict binary representation of the (8,4;5) Reed-Solomon (RS) code over GF (64). The code may be considered as six interrelated (8,7;2) codes. The Mattson-Solomon representation of the cyclic decomposition of these codes and their parity sums are used to detect an odd number of errors in any of the six codes. These may then be used in a correction algorithm for hard or soft decision decoding. A (72,36;15) box code was constructed from a (63,35;8) cyclic code. The theoretical justification is presented herein. A second (72,36;15) code is constructed from an inner (63,27;16) Bose Chaudhuri Hocquenghem (BCH) code and expanded to length 72 using box code algorithms for extension. This code was simulated and verified to have a minimum distance of 15 with even weight words congruent to zero modulo four. The decoding for hard and soft decision is still more complex than the first code constructed above. Finally, an (8,4;5) RS code over GF (512) in the binary representation of the (72,36;15) box code gives rise to a (72,36;16*) code with nine words of weight eight, and all the rest have weights greater than or equal to 16.

Solomon, G.↗

NASA NTRS1978

An upper bound for codes in a two-access binary erasure channel

A method for determining an upper bound for the size of a code for a two-access binary erasure channel is presented. For uniquely decodable codes, this bound gives a combinatorial proof of a result by Liao. Examples of the bound are given for codes with minimum distance 4.

Van Tilborg, H. C. A.↗

NASA NTRS1989

A recursive technique for adaptive vector quantization

Vector Quantization (VQ) is fast becoming an accepted, if not preferred method for image compression. The VQ performs well when compressing all types of imagery including Video, Electro-Optical (EO), Infrared (IR), Synthetic Aperture Radar (SAR), Multi-Spectral (MS), and digital map data. The only requirement is to change the codebook to switch the compressor from one image sensor to another. There are several approaches for designing codebooks for a vector quantizer. Adaptive Vector Quantization is a procedure that simultaneously designs codebooks as the data is being encoded or quantized. This is done by computing the centroid as a recursive moving average where the centroids move after every vector is encoded. When computing the centroid of a fixed set of vectors the resultant centroid is identical to the previous centroid calculation. This method of centroid calculation can be easily combined with VQ encoding techniques. The defined quantizer changes after every encoded vector by recursively updating the centroid of minimum distance which is the selected by the encoder. Since the quantizer is changing definition or states after every encoded vector, the decoder must now receive updates to the codebook. This is done as side information by multiplexing bits into the compressed source data.

Lindsay, Robert A.↗

DOE OSTI2025

Fault Tolerant Decoding of QLDPC-GKP Codes with Circuit Level Soft Information

Concatenated bosonic-stabilizer codes have recently gained prominence as promising candidates for achieving low-overhead fault-tolerant quantum computing in the long term. In such systems, analog information obtained from the syndrome measurements of an inner bosonic code is used to inform decoding for an outer code layer consisting of a discrete-variable stabilizer code such as a surface code. The use of Quantum Low-Density Parity Check (QLDPC) codes as an outer code is of particular interest due to the significantly higher encoding rates offered by these code families, leading to a further reduction in overhead for large-scale quantum computing. Recent works have investigated the performance of QLDPC-GKP codes in detail, and the use of analog information from the inner code significantly boosts decoder performance. However, the noise models assumed in these works are typically limited to depolarizing or phenomenological noise. In this paper, we investigate the performance of QLDPC-GKP concatenated codes under circuit-level noise, based on a model introduced by Noh et al. in the context of the surface-GKP code. To demonstrate the performance boost from analog information, we investigate three scenarios: (a) decoding without soft information, (b) decoding with precomputed error probabilities but without real-time soft information, and (c) decoding with real-time soft information obtained from round-to-round decoding of the inner GKP code. Results show minimal improvement between (a) and (b), but a significant boost in (c), indicating that real-time soft information is critical for concatenated decoding under circuit-level noise. We also study the effect of measurement schedules with varying depths and show that using a schedule with minimum depth is essential for obtaining reliable soft information from the inner code.

Borah, Shantom K. [Arizona U. (main)]↗

NASA NTRS1972

A high speed sequential decoder

The performance and theory of operation for the High Speed Hard Decision Sequential Decoder are delineated. The decoder is a forward error correction system which is capable of accepting data from binary-phase-shift-keyed and quadriphase-shift-keyed modems at input data rates up to 30 megabits per second. Test results show that the decoder is capable of maintaining a composite error rate of 0.00001 at an input E sub b/N sub o of 5.6 db. This performance has been obtained with minimum circuit complexity.

Lum, H., Jr.↗