Engineering Papers⌕ Search

SEARCH · Engineering Papers

Results for “memory controller”

Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

Quote a phrase for an exact phrase match. Source license links do not imply unrestricted reuse.

At least 55 records · Page 3
All sourcesNASA NTRSDOE OSTI
NASA NTRS1984

Reed Solomon codes for error control in byte organized computer memory systems

A problem in designing semiconductor memories is to provide some measure of error control without requiring excessive coding overhead or decoding time. In LSI and VLSI technology, memories are often organized on a multiple bit (or byte) per chip basis. For example, some 256K-bit DRAM's are organized in 32Kx8 bit-bytes. Byte oriented codes such as Reed Solomon (RS) codes can provide efficient low overhead error control for such memories. However, the standard iterative algorithm for decoding RS codes is too slow for these applications. Some special decoding techniques for extended single-and-double-error-correcting RS codes which are capable of high speed operation are presented. These techniques are designed to find the error locations and the error values directly from the syndrome without having to use the iterative algorithm to find the error locator polynomial.

Lin, S.↗
NASA NTRS1987

Approximate Feedback Control for a System With Memory

Report presents algorithm for calculating feedback gain for control of hereditary dynamical systems with control delay. Problem is to approximate optimal feedback gain that minimizes cost function of state and control. Theory applicable to design of controllers for mechanical systems subject to thermal deformation, electrical systems with delay, electrical systems with plasma components, and other systems that exhibit memory.

Milman, Mark H.↗
NASA NTRS1972

The Mariner Venus Mercury flight data subsystem.

The flight data subsystem (FDS) discussed handles both the engineering and scientific measurements performed on the MVM'73. It formats the data into serial data streams, and sends it to the modulation/demodulation subsystem for transmission to earth or to the data storage subsystem for storage on a digital tape recorder. The FDS is controlled by serial digital words, called coded commands, received from the central computer sequencer of from the ground via the modulation/demodulation subsystem. The eight major blocks of the FDS are: power converter, timing and control, engineering data, memory, memory input/output and control, nonimaging data, imaging data, and data output. The FDS incorporates some 4000 components, weighs 17 kg, and uses 35 W of power. General data on the mission and spacecraft are given.

Whitehead, P. B.↗
NASA NTRS2012

Compact Autonomous Hemispheric Vision System

Solar System Exploration camera implementations to date have involved either single cameras with wide field-of-view (FOV) and consequently coarser spatial resolution, cameras on a movable mast, or single cameras necessitating rotation of the host vehicle to afford visibility outside a relatively narrow FOV. These cameras require detailed commanding from the ground or separate onboard computers to operate properly, and are incapable of making decisions based on image content that control pointing and downlink strategy. For color, a filter wheel having selectable positions was often added, which added moving parts, size, mass, power, and reduced reliability. A system was developed based on a general-purpose miniature visible-light camera using advanced CMOS (complementary metal oxide semiconductor) imager technology. The baseline camera has a 92 FOV and six cameras are arranged in an angled-up carousel fashion, with FOV overlaps such that the system has a 360 FOV (azimuth). A seventh camera, also with a FOV of 92 , is installed normal to the plane of the other 6 cameras giving the system a > 90 FOV in elevation and completing the hemispheric vision system. A central unit houses the common electronics box (CEB) controlling the system (power conversion, data processing, memory, and control software). Stereo is achieved by adding a second system on a baseline, and color is achieved by stacking two more systems (for a total of three, each system equipped with its own filter.) Two connectors on the bottom of the CEB provide a connection to a carrier (rover, spacecraft, balloon, etc.) for telemetry, commands, and power. This system has no moving parts. The system's onboard software (SW) supports autonomous operations such as pattern recognition and tracking.

Pingree, Paula J.↗
NASA NTRS1996

Aerodynamic Shape Optimization of Supersonic Aircraft Configurations via an Adjoint Formulation on Parallel Computers

This work describes the application of a control theory-based aerodynamic shape optimization method to the problem of supersonic aircraft design. The design process is greatly accelerated through the use of both control theory and a parallel implementation on distributed memory computers. Control theory is employed to derive the adjoint differential equations whose solution allows for the evaluation of design gradient information at a fraction of the computational cost required by previous design methods. The resulting problem is then implemented on parallel distributed memory architectures using a domain decomposition approach, an optimized communication schedule, and the MPI (Message Passing Interface) Standard for portability and efficiency. The final result achieves very rapid aerodynamic design based on higher order computational fluid dynamics methods (CFD). In our earlier studies, the serial implementation of this design method was shown to be effective for the optimization of airfoils, wings, wing-bodies, and complex aircraft configurations using both the potential equation and the Euler equations. In our most recent paper, the Euler method was extended to treat complete aircraft configurations via a new multiblock implementation. Furthermore, during the same conference, we also presented preliminary results demonstrating that this basic methodology could be ported to distributed memory parallel computing architectures. In this paper, our concern will be to demonstrate that the combined power of these new technologies can be used routinely in an industrial design environment by applying it to the case study of the design of typical supersonic transport configurations. A particular difficulty of this test case is posed by the propulsion/airframe integration.

Reuther, James↗
NASA NTRS1996

Aerodynamic Shape Optimization of Supersonic Aircraft Configurations via an Adjoint Formulation on Parallel Computers

This work describes the application of a control theory-based aerodynamic shape optimization method to the problem of supersonic aircraft design. The design process is greatly accelerated through the use of both control theory and a parallel implementation on distributed memory computers. Control theory is employed to derive the adjoint differential equations whose solution allows for the evaluation of design gradient information at a fraction of the computational cost required by previous design methods (13, 12, 44, 38). The resulting problem is then implemented on parallel distributed memory architectures using a domain decomposition approach, an optimized communication schedule, and the MPI (Message Passing Interface) Standard for portability and efficiency. The final result achieves very rapid aerodynamic design based on higher order computational fluid dynamics methods (CFD). In our earlier studies, the serial implementation of this design method (19, 20, 21, 23, 39, 25, 40, 41, 42, 43, 9) was shown to be effective for the optimization of airfoils, wings, wing-bodies, and complex aircraft configurations using both the potential equation and the Euler equations (39, 25). In our most recent paper, the Euler method was extended to treat complete aircraft configurations via a new multiblock implementation. Furthermore, during the same conference, we also presented preliminary results demonstrating that the basic methodology could be ported to distributed memory parallel computing architectures [241. In this paper, our concem will be to demonstrate that the combined power of these new technologies can be used routinely in an industrial design environment by applying it to the case study of the design of typical supersonic transport configurations. A particular difficulty of this test case is posed by the propulsion/airframe integration.

Reuther, James↗
NASA NTRS1982

Commutated automatic gain control system

The commutated automatic gain control (AGC) system was designed and built for the prototype Loran-C receiver is discussed. The current version of the prototype receiver, the Mini L-80, was tested initially in 1980. The receiver uses a super jolt microcomputer to control a memory aided phase loop (MAPLL). The microcomputer also controls the input/output, latitude/longitude conversion, and the recently added AGC system. The AGC control adjusts the level of each station signal, such that the early portion of each envelope rise is about at the same amplitude in the receiver envelope detector.

Yost, S. R.↗
NASA NTRS1980

Analog actuator-piston memory

Simple analog control system of digitally controlled acuator uses 'stopped' position of actuator as 'memory' and potentiometer as sensing element during power failure to reload drive circuit to value equal to its last position preceding power loss.

Sable, B. A.↗
NASA NTRS1982

Commutated automatic gain control system

A commutated automatic gain control (AGC) system was designed and built for a prototype Loran C receiver. The receiver uses a microcomputer to control a memory aided phase-locked loop (MAPLL). The microcomputer also controls the input/output, latitude/longitude conversion, and the recently added AGC system. The circuit designed for the AGC is described, and bench and flight test results are presented. The AGC circuit described actually samples starting at a point 40 microseconds after a zero crossing determined by the software lock pulse ultimately generated by a 30 microsecond delay and add network in the receiver front end envelope detector.

Yost, S. R.↗
NASA NTRS1992

Alaska SAR processor implementation of E-ERS-1

The synthetic aperture radar (SAR) data processing algorithm used by the Alaska SAR Facility (ASF) for the European Space Agency's first Remote-Sensing Satellite (E-ERS-1) SAR data are examined. Preprocessing highlights two features: signal measurement, which includes signal-to-noise ratio, replica measurement, and noise measurement; and Doppler measurement, which includes clutter lock and autofocus. The custom pipeline architecture performs the main processing with controls at the input interface, range correlator, corner-turn memory, azimuth correlator, and multi-look memory. The control software employs a flexible control scheme. The Committee on Earth Observation Satellites (CEOS) format encapsulates the ASF products. System performance for SAR image processing of E-ERS-1 data is reviewed.

Cuddy, David↗
NASA NTRS1978

An adaptive learning control system for aircraft

A learning control system and its utilization as a flight control system for F-8 Digital Fly-By-Wire (DFBW) research aircraft is studied. The system has the ability to adjust a gain schedule to account for changing plant characteristics and to improve its performance and the plant's performance in the course of its own operation. Three subsystems are detailed: (1) the information acquisition subsystem which identifies the plant's parameters at a given operating condition; (2) the learning algorithm subsystem which relates the identified parameters to predetermined analytical expressions describing the behavior of the parameters over a range of operating conditions; and (3) the memory and control process subsystem which consists of the collection of updated coefficients (memory) and the derived control laws. Simulation experiments indicate that the learning control system is effective in compensating for parameter variations caused by changes in flight conditions.

Mekel, R.↗
NASA NTRS1997

Constrained Multipoint Aerodynamic Shape Optimization Using an Adjoint Formulation and Parallel Computers

An aerodynamic shape optimization method that treats the design of complex aircraft configurations subject to high fidelity computational fluid dynamics (CFD), geometric constraints and multiple design points is described. The design process will be greatly accelerated through the use of both control theory and distributed memory computer architectures. Control theory is employed to derive the adjoint differential equations whose solution allows for the evaluation of design gradient information at a fraction of the computational cost required by previous design methods. The resulting problem is implemented on parallel distributed memory architectures using a domain decomposition approach, an optimized communication schedule, and the MPI (Message Passing Interface) standard for portability and efficiency. The final result achieves very rapid aerodynamic design based on a higher order CFD method. In order to facilitate the integration of these high fidelity CFD approaches into future multi-disciplinary optimization (NW) applications, new methods must be developed which are capable of simultaneously addressing complex geometries, multiple objective functions, and geometric design constraints. In our earlier studies, we coupled the adjoint based design formulations with unconstrained optimization algorithms and showed that the approach was effective for the aerodynamic design of airfoils, wings, wing-bodies, and complex aircraft configurations. In many of the results presented in these earlier works, geometric constraints were satisfied either by a projection into feasible space or by posing the design space parameterization such that it automatically satisfied constraints. Furthermore, with the exception of reference 9 where the second author initially explored the use of multipoint design in conjunction with adjoint formulations, our earlier works have focused on single point design efforts. Here we demonstrate that the same methodology may be extended to treat complete configuration designs subject to multiple design points and geometric constraints. Examples are presented for both transonic and supersonic configurations ranging from wing alone designs to complex configuration designs involving wing, fuselage, nacelles and pylons.

Reuther, James↗
NASA NTRS2007

Two-Way Communication Using RFID Equipment and Techniques

Equipment and techniques used in radio-frequency identification (RFID) would be extended, according to a proposal, to enable short-range, two-way communication between electronic products and host computers. In one example of a typical contemplated application, the purpose of the short-range radio communication would be to transfer image data from a user s digital still or video camera to the user s computer for recording and/or processing. The concept is also applicable to consumer electronic products other than digital cameras (for example, cellular telephones, portable computers, or motion sensors in alarm systems), and to a variety of industrial and scientific sensors and other devices that generate data. Until now, RFID has been used to exchange small amounts of mostly static information for identifying and tracking assets. Information pertaining to an asset (typically, an object in inventory to be tracked) is contained in miniature electronic circuitry in an RFID tag attached to the object. Conventional RFID equipment and techniques enable a host computer to read data from and, in some cases, to write data to, RFID tags, but they do not enable such additional functions as sending commands to, or retrieving possibly large quantities of dynamic data from, RFID-tagged devices. The proposal would enable such additional functions. The figure schematically depicts an implementation of the proposal for a sensory device (e.g., a digital camera) that includes circuitry that converts sensory information to digital data. In addition to the basic sensory device, there would be a controller and a memory that would store the sensor data and/or data from the controller. The device would also be equipped with a conventional RFID chipset and antenna, which would communicate with a host computer via an RFID reader. The controller would function partly as a communication interface, implementing two-way communication protocols at all levels (including RFID if needed) between the sensory device and the memory and between the host computer and the memory. The controller would perform power V

Jedry, Thomas↗
NASA NTRS1992

Parallel fault-tolerant robot control

A shared memory multiprocessor architecture is used to develop a parallel fault-tolerant robot controller. Several versions of the robot controller are developed and compared. A robot simulation is also developed for control observation. Comparison of a serial version of the controller and a parallel version without fault tolerance showed the speedup possible with the coarse-grained parallelism currently employed. The performance degradation due to the addition of processor fault tolerance was demonstrated by comparison of these controllers with their fault-tolerant versions. Comparison of the more fault-tolerant controller with the lower-level fault-tolerant controller showed how varying the amount of redundant data affects performance. The results demonstrate the trade-off between speed performance and processor fault tolerance.

Hamilton, D. L.↗
NASA NTRS1979

Implementing a bubble memory hierarchy system

This paper reports on implementation of a magnetic bubble memory in a two-level hierarchial system. The hierarchy used a major-minor loop device and RAM under microprocessor control. Dynamic memory addressing, dual bus primary memory, and hardware data modification detection are incorporated in the system to minimize access time. It is the objective of the system to incorporate the advantages of bipolar memory with that of bubble domain memory to provide a smart, optimal memory system which is easy to interface and independent of user's system.

Segura, R.↗
NASA NTRS1987

Flexible structure control laboratory development and technology demonstration

An experimental structure is described which was constructed to demonstrate and validate recent emerging technologies in the active control and identification of large flexible space structures. The configuration consists of a large, 20 foot diameter antenna-like flexible structure in the horizontal plane with a gimballed central hub, a flexible feed-boom assembly hanging from the hub, and 12 flexible ribs radiating outward. Fourteen electrodynamic force actuators mounted to the hub and to the individual ribs provide the means to excite the structure and exert control forces. Thirty permanently mounted sensors, including optical encoders and analog induction devices provide measurements of structural response at widely distributed points. An experimental remote optical sensor provides sixteen additional sensing channels. A computer samples the sensors, computes the control updates and sends commands to the actuators in real time, while simultaneously displaying selected outputs on a graphics terminal and saving them in memory. Several control experiments were conducted thus far and are documented. These include implementation of distributed parameter system control, model reference adaptive control, and static shape control. These experiments have demonstrated the successful implementation of state-of-the-art control approaches using actual hardware.

Vivian, H. C.↗
NASA NTRS1988

Memory protection

Accidental overwriting of files or of memory regions belonging to other programs, browsing of personal files by superusers, Trojan horses, and viruses are examples of breakdowns in workstations and personal computers that would be significantly reduced by memory protection. Memory protection is the capability of an operating system and supporting hardware to delimit segments of memory, to control whether segments can be read from or written into, and to confine accesses of a program to its segments alone. The absence of memory protection in many operating systems today is the result of a bias toward a narrow definition of performance as maximum instruction-execution rate. A broader definition, including the time to get the job done, makes clear that cost of recovery from memory interference errors reduces expected performance. The mechanisms of memory protection are well understood, powerful, efficient, and elegant. They add to performance in the broad sense without reducing instruction execution rate.

Denning, Peter J.↗
NASA NTRS1993

Programmable DMA controller

In a data system having a memory, plural input/output (I/O) devices and a bus connecting each of the I/O devices to the memory, a direct memory access (DMA) controller regulating access of each of the I/O devices to the bus, including a priority register storing priorities of bus access requests from the I/O devices, an interrupt register storing bus access requests of the I/O devices, a resolver for selecting one of the I/O devices to have access to the bus, a pointer register storing addresses of locations in the memory for communication with the one I/O device via the bus, a sequence register storing an address of a location in the memory containing a channel program instruction which is to be executed next, an ALU for incrementing and decrementing addresses stored in the pointer register, computing the next address to be stored in the sequence register, computing an initial contents of each of the register. The memory contains a sequence of channel program instructions defining a set up operation wherein the contents of each of the registers in the channel register is initialized in accordance with the initial contents computed by the ALU and an access operation wherein data is transferred on the bus between a location in the memory whose address is currently stored in the pointer register and the one I/O device enabled by the resolver.

Hendry, David F.↗