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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 55 records · Page 3
All sourcesNASA NTRSDOE OSTI
NASA NTRS1984

Software Implemented Fault-Tolerant (SIFT) user's guide

Program development for a Software Implemented Fault Tolerant (SIFT) computer system is accomplished in the NASA LaRC AIRLAB facility using a DEC VAX-11 to interface with eight Bendix BDX 930 flight control processors. The interface software which provides this SIFT program development capability was developed by AIRLAB personnel. This technical memorandum describes the application and design of this software in detail, and is intended to assist both the user in performance of SIFT research and the systems programmer responsible for maintaining and/or upgrading the SIFT programming environment.

Green, D. F., Jr.↗
DOE OSTI2019

Hardware Evaluation Outreach: Application development Challenges Now and for the Exascale Era

The intent of this document is to assist the programmer in understanding details of contemporary and Exascale hardware system design and how these designs provide opportunities and place constraints on next-generation simulation software design. We attempt to clarify hardware organization and component details for our most current and Exascale systems to help program developers understand how software needs to change in order to take best advantage of the performance available. Exascale success is specifically defined for ECP as a 50x improvement over baseline in the aggregate "capability volume" on several KPP axes, of which raw floating point performance is only one, but also includes characteristics such as problem size, system memory size, node memory size, power, and efficiency. This multi-axis approach is particularly important to understand in the context of delivered improvements in real applications, since, for instance, the floating point computation may comprise less than 10% of the actual computational work required. Given the Exascale requirements and the constraints these requirements put on the performance expectations of fundamental system components, the programmer will be forced to re-think several application implementation details in order to achieve exaflop performance on these systems. The remainder of this document aims to present more detail on Exascale era system hardware and the specific areas that the programmer should address to extract performance from these systems. We attempt to give the programmer guidance at both a high- and low-level, providing some abstract suggestions on how to refactor codes given the expected system architectures and some low-level recommendations on how to implement these modifications. We also include a section on training resources that are helpful for both programmers that are just beginning to understand code modifications for contemporary and Exascale systems and for those that have done some refactoring and are now trying to extract maximal application performance from these systems.

97 MATHEMATICS AND COMPUTING↗
DOE OSTI2019

VERAView API and Programmer's Guide (Milestone L3:PHI.MQA-1.P19.03)

VERAView's component-based design facilitates extension and integration into other applications and systems. In addition to describing VERAView's architecture and components, this document provides details on the component application programming interfaces (API), illustrates how to use them independently of VERAView itself, and explains how to extend VERAView with custom visualizations.

97 MATHEMATICS AND COMPUTING↗
DOE OSTI2022

VERAView Programmer’s Manual

VERAView’s component-based design facilitates its extension and integration into other applications and systems. In addition to describing VERAView’s architecture and components, this document provides details on the component application programming interfaces (APIs), illustrates how to use the APIs independently of VERAView itself, and explains how to extend VERAView with custom visualizations.

97 MATHEMATICS AND COMPUTING↗
DOE OSTI2022

Biomolecular assembly processes in the design of novel functional materials

Nature admits innumerable examples where efficient, remarkably parallelized, and precise organization of modular building blocks (e.g., molecules, particles) leads to diverse, complex, and functional structures. Unraveling such processes in order to mimic Nature’s design strategies remains the Holy Grail in establishing a multiscale paradigm for programmable materials production. Success in this endeavor would revolutionize the efficiency and precision with which complex materials are designed and synthesized, and would spawn novel, functional structures tailored precisely for applications. Among promising approaches to this bottom-up strategy is the use of particle-tethered, complementary single-stranded DNA (ssDNA) for programming particle assembly mediated by DNA hybridization into complex structures. The overall goal of our work was to develop a comprehensive computational and theoretical strategy aimed at overcoming current barriers in self-assembly of DNA-functionalized particles (DFPs).

36 MATERIALS SCIENCE↗
NASA NTRS1975

STICAP: A linear circuit analysis program with stiff systems capability. Volume 1: Theory manual

STICAP (Stiff Circuit Analysis Program) is a FORTRAN 4 computer program written for the CDC-6400-6600 computer series and SCOPE 3.0 operating system. It provides the circuit analyst a tool for automatically computing the transient responses and frequency responses of large linear time invariant networks, both stiff and nonstiff (algorithms and numerical integration techniques are described). The circuit description and user's program input language is engineer-oriented, making simple the task of using the program. Engineering theories underlying STICAP are examined. A user's manual is included which explains user interaction with the program and gives results of typical circuit design applications. Also, the program structure from a systems programmer's viewpoint is depicted and flow charts and other software documentation are given.

Cooke, C. H.↗
DOE OSTI2024

Object Proxy Patterns for Accelerating Distributed Applications

Workflow and serverless frameworks have empowered new approaches to distributed application design by abstracting compute resources. However, their typically limited or one-size-fits-all support for advanced data flow patterns leaves optimization to the application programmer—optimization that becomes more difficult as data become larger. The transparent object proxy, which provides wide-area references that can resolve to data regardless of location, has been demonstrated as an effective low-level building block in such situations. Here we propose three high-level proxy-based programming patterns—distributed futures, streaming, and ownership—that make the power of the proxy pattern usable for more complex and dynamic distributed program structures. We motivate these patterns via careful review of application requirements and describe implementations of each pattern. As a result, we evaluate our implementations through a suite of benchmarks and by applying them in three meaningful scientific applications, in which we demonstrate substantial improvements in runtime, throughput, and memory usage.

Distributed Computing↗
DOE OSTI2021

Developing Multi-Gene CRISPRa/I Programs to Accelerate DBTL Cycles in ABF Hosts Engineered for Chemical Production (CRADA 468)

Bacterial metabolism is comprised of large and complex gene networks that can produce valuable chemical products. Sophisticated organism engineering efforts are required to optimize production of high-value compounds from these networks. In principle, synthetic multi-gene transcriptional programs could be constructed to reengineer these networks for efficient industrial chemical production. In practice, however, our incomplete ability to understand and model the underlying networks, combined with our limited ability to predictably control the expression of multiple genes makes achieving this goal difficult. To overcome these challenges, we will combine new CRISPR-Cas multi-gene expression programs with computational modeling, machine learning, and multi-omics data to enhance the efficacy of design-build-test-learn (DBTL) cycles. For industrially promising microorganisms in early stages of development, creating technologies for rapidly engineering complex multi-gene programs could be transformative for accelerating data- and model-driven strain design. New CRISPR-Cas tools allow programmable gene activation (CRISPRa) or repression (CRISPRi) at multiple genes simultaneously, using the catalytically inactive Cas9 protein (dCas9) with guide RNAs that recognize DNA targets through predictable Watson-Crick base pairing. To enable accelerated DBTL cycles, we will combine these technologies with advanced Agile BioFoundry (ABF) capabilities for multi-omics data collection and machine learning. We will demonstrate the immediate applicability of these tools by rapidly improving the production of an industrial aromatic in multiple ABF organisms. We recently identified and optimized new transcriptional activators that can be linked to programmable CRISPR-Cas DNA binding domains to activate gene expression in E. coli. We can now use these CRISPRa tools as generalizable trans-acting regulators for combinatorial multi-gene expression tuning that can be easily transferred to new pathways and networks without additional genome engineering. We anticipate these tools will also transfer to new hosts. We have recently found that CRISPRa systems developed in E. coli can be readily ported to Pseudomonas putida, suggesting that multi-gene CRISPRa/i programs for diverse ABF organisms may be within reach.

59 BASIC BIOLOGICAL SCIENCES↗
DOE OSTI2016

DARMA 0.3.0-alpha Specification

In this document, we provide the specifications for DARMA (Distributed Asynchronous Resilient Models and Applications), a co-design research vehicle for asynchronous many-task (AMT) programming models that serves to: 1) insulate applications from runtime system and hardware idiosyncrasies, 2) improve AMT runtime programmability by co-designing an application programmer interface (API) directly with application developers, 3) synthesize application co-design activities into meaningful requirements for runtime systems, and 4) facilitate AMT design space characterization and definition, accelerating the development of AMT best practices.

97 MATHEMATICS AND COMPUTING↗
DOE OSTI2024

CHARM-SYCL & IRIS: A Tool Chain for Performance Portability on Extremely Heterogeneous Systems

Performance portability is becoming crucial as high-performance computing systems become increasingly heterogeneous. We have many options for CPUs and accelerators (e.g., GPUs) but also for non-Von Neumann architectures such as field-programmable gate arrays. This paper presents the CHARM-SYCL unified programming environment for multiple accelerator types as a performance-portable programming environment. It uses the IRIS library developed at Oak Ridge National Laboratory as the back end accelerator runtime. IRIS has a high-performance scheduler to distribute tasks across accelerators. This design allows us to run an application from the same source on multiple systems with multiple configurations. We provide three types of portability with CHARM-SYCL: Portable Workflow, Compiler and Runtime Portability, and Application and Performance Portability. We implement a Monte Carlo simulation benchmark code on the CHARM-SYCL execution environment and demonstrate that our programming environment can accommodate extremely heterogeneous systems.

Fujita, Norihisa↗
NASA NTRS1987

The PISCES 2 parallel programming environment

PISCES 2 is a programming environment for scientific and engineering computations on MIMD parallel computers. It is currently implemented on a flexible FLEX/32 at NASA Langley, a 20 processor machine with both shared and local memories. The environment provides an extended Fortran for applications programming, a configuration environment for setting up a run on the parallel machine, and a run-time environment for monitoring and controlling program execution. This paper describes the overall design of the system and its implementation on the FLEX/32. Emphasis is placed on several novel aspects of the design: the use of a carefully defined virtual machine, programmer control of the mapping of virtual machine to actual hardware, forces for medium-granularity parallelism, and windows for parallel distribution of data. Some preliminary measurements of storage use are included.

Pratt, Terrence W.↗
NASA NTRS1994

Coordinated scheduling for dynamic real-time systems

In this project, we addressed issues in coordinated scheduling for dynamic real-time systems. In particular, we concentrated on design and implementation of a new distributed real-time system called R-Shell. The design objective of R-Shell is to provide computing support for space programs that have large, complex, fault-tolerant distributed real-time applications. In R-shell, the approach is based on the concept of scheduling agents, which reside in the application run-time environment, and are customized to provide just those resource management functions which are needed by the specific application. With this approach, we avoid the need for a sophisticated OS which provides a variety of generalized functionality, while still not burdening application programmers with heavy responsibility for resource management. In this report, we discuss the R-Shell approach, summarize the achievement of the project, and describe a preliminary prototype of R-Shell system.

Natarajan, Swaminathan↗
NASA NTRS1973

The development and demonstration of hybrid programmable attitude control electronics

In the course of extended life attitude control system (ELACS) research sponsored by NASA a hybrid programable attitude control electronics (HYPACE) concept was developed and demonstrated. The wide variety of future planetary missions demanded a new control approach to accommodate the automatic fault tolerance and long the life requirements of such missions. HYPACE provides an adaptable, analog/digital design approach that permits preflight and in-flight accommodation of mission changes, component performance variations, and spacecraft changes, through programing. This enabled broad multimission flexibility of application in a cost effective manner. Previously, flight control computers have not been not flown on planetary missions because of weight and power problems. These problems were resolved in the design of HYPACE. The HYPACE design, which was demonstrated in breadboard form on a single-axis gas-bearing spacecraft simulation, uses a single control channel to perform the attitude control functions sequentially, thus significantly reducing the number of component parts over hard-wired designs.

Smith, L. S.↗
NASA NTRS2005

Parallel Adaptive Mesh Refinement Library

Parallel Adaptive Mesh Refinement Library (PARAMESH) is a package of Fortran 90 subroutines designed to provide a computer programmer with an easy route to extension of (1) a previously written serial code that uses a logically Cartesian structured mesh into (2) a parallel code with adaptive mesh refinement (AMR). Alternatively, in its simplest use, and with minimal effort, PARAMESH can operate as a domain-decomposition tool for users who want to parallelize their serial codes but who do not wish to utilize adaptivity. The package builds a hierarchy of sub-grids to cover the computational domain of a given application program, with spatial resolution varying to satisfy the demands of the application. The sub-grid blocks form the nodes of a tree data structure (a quad-tree in two or an oct-tree in three dimensions). Each grid block has a logically Cartesian mesh. The package supports one-, two- and three-dimensional models.

Mac-Neice, Peter↗
DOE OSTI2021

Toward Evaluating High-Level Synthesis Portability and Performance between Intel and Xilinx FPGAs

Offloading computation from a CPU to a hardware accelerator is becoming a more common solution for improving performance because traditional gains enabled by Moore’s law and Dennard scaling have slowed. GPUs are often used as hardware accelerators, but field-programmable gate arrays (FPGAs) are gaining traction. FPGAs are beneficial because they allow hardware specific to a particular application to be created. However, they are notoriously difficult to program. To this end, two of the main FPGA manufacturers, Intel and Xilinx, have created tools and frameworks that enable the use of higher level languages to design FPGA hardware. Although Xilinx kernels can be designed by using C/C++, both Intel and Xilinx support the use of OpenCL C to architect FPGA hardware. However, not much is known about the portability and performance between these two device families other than the fact that it is theoretically possible to synthesize a kernel meant for Intel to Xilinx and vice versa.In this work, we evaluate the portability and performance of Intel and Xilinx kernels. We use OpenCL C implementations of a subset of the Rodinia benchmarking suite that were designed for an Intel FPGA and make the necessary modifications to create synthesizable OpenCL C kernels for a Xilinx FPGA. We find that the difficulty of porting certain kernel optimizations varies, depending on the construct. Once the minimum amount of modifications is made to create synthesizable hardware for the Xilinx platform, more nontrivial work is needed to improve performance. However, we find that constructs that are known to be performant for an FPGA should improve performance regardless of the platform; the difficulty comes in deciding how to invoke certain kernel optimizations while also abiding by the constraints enforced by a given platform’s hardware compiler.

Cabrera, Anthony↗
NASA NTRS1989

Real-time graphics for the Space Station Freedom cupola, developed in the Systems Engineering Simulator

Among the Lyndon B. Johnson Space Center's responsibilities for Space Station Freedom is the cupola. Attached to the resource node, the cupola is a windowed structure that will serve as the space station's secondary control center. From the cupola, operations involving the mobile service center and orbital maneuvering vehicle will be conducted. The Systems Engineering Simulator (SES), located in building 16, activated a real-time man-in-the-loop cupola simulator in November 1987. The SES cupola is an engineering tool with the flexibility to evolve in both hardware and software as the final cupola design matures. Two workstations are simulated with closed-circuit television monitors, rotational and translational hand controllers, programmable display pushbuttons, and graphics display with trackball and keyboard. The displays and controls of the SES cupola are driven by a Silicon Graphics Integrated Raster Imaging System (IRIS) 4D/70 GT computer. Through the use of an interactive display builder program, SES, cupola display pages consisting of two dimensional and three dimensional graphics are constructed. These display pages interact with the SES via the IRIS real-time graphics interface. The focus is on the real-time graphics interface applications software developed on the IRIS.

Red, Michael T.↗
NASA NTRS1992

Design of a nickel-hydrogen battery simulator for the NASA EOS testbed

The hardware and software design of a nickel-hydrogen (Ni-H2) battery simulator (BS) with application to the NASA Earth Observation System (EOS) satellite is presented. The battery simulator is developed as a part of a complete testbed for the EOS satellite power system. The battery simulator involves both hardware and software components. The hardware component includes the capability of sourcing and sinking current at a constant programmable voltage. The software component includes the capability of monitoring the battery's ampere-hours (Ah) and programming the battery voltage according to an empirical model of the nickel-hydrogen battery stored in a computer.

Gur, Zvi↗
NASA NTRS1985

PIFEX: An advanced programmable pipelined-image processor

PIFEX is a pipelined-image processor being built in the JPL Robotics Lab. It will operate on digitized raster-scanned images (at 60 frames per second for images up to about 300 by 400 and at lesser rates for larger images), performing a variety of operations simultaneously under program control. It thus is a powerful, flexible tool for image processing and low-level computer vision. It also has applications in other two-dimensional problems such as route planning for obstacle avoidance and the numerical solution of two-dimensional partial differential equations (although its low numerical precision limits its use in the latter field). The concept and design of PIFEX are described herein, and some examples of its use are given.

Gennery, D. B.↗