First-principles analysis of intercalated Pb structures under buffer-layer graphene on SiC(0001): Pb(111)-, plumbene-, and amorphous-like Pb layers
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High efficiencies of ~19% CdTe solar cell devices were made using a thermal evaporation technique to deposit absorber layers of CdSe and CdTe. The absorber films were very high quality for a device fabrication, and with demonstrated high efficiency, it is a viable option to employ thermal evaporation in research and manufacturing. We also investigated four different interfaces scenarios of with and without MZO and CdSe in the device near front interface. The results clearly indicate that Se plays a key role in improving device performance, but the MZO is not necessarily required unless experiment goals demanded. Removing the MZO layer from the device structure and being able to use thermal evaporator for CdTe deposition will help with cost reduction in manufacturing.
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Kesterite photovoltaic devices having a back surface field layer are provided. In one aspect, a method of forming a photovoltaic device includes: forming a complete photovoltaic device having a substrate, an electrically conductive layer on the substrate, an absorber layer on the electrically conductive layer, a buffer layer on the absorber layer, and a transparent front contact on the buffer layer; removing the substrate and the electrically conductive layer from the complete photovoltaic device to expose a backside surface of the absorber layer; forming a passivating layer on the backside surface of the absorber layer; and forming a high work function back contact on the passivating layer. A photovoltaic device having a passivating layer is also provided.
A container is provided which can be designed to heat its outer surface to sterilize it, or to heat its inner surface and any contents therewithin. In a container that self sterilizes its outer surface, the container includes a combustible layer of thermite-type pyrotechnic material which can be ignited to generate considerable heat, and a thin casing around the combustible layer which is of highly thermally conductive materials such as aluminum which can be heated to a high temperature by the ignited combustible layer. A buffer layer which may be of metal, lies within the combustible layer, and a layer of insulation such as Teflon lies within the buffer layer to insulate the contents of the container from the heat.
Ferroelectric materials have been widely researched for applications in memory and energy storage. Among these materials and benefiting from their excellent chemical compatibility with complementary metal–oxide–semiconductor (CMOS) devices, hafnia-based ferroelectric thin films hold great promise for highly scaled semiconductor memories, including nonvolatile ferroelectric capacitors and transistors. However, variation in the switched polarization of this material during field cycling and a limited understanding of the responsible mechanisms have impeded their implementation in technology. Here, we show that ferroelectric Hf 0.5 Zr 0.5 O 2 (HZO) capacitors that are nearly free of polarization “wake-up”─a gradual increase in switched polarization as a function of the number of switching cycles─can be achieved by introducing ultrathin HfO 2 buffer layers at the HZO/electrodes interface. High-resolution transmission electron microscopy (HRTEM) reveals crystallite sizes substantially greater than the film thickness for the buffer layer capacitors, indicating that the presence of the buffer layers influences the crystallization of the film (e.g., a lower ratio of nucleation rate to growth rate) during postdeposition annealing. This evidently promotes the formation of a polar orthorhombic (O) phase in the as-fabricated buffer layer samples. Synchrotron X-ray diffraction (XRD) reveals the conversion of the nonpolar tetragonal (T) phase to the polar orthorhombic (O) phase during electric field cycling in the control (no buffer) devices, consistent with the polarization wake-up observed for these capacitors. The extent of T–O transformation in the nonbuffer samples is directly dependent on the duration over which the field is applied. Here these results provide insight into the role of the HZO/electrodes interface in the performance of hafnia-based ferroelectrics and the mechanisms driving the polarization wake-up effect.
A new buffer layer has been developed that eliminates backgating in GaAs MESFETs and substantially reduces short-channel effects in GaAs MESFETs with 0.27-micron-long gates. The new buffer is grown by molecular beam epitaxy (MBE) at a substrate temperature of 200 C using Ga and As sub 4 beam fluxes. The buffer is crystalline, highly resistive, optically inactive, and can be overgrown with high quality GaAs. GaAs MESFETs with a gate length of 0.27 microns that incorporate the new buffer show improved dc and RF properties in comparison with a similar MESFET with a thin undoped GaAs buffer. To demonstrate the backgating performance improvement afforded by the new buffer, MESFETs were fabricated using a number of different buffer layers and structures. A schematic cross section of the MESFET structure used in this study is shown. The measured gate length, gate width, and source-drain spacing of this device are 2,98, and 5.5 microns, respectively. An ohmic contact, isolated from the MESFET by mesa etching, served as the sidegate. The MESFETs were fabricated in MBE n-GaAs layers grown on the new buffer and also in MBE n-GaAs layers grown on buffer layers of undoped GaAs, AlGaAs, and GaAs/AlGaAs superlattices. All the buffer layers were grown by MBE and are 2 microns thick. The active layer is doped to approximately 2 x 10 to the 17th/cu cm with silicon and is 0.3 microns thick.
For high efficiency kesterite Cu2ZnSn(S,Se)4 (CZTSSe) solar cell, CdS thin film was usually used as a buffer layer. However, due to the toxicity of Cd and pollution problems involved from the solution-based chemical bath deposition, eco-friendly high efficiency CZTSSe solar cell with Cd-free buffer is necessary. As an Cd-free buffer layer, we investigated (Zn,Sn)O (ZTO) film deposited by sputtering method. In order to achieve high power conversion efficiency, we controlled energy band gaps of CZTSSe absorber as well as ZTO buffer, which was required to optimize conduction band offset (CBO) between the absorber and the buffer and to increase open circuit voltage (Voc) and fill factor (FF). The CBO was optimized by controlling the band gap of ZTO. By varying the Sn/(Zn + Sn) ratio and its deposition temperature, band gap of ZTO was successfully adjusted. Experimental and computational calculation results showed that solar cell performance was strongly affected by the CBO between absorber and buffer. Besides CBO matching, larger band gap of ZTO improved short circuit current density (Jsc) with enhanced external quantum efficiency value in blue photon spectrum range. As an additional way to improve power conversion efficiency of solar cell, band graded CZTSSe absorber was developed by using spray-based two-step process. The sprayed CZTSSe film was engineered to have S-enriched surface, which makes surface band gap widened and surface passivated, and resultantly increases Voc, Jsc and fill factor (FF). By controlling band gaps of both CZTSSe absorber and ZTO buffer, we obtained 11.22% environment-friendly CZTSSe solar cell without MgF2 anti-reflection coating.
The motivation for developing GaAs solar cells is based on their superior efficiency when compared to silicon cells, their lower degradation with increasing temperature, and the expectation for better resistance to space radiation damage. The AMO efficiency of GaAs solar cells was calculated. A key consideration in the HRL technology is the production of GaAs cells of large area (greater than 4 sg cm) at a reasonable cost without sacrificing efficiency. An essential requirement for the successful fabrication of such cells is the ability to grow epitaxially a uniform layer of high quality GaAs (buffer layer) on state-of-the-art GaAs substrates, and to grow on this buffer layer the required than layer of (AlGa)As. A modified infinite melt liquid phase epitaxy (LPE) growth technique is detailed.
The transmission electron microscopic (TEM) examination of an irradiated tristructural isotropic (TRISO) coated particle from advanced gas reactor (AGR) 2 fuel Compact 2-2-2 is presented in this report. Compact 2-2-2 refers to the compact in Capsule 2 at Level 2 of Stack 2. The examination on AGR2 222 RS019 is focused on the interface between the silicon carbide (SiC) to inner pyrolytic carbon (IPyC) layer, central part of SiC, and the interface between SiC and outer pyrolytic carbon layer. The SiC grain boundary distribution and associated fission product precipitates were characterized by scanning transmission electron microscopy (STEM) energy dispersive spectroscopy (EDS), and precession electron diffraction (PED) in the transmission electron microscope. Two separate locations on SiC layer were selected for on the basis of the intact of the buffer layer in the irradiated TRISO particle. The key observation in this particle is that the compositional nature of grain boundary precipitates is more complex near IPyC/SiC layer where Pd, Pd-Ag, Pd-U containing precipitates can be observed. However, the compositions of precipitate towards outer most region of SiC mainly contain Pd. Ag has been observed in the IPyC/SiC layer in one of the two locations. Comparison of the results to previously irradiated and analyzed, Variant 3, safety tested AGR-1 TRISO particles (AGR1-433-001 and AGR1 222-RS004) showed the grain boundary distributions have some noticeable differences. The differences in coincident site lattice grain boundary and misorientation angles are possibly inherent to the fabrication process. Neutron irradiation induced void distribution has been found to be nonuniform. A high concentration of smaller voids is found at stacking faults compared to those in the SiC matrix. Larger void sizes are observed in the SiC location that is near to the broken buffer layer. This void size variation with integrity of buffer layer can potentially affect the fission product retention. However, the average void size continuously decreases along the radius of SiC in both locations.
A device employing the generation and enhancement of surface acoustic waves on a highly doped p-type III-V semiconductor substrate (e.g., GaAs, GaSb, InAs, or InGaAs). The device includes two SiO 2 /ZnO islands, each including a SiO 2 buffer layer deposited on the doped p-type III-V semiconductor substrate and a ZnO layer deposited on the SiO 2 buffer layer. An input interdigital transducers (IDT) and an output IDT are each patterned on one of the SiO 2 /ZnO islands. The IDTs generates surface acoustic waves along an exposed surface of the highly doped p-type III-V semiconductor substrate. The surface acoustic waves improve the photoelectric and photovoltaic properties of the device. The device is manufactured using a disclosed technique for propagating strong surface acoustic waves on weak piezoelectric materials. Also disclosed is a photodetector developed using that technique.
Variable angle spectroscopic ellipsometry (VASE) has been used to characterize Si(x)Ge(1-x)/Ge superlattices (SLs) grown on Ge substrates and thick Si(x)Ge(1-x)/Ge heterostructures grown on Si substrates. Our VASE analysis yielded the thicknesses and alloy compositions of all layers within the optical penetration depth of the surface. In addition, strain effects were observed in the VASE results for layers under both compressive and tensile strain. Results for the SL structures were found to be in close agreement with high resolution x-ray diffraction measurements made on the same samples. The VASE analysis has been upgraded to characterize linearly graded Si(x)Ge(1-x) buffer layers. The algorithm has been used to determine the total thickness of the buffer layer along with the start and end alloy composition by breaking the total thickness into many (typically more than 20) equal layers. Our ellipsometric results for 1 (mu)m buffer layers graded in the ranges 0.7 less than or = x less than or = 1.0, and 0.5 less than or = x less than or = 1.0 are presented, and compare favorably with the nominal values.
The chemical and electronic structure of the interface between a sputter-deposited Zn(O,S) buffer layer and an industrial Cu(In,Ga)(S,Se) 2 (CIGSSe) absorber for thin-film solar cells is investigated with X-ray and UV photoelectron spectroscopy, inverse photoemission spectroscopy, and X-ray emission spectroscopy. We find a CIGSSe absorber surface band gap of 1.61 (±0.14) eV, which is significantly increased as compared to the minimal value derived with bulk-sensitive methods (≈1.1 eV). We find no indication for diffusion of absorber elements into the buffer layer. Surface- and bulk-sensitive measurements of the buffer layer suggest the presence of S-Zn and S-O bonds in the Zn(O,S) layer. We find that the naturally existing downward band bending toward the CIGSSe absorber surface is increased by the formation of the interface, likely enhancing carrier separation under illumination. We also derive a flat conduction band alignment, in line with the reported high conversion efficiencies of corresponding large-area solar cells.
We report metal intercalation is an effective method to modify the physical and chemical properties of low-dimensional systems such as epitaxial graphene. Here, we show that the nucleation and growth of metal nanostructures on epitaxial graphene on SiC(0001) can be dramatically changed by metal intercalation. Using scanning tunneling microscopy experiments, we demonstrate that dysprosium (Dy) metal islands are selectively nucleated on the area with Dy intercalation under both graphene and carbon buffer layers, while the adjacent area with only buffer layer intercalated remains relatively bare. Using first-principles calculations based on density functional theory, we show that adsorption of Dy adatom on the preferred nucleation area is energetically more favorable than on other areas. Moreover, changes in the electronic structure and the interlayer spacing upon Dy intercalation obtained from our calculations are also consistent with experimental observations. Our results indicate that metal intercalation is a promising way to manipulate the interaction between graphene and deposited adatoms.
A method for forming a back contact on an absorber layer in a photovoltaic device includes forming a two dimensional material on a first substrate. An absorber layer including Cu—Zn—Sn—S(Se) (CZTSSe) is grown over the first substrate on the two dimensional material. A buffer layer is grown on the absorber layer on a side opposite the two dimensional material. The absorber layer is exfoliated from the two dimensional material to remove the first substrate from a backside of the absorber layer opposite the buffer layer. A back contact is deposited on the absorber layer.
The chemical and electronic structure of the CdS/(Ag,Cu)(In,Ga)Se 2 (CdS/ACIGSe) interface for thin-film solar cells, involving an absorber with a bulk [Ag]/([Ag]+[Cu]) (AAC) ratio of 0.06, a state-of-the-art RbF post-deposition treatment (PDT), and a chemical-bath deposited CdS buffer layer, is studied. To gain a detailed and depth-resolved picture of the CdS/ACIGSe interface, synchrotron- and laboratory-based hard X-ray, soft X-ray, and UV photoelectron spectroscopy, inverse photoemission spectroscopy, and X-ray emission spectroscopy are combined. Compared to the bulk of the absorber, a Cu- and Ga-poor ACIGSe surface is found, with a slightly increased AAC ratio. Strong evidence of a Rb–In–Se species (possibly with some Ag) at the absorber surface is compiled, with a corresponding band gap of 2.79 ± 0.12 eV. This finding is in clear contrast to comparable Ag-free Cu(In,Ga)Se 2 absorbers with RbF-PDT. The Rb–In–Se surface species is not removed by the (wet-chemical) CdS deposition process, while some Se diffuses into the CdS layer and segregates at its surface. The CdS buffer layer shows a band gap of 2.48 ± 0.12 eV, and a cliff (≈ -0.4 eV) is determined in the conduction band alignment at the interface between the Rb–In–Se species and the CdS buffer.
Semiconductor devices such as lasers which include a substrate with a channel therein with a clad layer overlying the substrate and filling the channel exhibit irregularities such as terraces in the surface of the clad layer which are detrimental to device performance. These irregularities are substantially eliminated by forming the channel in a surface of a buffer layer greater than about 4 micrometers thick on the substrate and forming the clad layer over the buffer layer and the channel. CW lasers incorporating the principles of the invention exhibit the highest output power in a single spatial mode and maximum output power which have been observed to date.