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At least 55 records · Page 3

Measurement and Analysis of a Ferroelectric Field-Effect Transistor NAND Gate

Previous research investigated expanding the use of Ferroelectric Field-Effect Transistors (FFET) to other electronic devices beyond memory circuits. Ferroelectric based transistors possess unique characteris tics that give them interesting and useful properties in digital logic circuits. The NAND gate was chosen for investigation as it is one of the fundamental building blocks of digital electronic circuits. In t his paper, NAND gate circuits were constructed utilizing individual F FETs. N-channel FFETs with positive polarization were used for the standard CMOS NAND gate n-channel transistors and n-channel FFETs with n egative polarization were used for the standard CMOS NAND gate p-chan nel transistors. The voltage transfer curves were obtained for the NA ND gate. Comparisons were made between the actual device data and the previous modeled data. These results are compared to standard MOS logic circuits. The circuits analyzed are not intended to be fully opera tional circuits that would interface with existing logic circuits, bu t as a research tool to look into the possibility of using ferroelectric transistors in future logic circuits. Possible applications for th ese devices are presented, and their potential benefits and drawbacks are discussed.

Phillips, Thomas A.↗

Effective Selective Area Doping for GaN Vertical Power Transistors Enabled by Innovative Materials Engineering

GaN vertical power transistors have emerged as promising candidates for future high efficiency high power electronic applications, with the potential to outperform conventional GaN lateral power devices in terms of power, breakdown, and avalanche characteristics. However, the development of current GaN vertical power transistors is seriously hindered by the poor materials performance of selective area doped p-n junctions. A mechanistic understanding of these fundamental materials issues is essential in order to achieve high performance selective area doped p-n junctions and consequently to advance the GaN vertical power transistor technology. To address this challenge, we carried out a comprehensive research program that advance fundamental knowledge in the selective area doping for GaN materials, and which will lead to the development of high performance GaN vertical power transistors. First, we developed innovative fabrication processes, including novel surface etching, surface passivation, and metalorganic chemical vapor deposition (MOCVD) growth, which provided enhanced opportunities for solving the unique challenges of selective area doping in GaN materials. Second, we performed a fundamental materials study using powerful characterization methods including transmission electron microscopy (TEM), ultraviolet (UV-), x-ray and angle-resolved photoelectron spectroscopy (UPS/XPS/ARPES), electron holography, and cathodoluminescence (CL); Third, we investigated several related issues, including Mg incorporation, polarization effects in carrier transport, and non-ideal material effects, which have rarely been explored so far. At the end of this project, we successfully demonstrated (1) fundamental understanding of selective area etching, regrowth, and doping of GaN, and associated knowledge on defects, interface, and breakdown properties. (2) Effective etch and regrowth processing recipes to achieve etch/regrowth GaN p-n diodes with very low leakage of 3.5 nA at 600 V, which meets the ARPA-E target. (2) High performance vertical GaN p-n didoes and vertical junction termination extension (JTE) devices with breakdown voltage of ~ 2 kV, and breakdown electric field of ~ 3.5 MV/cm, which are close to the performance limit of GaN. The successful outcome has resulted in new fundamental understandings in the selective area doping and regrowth process for GaN, which will lead to groundbreaking GaN vertical transistors for high performance next generation power electronics.

24 POWER TRANSMISSION AND DISTRIBUTION↗

T-shaped emitter metal heterojunction bipolar transistors for submillimeter wave applications

We report on the development of submillimeter wave transistors at JPL. The goal of the effort is to produce advance-reliable high frequency and high power amplifiers, voltage controlled oscillators, active multipliers, and high-speed mixed-signal circuits for space borne applications. The technology in development to achieve this is based on the Indium Phosphide (InP) Heterojunction Bipolar Transistor (HBT). The HBT is well suited for high speed, high power and uniform (across wafer) performance, due to the ability to tailor the material structure that electrons traverse through by well-controlled epitaxial growth methods. InP with its compatible lattice matched alloys such as indium gallium arsenide (InGaAs) and indium aluminium arsenide (InAlAs) provides for high electron velocities and high voltage breakdown capabilities. The epitaxial methods for this material system are fairly mature, however the implementation of high performance and reliable transistors are still under development by many laboratories. Our most recently fabricated, second generation mesa HBTs at JPL have extrapolated current gain cutoff frequency (FJ of 142GHz and power gain cutoff frequency (Fm,) of approximately 160GHz. This represents a 13% and 33% improvement of Ft and F, respectively, compared to the first generation mesa HBTs [l]. Analysis based on the University of California, Santa Barbara (UCSB) device model, RF device characteristics can be significantly improved by reducing base contact resistance and base metal contact width. We will describe our effort towards increasing transistor performance and yield.

transistor↗

Organic Microbial Electrochemical Transistor Monitoring Extracellular Electron Transfer

Abstract Extracellular electron transfer (EET) denotes the process of microbial respiration with electron transfer to extracellular acceptors and has been exploited in a range of microbial electrochemical systems (MESs). To further understand EET and to optimize the performance of MESs, a better understanding of the dynamics at the microscale is needed. However, the real‐time monitoring of EET at high spatiotemporal resolution would require sophisticated signal amplification. To amplify local EET signals, a miniaturized bioelectronic device, the so‐called organic microbial electrochemical transistor (OMECT), is developed, which includes Shewanella oneidensis MR‐1 integrated onto organic electrochemical transistors comprising poly(3,4‐ethylenedioxythiophene):poly(styrenesulfonate) (PEDOT:PSS) combined with poly(vinyl alcohol) (PVA). Bacteria are attached to the gate of the transistor by a chronoamperometric method and the successful attachment is confirmed by fluorescence microscopy. Monitoring EET with the OMECT configuration is achieved due to the inherent amplification of the transistor, revealing fast time‐responses to lactate. The limits of detection when using microfabricated gates as charge collectors are also investigated. The work is a first step toward understanding and monitoring EET in highly confined spaces via microfabricated organic electronic devices, and it can be of importance to study exoelectrogens in microenvironments, such as those of the human microbiome.

37 INORGANIC, ORGANIC, PHYSICAL, AND ANALYTICAL CH↗

Scaling and statistics of bottom-up synthesized armchair graphene nanoribbon transistors

Bottom-up assembled nanomaterials and nanostructures allow for the studies of rich and unprecedented quantum-related and mesoscopic transport phenomena. However, it can be difficult to quantify the correlations between the geometrical or structural parameters obtained from advanced microscopy and measured electrical characteristics when they are made into macroscopic devices. Here, we propose a strategy to connect the nanomaterial morphologies and the device performance through a Monte Carlo device model and apply it to understand the scaling trends of bottom-up synthesized armchair graphene nanoribbon (GNR) transistors. A new nanofabrication process is developed for GNR transistors with channel length down to 7 nm. Further, the impacts of the GNR spatial distributions and the device geometries on the device performance are investigated systematically through comparison of experimental data with the model. Through this study, challenges and opportunities of transistor technologies based on bottom-up synthesized GNRs are pinpointed, paving the way to the further improvement of the GNR device performance for future transistor technology nodes.

36 MATERIALS SCIENCE↗

Steep-slope field-effect transistors with AlGaN/GaN HEMT and oxide-based threshold switching device

We report the demonstration of a steep-slope field-effect transistor with AlGaN/GaN MIS-HEMTs employing SiO 2 -based threshold switching devices in series with the source. The SiO 2 -based threshold switching devices exhibited steep slope when changing resistance states. The integrated steep-slope transistor showed a low subthreshold swing of sub-5 mV/dec with a transition range of over 10 5 in the transfer characteristics in both sweep directions at room temperature, as well as the low leakage current (10 -5 μA μm -1 ) and a high I ON /I OFF ratio (>10 7 ). Moreover, with the SiO 2 -based threshold switching devices we also observed a positive shift of threshold voltages of the integrated device. Results from more than 50 transfer characteristics measurements also indicate the good repeatability and practicability of such a steep-switching device, where the average steep slopes are below 10 mV/decade. In conclusion, this steep-slope transistor with oxide-based threshold switching devices can be further extended to various transistor platforms like Si and III–V and are of potential interest for the development of power switching and high frequency devices.

36 MATERIALS SCIENCE↗

Comparison of the Radiation Resistance of Prospective Bipolar and Heterobipolar Transistors

Approaches to solving the problem of the development of efficient bipolar and heterobipolar transistors operating at radio- and ultrahigh frequencies (0.1–10 GHz), which could be used as active elements of modern Si-based and GaAs-based radiation-resistant analog-digital integrated circuits, are discussed. Comparison of the radiation resistance of prospective “lateral” Si-based bipolar and “vertical” AlGaAs/GaAs heterobipolar transistors with a characteristic base thickness of 70–350 nm is performed. The features of the electron transport in active transistor regions are analyzed in detail and the influence of a surge in the velocity and the diffusion of quasi-ballistic electrons on an increase in the radiation resistance of transistors is evaluated.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗

Schottky Junction Vertical Channel GaN Static Induction Transistor with a Sub‐Micrometer Fin Width

Abstract GaN‐based vertical transistors have demonstrated its excellent properties for high‐power and high‐frequency electronic devices. This work introduces a GaN‐based static induction transistor (SIT) which is another form of vertical GaN transistors without requiring any p ‐type GaN and gate dielectrics for its operation. Processing strategy to generate the GaN SIT with a sub‐micrometer fin width involves photoresist (PR)‐assisted planarization with an understanding of dry etch parameters for the planar PR surface. The efficacy of this process is demonstrated by the device's triode‐like output characteristics with high current density (0.65 kA cm −2 ) and low ON resistance (1.48 mΩ cm 2 ) at 1 V of drain voltage. In addition, the electrical properties such as current density and modulation are examined depending on the fin width of GaN SIT. The result reveals that the size reduction in the GaN SIT utilizing the sub‐micrometer fin as a channel could increase the current modulation, but it could decrease the current density because of the raised potential minima due to the depletion region overlap. It is believed that the GaN SIT demonstrating high blocking voltage and low ON resistance would present a very promising class of transistor for next‐generation high‐power and high‐frequency electronics.

Chun, Jaeyi↗

Short-channel field-effect transistors with 9-atom and 13-atom wide graphene nanoribbons

Bottom-up synthesized graphene nanoribbons and graphene nanoribbon heterostructures have promising electronic properties for high-performance field-effect transistors and ultra-low power devices such as tunneling field-effect transistors. However, the short length and wide band gap of these graphene nanoribbons have prevented the fabrication of devices with the desired performance and switching behavior. Here, by fabricating short channel (L ch ~ 20 nm) devices with a thin, high-κ gate dielectric and a 9-atom wide (0.95 nm) armchair graphene nanoribbon as the channel material, we demonstrate field-effect transistors with high on-current (I on > 1 μA at V d = -1 V) and high I on /I off ~ 10 5 at room temperature. We find that the performance of these devices is limited by tunneling through the Schottky barrier at the contacts and we observe an increase in the transparency of the barrier by increasing the gate field near the contacts. Our results thus demonstrate successful fabrication of high-performance short-channel field-effect transistors with bottom-up synthesized armchair graphene nanoribbons.

36 MATERIALS SCIENCE↗

Water stable molecular n-doping produces organic electrochemical transistors with high transconductance and record stability

From established to emergent technologies, doping plays a crucial role in all semiconducting devices. Doping could, theoretically, be an excellent technique for improving repressively low transconductances in n-type organic electrochemical transistors – critical for advancing logic circuits for bioelectronic and neuromorphic technologies. However, the technical challenge is extreme: n-doped polymers are unstable in electrochemical transistor operating environments, air and water (electrolyte). Here, the first demonstration of doping in electron transporting organic electrochemical transistors is reported. The ammonium salt tetra-n-butylammonium fluoride is simply admixed with the conjugated polymer poly(N,N’-bis(7-glycol)-naphthalene-1,4,5,8-bis(dicarboximide)-co-2,2’-bithiophene-co-N,N’-bis(2-octyldodecyl)-naphthalene-1,4,5,8-bis(dicarboximide), and found to act as a simultaneous molecular dopant and morphology-additive. The combined effects enhance the n-type transconductance with improved channel capacitance and mobility. Furthermore, operational and shelf-life stability measurements showcase the first example of water-stable n-doping in a polymer. Overall, the results set a precedent for doping/additives to impact organic electrochemical transistors as powerfully as they have in other semiconducting devices.

37 INORGANIC, ORGANIC, PHYSICAL, AND ANALYTICAL CH↗

A nanoscale photonic thermal transistor for sub-second heat flow switching

Abstract Control of heat flow is critical for thermal logic devices and thermal management and has been explored theoretically. However, experimental progress on active control of heat flow has been limited. Here, we describe a nanoscale radiative thermal transistor that comprises of a hot source and a cold drain (both are ~250 nm-thick silicon nitride membranes), which are analogous to the source and drain electrodes of a transistor. The source and drain are in close proximity to a vanadium oxide (VO x )-based planar gate electrode, whose dielectric properties can be adjusted by changing its temperature. We demonstrate that when the gate is located close ( < ~1 µm) to the source-drain device and undergoes a metal-insulator transition, the radiative heat transfer between the source and drain can be changed by a factor of three. More importantly, our nanomembrane-based thermal transistor features fast switching times ( ~ 500 ms as opposed to minutes for past three-terminal thermal transistors) due to its small thermal mass. Our experiments are supported by detailed calculations that highlight the mechanism of thermal modulation. We anticipate that the advances reported here will open new opportunities for designing thermal circuits or thermal logic devices for advanced thermal management.

42 ENGINEERING↗

Mobility and threshold voltage extraction in transistors with gate-voltage-dependent contact resistance

The mobility of emerging (e.g., two-dimensional, oxide, organic) semiconductors is commonly estimated from transistor current-voltage measurements. However, such devices often experience contact gating, i.e., electric fields from the gate modulate the contact resistance during measurements, which can lead conventional extraction techniques to estimate mobility incorrectly even by a factor >2. Although this error can be minimized by measuring transistors at high gate-source bias |V gs |, this regime is often inaccessible in emerging devices that suffer from high contact resistance or early gate dielectric breakdown. Here, we propose a method of extracting mobility in transistors with gate-dependent contact resistance that does not require operation at high |V gs |, enabling accurate mobility extraction even in emerging transistors with strong contact gating. Our approach relies on updating the transfer length method (TLM) and can achieve <10% error even in regimes where conventional techniques overestimate mobility by >2×

36 MATERIALS SCIENCE↗

Low-temperature processed beta-phase In 2 Se 3 ferroelectric semiconductor thin film transistors

As scaling becomes increasingly difficult, there is growing interest in vertical or three-dimensional stacking of transistors and especially memory. Ferroelectric semiconductor field effect transistors can be key enablers to improve energy efficiency and overall chip and memory performance. In this work, low-temperature processed, back-end-of-the-line compatible transistors were demonstrated by depositing a layered chalcogenide ferroelectric semiconductor, beta-phase In 2 Se 3 , at temperature as low as 400 °C. Top gate n-channel In 2 Se 3 thin film transistors were fabricated with field-effect mobility ∼1 cm 2 V −1 s −1 , and simple polarization switching based memory results are presented.

36 MATERIALS SCIENCE↗

Investigating the Effects of Individual Neutron-Induced Defects in Bipolar Junction Transistors

Here, this study investigates neutron-induced displacement damage in Bipolar Junction Transistors (BJTs) using TCAD models informed by Deep-Level-Transient-Spectroscopy (DLTS) data. These models are calibrated and validated against experimental measurements performed at various neutron fluences. Both npn and pnp transistor configurations are studied to analyze the effects of individual traps on carrier recombination and base leakage currents. In npn transistors, deep traps (0.42 eV from the conduction band) dominate at low voltages, while shallow traps (0.17 eV from the conduction band) become prominent at higher voltages. Conversely, pnp transistors have base leakage current predominantly due to deep-level traps. The study observes a notable trend in trap density versus fluence, characterized by a linear relationship on a log-log scale. These insights into defect evolution under radiation conditions are crucial for optimizing semiconductor device reliability and performance in radiation-prone environments.

42 ENGINEERING↗

2 kV Al 0.64 Ga 0.36 N-channel high electron mobility transistors with passivation and field plates

Abstract High voltage (∼2 kV) Al 0.64 Ga 0.36 N-channel high electron mobility transistors were fabricated with an on-resistance of ∼75 Ω. mm (∼21 mΩ. cm 2 ). Two field plates of variable dimensions were utilized to optimize the breakdown voltage. The breakdown voltage reached >3 kV (tool limit) before passivation however it reduced to ∼2 kV after Si 3 N 4 surface passivation and field plate deposition. The breakdown voltage and on-resistance demonstrated a strong linear correlation in a scattered plot of ∼50 measured transistors. The fabricated transistors were electrically characterized and benchmarked against the state-of-the-art high-voltage (> 1 kV) Al-rich (>40%) AlGaN-channel transistors in breakdown voltage and on-resistance, indicating significant progress.

Alam, Md Tahmidul (ORCID:000900086556839X)↗

Ultra-stable oscillator with complementary transistors

A high frequency oscillator, having both good short and long term stability, is formed by including a piezoelectric crystal in the base circuit of a first bi-polar transistor circuit, the bi-polar transistor itself operated below its transitional frequency and having its emitter load chosen so that the input impedance, looking into the base thereof, exhibits a negative resistance in parallel with a capacitive reactance. Combined with this basic circuit is an auxiliary, complementary, second bi-polar transistor circuit of the same form with the piezoelectric crystal being common to both circuits. By this configuration small changes in quiescent current are substantially cancelled by opposite variations in the second bi-polar transistor circuit, thereby achieving from the oscillator a signal having its frequency of oscillation stable over long time periods as well as short time periods.

Kleinberg, L. L.↗

Development and fabrication of improved power transistor switches

A new class of high-voltage power transistors has been achieved by adapting present interdigitated thyristor processing techniques to the fabrication of NPN Si transistors. Present devices are 2.3 cm in diameter. The electrical performance obtained is consistent with the predictions of an optimum design theory specifically developed for power switching transistors. The forward safe operating area of the experimental transistors shows a significant improvement over commercially available devices. The report describes device design, wafer processing, and various measurements which include dc characteristics, forward and reverse second breakdown limits, and switching times.

Hower, P. L.↗

Development and fabrication of improved power transistor switches

A new class of high-voltage power transistors was achieved by adapting present interdigitated thyristor processing techniques to the fabrication of npn Si transistors. Present devices are 2.3 cm in diameter and have V sub CEO (sus) in the range of 400 to 600V. V sub CEO (sus) = 450V devices were made with an (h sub FE)(I sub C) product of 900A at V sub CE = 2.5V. The electrical performance obtained was consistent with the predictions of an optimum design theory specifically developed for power switching transistors. The device design, wafer processing, and assembly techniques are described. Experimental measurements of the dc characteristics, forward SOA, and switching times are included. A new method of characterizing the switching performance of power transistors is proposed.

Hower, P. L.↗