The Effects of Protons on Semiconductor Devices
Proton bombardment on transistor circuits at 40 and 440-mev in radiation belt
PROTON ENERGY↗
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Results for “TRANSISTOR CIRCUIT”
Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.
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Portable PFM Simulator
Portable transistorized circuit pulse frequency modulation /PFM/ simulator with power supply regulator
TRANSISTOR CIRCUIT↗
SURFACE EFFECTS OF RADIATION ON TRANSISTORS
Surface effects of radiation on semiconducting transistor circuits - radiation hazard
RADIATION EFFECT↗
A-c to d-c power supply using high-frequency techniques for size reduction.
AC to DC power supply using high frequency transistor circuit techniques for size reduction by which conversion, filtering and regulation may be combined
POWER CONVERSION↗
Silicon contact for area reduction of integrated circuits
Epitaxially grown Si contact for area reduction of MOS transistor circuits
Alexander, D. S.↗
A programmable architecture for CMOS sequential circuits
This paper presents a programmable architecture for sequential pass transistor circuits. The resulting circuits are such that a state machine with N states and M output is constructed using a single layout replicated N + M times.
Whitaker, S.↗
Hybrid circuit achieves pulse regeneration with low power drain
Hybrid tunnel diode-transistor circuit provides a solid-state, low power drain pulse regenerator, frequency limiter, or gated oscillator. When the feedback voltage exceeds the input voltage, the circuit functions as a pulse normalizer or a frequency limiter. If the circuit is direct coupled, it functions as a gated oscillator.
Cancro, C. A.↗
Pulse counting circuit which simultaneously indicates the occurrence of the nth pulse Patent
RC transistor circuit to indicate each pulse of pulse train and occurrence of nth pulse
Rehage, J. R.↗
Proton irradiation effects in MOS and junction field-effect transistors and integrated circuits
Proton irradiation effects in MOS and junction field effect transistors and integrated circuits
INTEGRATED CIRCUIT↗
Three phase full wave dc motor decoder
A three phase decoder for dc motors is disclosed which employs an extremely simple six transistor circuit to derive six properly phased output signals for fullwave operation of dc motors. Six decoding transistors are coupled at their base-emitter junctions across a resistor network arranged in a delta configuration. Each point of the delta configuration is coupled to one of three position sensors which sense the rotational position of the motor. A second embodiment of the invention is disclosed in which photo-optical isolators are used in place of the decoding transistors.
Studer, P. A.↗
Automatic gain control circuit handles wide input range
Automatic gain control circuit for a radio receiver handles a wide range of input signal levels without overloading the output stage. The transistorized circuit maintains a relatively constant output by varying attenuation of the input signal.
Black, S. H.↗
Ferroelectric Field-Effect Transistor Differential Amplifier Circuit Analysis
There has been considerable research investigating the Ferroelectric Field-Effect Transistor (FeFET) in memory circuits. However, very little research has been performed in applying the FeFET to analog circuits. This paper investigates the use of FeFETs in a common analog circuit, the differential amplifier. The two input Metal-Oxide-Semiconductor (MOS) transistors in a general MOS differential amplifier circuit are replaced with FeFETs. Resistors are used in place of the other three MOS transistors. The FeFET model used in the analysis has been previously reported and was based on experimental device data. Because of the FeFET hysteresis, the FeFET differential amplifier has four different operating modes depending on whether the FeFETs are positively or negatively polarized. The FeFET differential amplifier operation in the different modes was analyzed by calculating the amplifier voltage transfer and gain characteristics shown in figures 2 through 5. Comparisons were made between the FeFET differential amplifier and the standard MOS differential amplifier. Possible applications and benefits of the FeFET differential amplifier are discussed.
Phillips, Thomas A.↗
Proton irradiation effects in MOS junction field-effect transistors and integrated circuits
Proton irradiation effects in MOS and junction field-effect transistors and integrated circuits
Breckenridge, R. A.↗
Switching circuit employing regeneratively connected complementary transistors Patent
Switching circuit with regeneratively connected transistors eliminating power consumption when not in use
Shortridge, S. R.↗
Bipolar junction transistor models for circuit simulation of cosmic-ray-induced soft errors
This paper examines bipolar junction transistor models suitable for calculating the effects of large excursions of some of the variables determining the operation of a transistor. Both the Ebers-Moll and Gummel-Poon models are studied, and the junction and diffusion capacitances are evaluated on the basis of the latter model. The most interesting result of this analysis is that a bipolar junction transistor when struck by a cosmic particle may cause a single event upset in an electronic circuit if the transistor is operated at a low forward base-emitter bias.
Benumof, R.↗
Fault Tolerance Implementation within SRAM Based FPGA Designs based upon Single Event Upset Occurrence Rates
Emerging technology is enabling the design community to consistently expand the amount of functionality that can be implemented within Integrated Circuits (ICs). As the number of gates placed within an FPGA increases, the complexity of the design can grow exponentially. Consequently, the ability to create reliable circuits has become an incredibly difficult task. In order to ease the complexity of design completion, the commercial design community has developed a very rigid (but effective) design methodology based on synchronous circuit techniques. In order to create faster, smaller and lower power circuits, transistor geometries and core voltages have decreased. In environments that contain ionizing energy, such a combination will increase the probability of Single Event Upsets (SEUs) and will consequently affect the state space of a circuit. In order to combat the effects of radiation, the aerospace community has developed several "Hardened by Design" (fault tolerant) design schemes. This paper will address design mitigation schemes targeted for SRAM Based FPGA CMOS devices. Because some mitigation schemes may be over zealous (too much power, area, complexity, etc.. . .), the designer should be conscious that system requirements can ease the amount of mitigation necessary for acceptable operation. Therefore, various degrees of Fault Tolerance will be demonstrated along with an analysis of its effectiveness.
Berg, Melanie↗
Variable voltage supply uses Zener dioxide as reference
Using a zener diode as the reference element, a simple transistorized circuit provides a stable variable reference voltage.
Kleinberg, L. L.↗
High-intensity flashing beacon powered by mercury cells
Pair of xenon flashlamps powered by mercury batteries in a transistorized circuit provides a flashing beacon with an effective intensity of a second-magnitude star at a distance of ten statute miles. This beacon is lightweight, long lasting and it withstands shock and vibration.
Source record↗