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At least 55 records · Page 3
All sourcesNASA NTRSDOE OSTI
NASA NTRS2013

Packaging Technologies for High Temperature Electronics and Sensors

This paper reviews ceramic substrates and thick-film metallization based packaging technologies in development for 500degC silicon carbide (SiC) electronics and sensors. Prototype high temperature ceramic chip-level packages and printed circuit boards (PCBs) based on ceramic substrates of aluminum oxide (Al2O3) and aluminum nitride (AlN) have been designed and fabricated. These ceramic substrate-based chiplevel packages with gold (Au) thick-film metallization have been electrically characterized at temperatures up to 550degC. A 96% alumina based edge connector for a PCB level subsystem interconnection has also been demonstrated recently. The 96% alumina packaging system composed of chip-level packages and PCBs has been tested with high temperature SiC devices at 500degC for over 10,000 hours. In addition to tests in a laboratory environment, a SiC JFET with a packaging system composed of a 96% alumina chip-level package and an alumina printed circuit board mounted on a data acquisition circuit board was launched as a part of the MISSE-7 suite to the International Space Station via a Shuttle mission. This packaged SiC transistor was successfully tested in orbit for eighteen months. A spark-plug type sensor package designed for high temperature SiC capacitive pressure sensors was developed. This sensor package combines the high temperature interconnection system with a commercial high temperature high pressure stainless steel seal gland (electrical feed-through). Test results of a packaged high temperature capacitive pressure sensor at 500degC are also discussed. In addition to the pressure sensor package, efforts for packaging high temperature SiC diode-based gas chemical sensors are in process.

Electronic packaging↗
NASA NTRS2010

N channel JFET based digital logic gate structure

A circuit topography is presented which is used to create usable digital logic gates using N (negatively doped) channel Junction Field Effect Transistors (JFETs) and load resistors, level shifting resistors, and supply rails whose values are based on the direct current (DC) parametric distributions of those JFETs. This method has direct application to the current state of the art in high temperature, for example 300.degree. C. to 500.degree. C. and higher, silicon carbide (SiC) device production. The ability to produce inverting and combinatorial logic enables the production of pulse and edge triggered latches. This scale of logic synthesis would bring digital logic and state machine capabilities to devices operating in extremely hot environments, such as the surface of Venus, near hydrothermal vents, within nuclear reactors (SiC is inherently radiation hardened), and within internal combustion engines. The basic logic gate can be configured as a driver for oscillator circuits allowing for time bases and simple digitizers for resistive or reactive sensors. The basic structure of this innovation, the inverter, can be reconfigured into various analog circuit topographies through the use of feedback structures.

Krasowski, Michael J.↗
NASA NTRS2013

Packaging Technologies for High Temperature Electronics and Sensors

This paper reviews ceramic substrates and thick-film metallization based packaging technologies in development for 500 C silicon carbide (SiC) electronics and sensors. Prototype high temperature ceramic chip-level packages and printed circuit boards (PCBs) based on ceramic substrates of aluminum oxide (Al2O3) and aluminum nitride (AlN) have been designed and fabricated. These ceramic substrate-based chip-level packages with gold (Au) thick-film metallization have been electrically characterized at temperatures up to 550 C. A 96% alumina based edge connector for a PCB level subsystem interconnection has also been demonstrated recently. The 96% alumina packaging system composed of chip-level packages and PCBs has been tested with high temperature SiC devices at 500 C for over 10,000 hours. In addition to tests in a laboratory environment, a SiC JFET with a packaging system composed of a 96% alumina chip-level package and an alumina printed circuit board mounted on a data acquisition circuit board was launched as a part of the MISSE-7 suite to the International Space Station via a Shuttle mission. This packaged SiC transistor was successfully tested in orbit for eighteen months. A spark-plug type sensor package designed for high temperature SiC capacitive pressure sensors was developed. This sensor package combines the high temperature interconnection system with a commercial high temperature high pressure stainless steel seal gland (electrical feed-through). Test results of a packaged high temperature capacitive pressure sensor at 500 C are also discussed. In addition to the pressure sensor package, efforts for packaging high temperature SiC diode-based gas chemical sensors are in process.

Chen, Liang-Yu↗
NASA NTRS1991

Development of silicon carbide semiconductor devices for high temperature applications

The semiconducting properties of electronic grade silicon carbide crystals, such as wide energy bandgap, make it particularly attractive for high temperature applications. Applications for high temperature electronic devices include instrumentation for engines under development, engine control and condition monitoring systems, and power conditioning and control systems for space platforms and satellites. Discrete prototype SiC devices were fabricated and tested at elevated temperatures. Grown p-n junction diodes demonstrated very good rectification characteristics at 870 K. A depletion-mode metal-oxide-semiconductor field-effect transistor was also successfully fabricated and tested at 770 K. While optimization of SiC fabrication processes remain, it is believed that SiC is an enabling high temperature electronic technology.

Matus, Lawrence G.↗
NASA NTRS2000

Packaging Technology Developed for High-Temperature SiC Sensors and Electronics

A ceramic- and thick-film-materials-based prototype electronic package designed for silicon carbide (SiC) high-temperature sensors and electronics has been successfully tested at 500 C in an oxygen-containing air environment for 500 hours. This package was designed, fabricated, assembled, and electronically evaluated at the NASA Glenn Research Center at Lewis Field with an in-house-fabricated SiC semiconductor test chip. High-temperature electronics and sensors are necessary for harsh-environment space and aeronautical applications, such as space missions to the inner solar system or the emission control electronics and sensors in aeronautical engines. Single-crystal SiC has such excellent physical and chemical material properties that SiC-based semiconductor electronics can operate at temperatures over 600 C, which is significantly higher than the limit for Si-based semiconductor devices. SiC semiconductor chips were recently demonstrated to be operable at temperatures as high as 600 C, but only in the probe station environment because suitable packaging technology for sensors and electronics at temperatures of 500 C and beyond did not exist. Thus, packaging technology for SiC-based sensors and electronics is immediately needed for both application and commercialization of high-temperature SiC sensors and electronics. In response to this need, researchers at Glenn designed, fabricated, and assembled a prototype electronic package for high-temperature electronics, sensors, and microelectromechanical systems (MEMS) using aluminum nitride (AlN) substrate and gold (Au) thick-film materials. This prototype package successfully survived a soak test at 500 C in air for 500 hours. Packaging components tested included thick-film high-temperature metallization, internal wire bonds, external lead bonds, and a SiC diode chip die-attachment. Each test loop, which was composed of thick-film printed wire, wire bond, and lead bond was subjected to a 50-mA direct current for 250 hours at 500 C.

Chen, Liang-Yu↗
NASA NTRS1981

Whatever happened to silicon carbide

The progress made in silicon carbide semiconductor devices in the 1955 to 1975 time frame is examined and reasons are given for the present lack of interest in the material. Its physical and chemical properties and methods of preparation are discussed. Fabrication techniques and the characteristics of silicon carbide devices are reviewed. It is concluded that a combination of economic factors and the lack of progress in fabrication techniques leaves no viable market for SiC devices in the near future.

Campbell, R. B.↗
NASA NTRS1997

SiC-Based Gas Sensors

Electronic grade Silicon Carbide (SiC) is a ceramic material which can operate as a semiconductor at temperatures above 600 C. Recently, SiC semiconductors have been used in Schottky diode gas sensor structures. These sensors have been shown to be functional at temperatures significantly above the normal operating range of Si-based devices. SiC sensor operation at these higher temperatures allows detection of gases such as hydrocarbons which are not detectable at lower temperatures. This paper discusses the development of SiC-based Schottky diode gas sensors for the detection of hydrogen, hydrocarbons, and nitrogen oxides (NO(x)). Sensor designs for these applications are discussed. High sensitivity is observed for the hydrogen and hydrocarbon sensors using Pd on SiC Schottky diodes while the NO(x) sensors are still under development. A prototype sensor package has been fabricated which allows high temperature operation in a room temperature ambient by minimizing heat loss to that ambient. It is concluded that SiC-based gas sensors have considerable potential in a variety of gas sensing applications.

Chen, Liang-Yu↗
DOE OSTI2023

An Effective Current Balancing Method for Inverters With Paralleled Silicon Carbide Power Modules

Silicon carbide (SiC) MOSFET has many superior characteristics in high power applications. Paralleling the SiC devices is an effective approach to increase the current capacity of the system, which also leads to current sharing issues. In this article, both transient and steady-state current sharing issues are studied for the high-power grid-tied inverters with paralleled SiC modules with an effective current balancing strategy proposed to address both issues simultaneously. The steady-state imbalance current due to the parameter mismatch is suppressed by the self-inductance of power cables used for paralleling connection. With the elimination of steady-state imbalance current, the transient imbalance current sensing is much simplified and can be realized by using low-cost current sensors. With the sensed imbalance current, a closed-loop control approach is proposed to adjust the modulation reference signal for each module to mitigate the remaining transient imbalance current. Furthermore, the proposed method is straightforward to implement with enhanced compatibility and flexibility compared to existing methods. Experimental studies are performed using inverters with 2 and 4 power modules paralleled in each phase to demonstrate the effectiveness of the proposed method.

42 ENGINEERING↗
NASA NTRS2020

Performance Evaluation of Isolated Gate Driver, ADuM4121, Under Exposure to Extreme Temperature

Electronics designed for use in space missions are expected to be exposed to harsh environment including radiation and extreme temperature, to name a few. Severe thermal swings are also encountered depending on planetary exploration, orbital orientation, and mission duration. Most commercial-off-the-shelf (COTS) devices are not designed to function under such extreme conditions and very little data exist on their performance outside their specified range of operation. In this work, the performance of an isolated gate driver for controlling power-level transistors, including gallium nitride (GaN) and silicon carbide (SiC) devices, was evaluated under extreme temperatures and thermal cycling. The investigations were carried out to assess performance for potential use of this device in space exploration missions under extreme temperature conditions.

Boomer, Kristen↗
NASA NTRS2024

Mark I Silicon Carbide Integrated Circuit Test Oven Assembly and Programming Guide

This report provides a parts list, with assembly and programming instructions for building firstgeneration (Mark I) compact test ovens; this oven design is customized for prolonged functional electrical testing of prototype silicon carbide (SiC) devices at temperatures up to 500 °C (932 °F). The general approach of using multiple compact ovens to perform long-term, high-temperature electronics testing efficiently is described in a conference paper (Izadnegahdar, Alain, et al.: Alternative Setup for LongDuration Low-Duty-Cycle 600 °C Ambient Testing of SiC Integrated Circuits. International Microelectronics Assembly and Packaging Society (iMAPS) HiTECH 2021 Technology Crossover Extravaganza, 2021), available at https://ntrs.nasa.gov/citations/20210011676. The new Mark I oven design described here offers several significant improvements over the compact oven described in that paper. For example, it is constructed from commercial off-the-shelf (COTS) components and requires minimal assembly. Much of the work involves drilling holes in the two aluminum project boxes, which contain the control electronics and the oven itself. The cost of components is less than $200 (USD) per oven, which makes constructing multiple ovens affordable. In addition, the two-box design separates the high-temperature heater from the electronics, which keeps the electronics cool, prolonging the lifetime of these components.

high temperature↗
NASA NTRS1999

Modeling of SiC Lateral Resonant Devices Over a Broad Temperature Range

Finite-element analysis (FEA) modal results of 3C-SiC lateral resonant devices anchored to a Si substrate are presented as resonant frequency versus temperature. The suspended elements are etched from a 2 micron, 3C-SiC film grown at 1600 K on a 500 micron-thick, Si substrate. The analysis includes, temperature-dependent properties, shape change due to volume expansion with temperature, and thermal stress caused by differential thermal expansion of different materials. Two designs are considered: type I has anchor locations close to the geometric centroid and a small shuttle; type 11 has a large shuttle with anchors far from the centroid, The resonant frequency decreases approximately 3.5% over a 1000 K temperature increase for the type-I device, and behaves according to theory. The resonant frequency of the type-11 device decreases by 2% over the first 400 K, then rises slightly over the remaining 600 K. This device deviates from theory because of the high thermal stress induced in the beams. The thermal stress is caused by the differential thermal expansion of the suspended element relative to the substrate. The results show that the device geometry must be properly chosen if the resonant frequency of that device will be used to calculate the temperature coefficient of Young's modulus. These results apply only to resonators of one material on a substrate of a different material.

DeAnna, Russell G.↗
NASA NTRS2023

Extended Temperature Operation of Isolated, Precision Gate Driver, ADuM4120

Electronics used in space missions encounter exposure to extreme temperatures and operation under wide thermal swings. Most commercial-off-the-shelf (COTS) devices are not designed to function under such extreme conditions and very little data exist on their performance outside their specified range of operation. Extending the temperature range at which electronic parts can operate reliably leads to potential benefits resulting in improving reliability, reducing mass/weight, and simplifying thermal design due to elimination of thermal control elements and fewer parts count. In this work, the performance of an isolated, precision gate driver for controlling power-level transistors, including gallium nitride (GaN) and silicon carbide (SiC) devices, was evaluated under extreme temperatures and thermal cycling. The investigations were carried out to assess performance for potential use of this device in space exploration missions under extreme temperature conditions.

Wide Bandgap Power Electronics↗
NASA NTRS2005

NASA Tech Briefs, June 2005

Topics covered include: Apparatus Characterizes Transient Voltages in Real Time; Measuring Humidity in Sealed Glass Encasements; Adaptable System for Vehicle Health and Usage Monitoring; Miniature Focusing Time-of-Flight Mass Spectrometer; Cryogenic High-Sensitivity Magnetometer; Wheel Electrometer System; Carbon-Nanotube Conductive Layers for Thin-Film Solar Cells; Patch Antenna Fed via Unequal-Crossed-Arm Aperture; LC Circuits for Diagnosing Embedded Piezoelectric Devices; Nanowire Thermoelectric Devices; Code for Analyzing and Designing Spacecraft Power System Radiators; Decision Support for Emergency Operations Centers; NASA Records Database; Real-Time Principal- Component Analysis; Fuzzy/Neural Software Estimates Costs of Rocket- Engine Tests; Multicomponent, Rare-Earth-Doped Thermal-Barrier Coatings; Reactive Additives for Phenylethynyl-Containing Resins; Improved Gear Shapes for Face Worm Gear Drives; Alternative Way of Shifting Mass to Move a Spherical Robot; Parylene C as a Sacrificial Material for Microfabrication; In Situ Electrochemical Deposition of Microscopic Wires; Improved Method of Manufacturing SiC Devices; Microwave Treatment of Prostate Cancer and Hyperplasia; Ferroelectric Devices Emit Charged Particles and Radiation; Dusty-Plasma Particle Accelerator; Frozen-Plug Technique for Liquid-Oxygen Plumbing; Shock Waves in a Bose-Einstein Condensate; Progress on a Multichannel, Dual-Mixer Stability Analyzer; Development of Carbon- Nanotube/Polymer Composites; Thermal Imaging of Earth for Accurate Pointing of Deep-Space Antennas; Modifications of a Composite-Material Combustion Chamber; Modeling and Diagnostic Software for Liquefying- Fuel Rockets; and Spacecraft Antenna Clusters for High EIRP.

Source record↗
DOE OSTI2021

Low Thermal Resistance (0.5 K/W) Ga 2 O 3 Schottky Rectifiers With Double-Side Packaging

The low thermal conductivity of Ga 2 O 3 has arguably been the most serious concern for Ga 2 O 3 power and RF devices. Despite many simulation studies, there is no experimental report on the thermal resistance of a large-area, packaged Ga 2 O 3 device. This work fills this gap by demonstrating a 15-A double-side packaged Ga 2 O 3 Schottky barrier diode (SBD) and measuring its junction-to-case thermal resistance (R θJC ) in the bottom-side- and junction-side-cooling configurations. The R θJC characterization is based on the transient dual interface method, i.e., JEDEC 51-14 standard. The R θJC of the junction- and bottom-cooled Ga 2 O 3 SBD was measured to be 0.5 K/W and 1.43 K/W, respectively, with the former R θJC lower than that of similarly-rated commercial SiC SBDs. This low R θJC is attributable to the heat extraction directly from the Schottky junction instead of through the Ga 2 O 3 chip. Here, the R θJC lower than that of commercial SiC devices proves the viability of Ga 2 O 3 devices for high-power applications and manifest the significance of proper packaging for their thermal management.

42 ENGINEERING↗
DOE OSTI2022

Grid-Connected Modular Soft-Switching Solid State Transformers (M-S4T)

The objective of this project is to develop and verify the concept of a flexible and modular soft-switching solid-state transformer (M-S4T) for direct grid-connected applications. The ability to directly connect power electronics converters to the medium voltage grid (4 kV – 13 kV), and to potentially replace the passive and bulky, but ubiquitous 60 hertz service transformer in the 25 kVA to 100 kVA range, with a more flexible and controllable device, has been regarded as the ‘holy grail’ in grid control. However, this has proven to be extremely difficult. This project has developed the solutions to several key challenges of the direct grid-connected power electronics and realized a 7.2 kV M-S4T prototype. First, a protection method to protect the M-S4T from the high voltages (110 kV for the 13 kV system) that occur on the grid due to transients and lightning strikes have been developed and experimentally verified. Second, the realization and the operation of the M-S4T based on high-voltage SiC devices (>3.3 kV) and a medium-frequency medium-voltage low-leakage transformer in a single-stage solid-state transformer with zero-voltage switching, low dv/dt, and low electromagnetic interference has been successfully demonstrated up to 7.5 kV peak. Third, an oil-cooling system and stable communication and distributed control system for converter module voltage sharing have been developed and experimentally verified. The developed M-S4T has realized a modular universal high-performance power conversion system. This conversion system is scalable to different voltage and power levels and adaptable to four-quadrant bidirectional operation. Moreover, the use of passive cooling techniques meets the equipment life requirements, and the lightning protection scheme fulfills the basic insulation level specifications for direct grid connection. Such power conversion system opens up near-term opportunities, including energy storage, solar PV, or electric vehicle charging with significant cost and footprint savings. In the longer term, the possibility of replacing the utility distribution transformer with an M-S4T will be transformative for future distribution grids with a compact footprint and full controllability to enable high renewable energy and storage penetration. In addition to the main project, this report expands on the Plus-Up projected including as part of the main award. This project developed and demonstrated the technology for autonomous collaborative inverters that can be connected in an ad hoc manner to the grid. The aim of the project was to: (1) evaluate the existing techniques for grid-connected inverters and find their limitations; (2) develop detailed requirements for grid-connected inverters in the modern grid with millions of active nodes; (3) design a unified control strategy that brings more autonomy and intelligence to grid-connected inverters, and addresses parts of the issues with the existing techniques. The proposed technique, called UniCon, enables inverters to 1) connect/disconnect to/from the grid in an ad hoc manner; (2) work based on local sensing. Slow communication could be used for a more optimized behavior; (3) work automatically in both grid-forming/grid-following mode; (4) handle large disturbances, e.g., big load step and fault, in an oscillation-free manner; (5) work collaboratively with other inverters in steady-state and during transients. UniCon can be implemented in the middle-level control; hence it is agnostic to the vendor and to the implementation of the inner voltage/current and protection loops. Furthermore, a new synchronization scheme, based on deep learning, was developed that can extract the grid voltage phase and amplitude in a stable manner. The method is cheap to implement can improve the dynamic performance of the grid-connected inverters during fast transients, e.g., fault. The proposed control scheme was validated by (1) MATLAB/Simulink; (2) hardware-in-the-loop results, and; (3) experimental results using three inverters that form a microgrid in a down-scaled feeder. Lastly, both the M-S4T and UniCon have achieved promising tangible paths to markets. In the case of the M-S4T, the underlying technology — the Soft Switching Solid State Transformer (S4T) developed at the Georgia Tech Center for Distributed Energy (GT-CDE) has been licensed by GridBlock from the Georgia Tech Research Corporation, and GridBlock has been working with manufacturing partner Jabil (one of the largest US-based contract manufacturers) and system integrator Power Secure (largest deployer of microgrids in the US with 4.7 GW under management), to meet the strong initial demand. Similarly, GridBlock has an exclusive license to the UniCon technology, developed under this award by GT-CDE. The UniCon provides an intermediate control layer that enables the implementation of the higher-level ‘transactive’ control commands for the system. The architecture of the system - slow communications with the cloud for system optimization and setpoints, and the use of locally measured quantities for real-time control, provide a very robust and secure way of implementing a real-time must-run grid that is also secure and stable. This is a brand-new functionality that is critical for the future grid and key to GridBlock’s business model.

24 POWER TRANSMISSION AND DISTRIBUTION↗
DOE OSTI2026

A Vertical GaN-Based Neutral-Pointless Three-Level Inverter for High-Performance Automotive Traction Applications

Silicon Carbide (SiC) MOSFETs have emerged as a dominant solution for electric vehicle traction inverters because of their superior power density and efficiency compared to Silicon (Si) counterparts. However, SiC devices possess inherent switching speed limitations that constrain the maximum switching frequency and hinder further power density and efficiency improvements. To address these limitations, this paper proposes a vertical Gallium Nitride (vGaN) based X-type Neutral-Pointless (NPL.X) three-level (3L) inverter for an 800V, 200 kW traction system. Integrating 700V vGaN technology within the NPL.X 3L topology enables improved drive efficiency and higher switching frequencies, resulting in enhanced power density and output power quality. To evaluate the performance benefits, this work conducts a comprehensive loss characterization of the vGaN￾based NPL.X topology, providing a direct comparison with a SiC￾based two level (2L) inverter. The results show that the proposed vGaN-based inverter achieves superior efficiency, particularly within the low-torque regions that dominate standard automotive drive cycles. The proposed vGaN-based inverter represents a critical advancement toward high-power-density and high efficiency traction drives

Halawa, Ali [Purdue Univ., West Lafayette, IN (Uni↗
NASA NTRS2019

Design of Low Inductance Busbar for 500 kVA Three-Level ANPC Converter

The adoption of SiC devices in high power applications enables higher switching speed, which requires lower circuit parasitic inductance to reduce the voltage overshoot. This paper presents the design of a busbar for a 500 kVA three-level active natural clamped converter. The layout of the busbar is discussed in detail based on the analysis of the multiple commutation loops, magnetic cancelling effect, and DC-link capacitor placement. The loop inductance of the designed busbar is verified with simulation, impedance measurements and converter experiment. The results can match with each other and the inductances of small and large loop are 6.5 nH and 17.5 nH respectively, which is significantly lower than the busbars of NPC type converters in other references.

SiC MOSFET↗