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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 55 records · Page 3
All sourcesNASA NTRSDOE OSTI
NASA NTRS2019

Mechanisms of Heavy Ion-Induced Single Event Burnout in 4H-SiC Power MOSFETs

This describes the mechanisms behind the failure of 4H-SiC Power MOSFETs when struck by a heavy ion. The modeled device is designed to simulate a commercially available 1200 V power MOSFET and the ion simulated is a silver ion with a Linear Energy Transfer of 46 MeV-cm2/mg commonly used in single event effect (SEE) testing. The device is shown in simulation to fail near 500 V, which is in close agreement to experiments. These simulations go to show that the failure of SiC MOSFET occurs near the interface between the epi and substrate layers due to the rapid increase of the electric field in that region and destruction of the device from impact ionization. From this, two designs were proposed and investigated that would help to mitigate the electric field in these regions and improve the device's tolerance to single-event burnout (SEB). The new designs increased the voltage at which SEB occurs from 500 V to over 900 V and increased the Ron,sp by only 5%.

Mcpherson, Joseph A.↗
DOE OSTI2020

A Novel Voltage Balancing Control With dv/dt Reduction for 10-kV SiC MOSFET-Based Medium Voltage Modular Multilevel Converter

Using high voltage (HV) silicon carbide (SiC) power semiconductors in a modular multilevel converter (MMC) is promising because it results in fewer submodules and lower switching loss compared to conventional Si based solutions. The nearest level pulsewidth modulation (NL-PWM) is commonly used in the MMC for medium voltage applications. However, with the NL-PWM and existing voltage balancing control, there are many submodules that switch their modes in a control cycle, resulting in a high dv/dt during the deadtime of the power semiconductor, which could be multiple times of the dv/dt of the single device. This poses great challenges on the noise immunity and insulation design in the MMC using HV SiC devices, which have very fast switching speed. A novel voltage balancing control, which ensures only two submodules switch their modes in a control cycle, is proposed in this article, limiting the maximum dv/dt to the dv/dt of a single power semiconductor and also maintaining the voltage balance performance. Furthermore, the proposed voltage balancing control is experimentally validated in a 10-kV SiC mosfet based MMC with four submodules per arm.

42 ENGINEERING↗
NASA NTRS2017

Radiation Hardness Study on SiC Power MOSFETs

As an emerging technology, silicon carbide (SiC) power MOSFETs are showing great potential for higher temperature/power rating, higher efficiency, and reduction in size and weight, which makes this technology ideal for high temperature, harsh environment applications such as downhole, medical, avionic, or even space applications. Radiation tolerance therefore becomes a critical aspect of the device performance in such environments. In this work, we explored radiation hardness of SiC devices to total ionizing dose (TID), neutron-induced single-event burnout (SEB), and heavy-ion induced single-event effects (SEE).

SiC↗
DOE OSTI2021

Performance Evaluation and Loss Modeling of WBG Devices based on a Novel Double-Pulse Test Method for Current Source Inverter

Careful measurements of the power device characteristics are necessary to accurately estimate a power converter's losses and efficiency. The conventional double-pulse test (DPT) circuit is a well-known method to implement this laboratory characterization of power devices and power modules. However, the switching characteristics of a power device depend on the power electronics circuit in which it is connected as well as the power circuit's physical layout, in addition to the device's internal structure. Hence, the conventional DPT circuit configuration, which is tailored for a standard voltage-source inverter (VSI), is not well-suited for a current-source inverter (CSI). This paper demonstrates a previously-proposed CSI-based DPT measurement technique that is appropriate for normal CSI operation. The characteristics of SiC MOSFETs and series-connected SiC Schottky diodes used in a CSI are measured using this improved technique while taking temperature effects into account to yield more accurate loss predictions. The CSI losses, including the switching and conduction losses of SiC MOSFETs and SiC Schottky diodes, have been modeled using this approach. The total CSI losses and efficiency have been estimated based on the CSI DPT results and loss models.

42 ENGINEERING↗
DOE OSTI2022

A Comparison of Ion Implantation at Room Temperature and Heated Ion Implantation on the Body Diode Degradation of Commercial 3.3 kV 4H-SiC Power MOSFETs

It has been demonstrated that basal plane dislocations (BPDs)-induced stacking faults (SFs) cause body diode degradation in commercial 4H-SiC power MOSFETs, especially with higher voltage ratings. BPDs originate from 4H-SiC boule, epi growth, and ion implantation. Considering the lower cost of ion implantation at room temperature (RT), this work investigates the potential of RT ion implantation replacing heated (HT) ion implantation by comparing the influence of both ion implantations on the body diode degradation of commercial 3.3 kV 4H-SiC power MOSFETs. We demonstrate with long-term (up to 1000 hours) forward current stress that RT implantation can keep the body diode degradation of 3.3 kV 4H-SiC power MOSFETs within the specification limits compared with HT implantation.

4H-SiC↗
DOE OSTI2020

Design of 1500V/200kW 99.6% Efficiency Dual Active Bridge Converters Based on 1700V SiC Power MOSFET Module

High efficiency, high density and galvanically isolated power converters are attractive for medium voltage high power applications. This paper presents a 1.5kV/200kW bidirectional Dual Active Bridge (DAB) converter using a newly developed 1.7kV SiC MOSFET module. The intended application is megawatt scale solid state transformer (SST) and 1500V PV inverter application using modular architecture. One novel model to estimate the turn-off loss using snubber capacitors is proposed and experimentally verified. An optimized PCB-based busbar design is introduced to reduce the voltage overshoot across the SiC device, making the design suitable for 1.5kVdc applications. The mechanism of how the optimized PCB-based busbar can reduce the voltage overshoot is quantitatively interpreted and experimentally verified. The DAB converter achieved an efficiency of 98.85% at 200kW and a maximum of 99.53% at 60kW. The maximum efficiency for series-resonant mode is 99.6% at 85kW and 99.3% at 200kW. The power density is 26W/inch3 (1.6MW/m3) which is much higher than traditional industry products.

Xu, Wei↗
DOE OSTI2020

Comparison and Discussion on Shortcircuit Protections for Silicon-Carbide MOSFET Modules: Desaturation Versus Rogowski Switch-Current Sensor

Survivability of silicon-carbide (SiC) mosfet modules during short circuit (SC) is essential for modern power electronics systems due to large economic implications. SiC mosfet modules exhibit narrow SC withstand times and generally much lower SC robustness than silicon (Si) insulated-gate bipolar transistors (IGBTs). This puts a critical concern on their utilization, further stressing the importance of reliable protection. This article presents a comprehensive analysis and discussion on the SiC mosfet module SC protection and performance comparison between conventional desaturation detection, previously used for Si IGBT protection, and Rogowski switch-current sensor (RSCS) detection. In addition, this article presents the experimental design for soft turn-off as a reaction to the SC detection to avoid excessive overshoots during the abrupt turn-off of the SC current. To perform different types of SC with various fault inductances on different temperatures, and for the sake of fair comparison under the same conditions, a gate-driver unit for 1.2 kV SiC mosfet half-bridge modules is developed containing both detection methods. The results demonstrate that both methods are successful in protecting the module in all SC types, with superiority of the RSCS detection and concerns for desaturation detection in high-inductance and high dc-bus voltage SC events.

42 ENGINEERING↗
DOE OSTI2020

Hardware Design and Demonstration of a 100kW, 99% Efficiency Dual Active Half Bridge Converter Based on 1700V SiC Power MOSFET

High efficiency, high density and galvanically isolated power converters are attractive for numerous medium voltage high power applications. This paper presents a 1.5kVdc, 100kW bidirectional Dual Active Half Bridge (DAHB) using newly developed 1.7kV SiC MOSFET modules. The DAHB achieved an efficiency of 98.6% at full load of 100kW and a maximum of 99% at 45kW, operating as an isolated DC/DC converter. The converter also achieved an efficiency of 97.8% operating as an isolated DC/AC inverter. An optimized PCB-based busbar design has significantly reduced the voltage overshoot across the device, making the design suitable for 1500Vdc input application such as 1500V PV inverters. Typical partial discharge inception voltage (PDIV) of the optimized PCB busbar is 1.7kVpeak with total charge <10pC. The power density of the DAHB converter is 1.8MVA/m 3 which is much higher than traditional two-stage industry products. The DAHB converter can be used as a building block for a 4.16kV/1MVA utility scale PV systems with input parallel and output series configuration.

Xu, Wei↗
DOE OSTI2020

Metal oxide semiconductor (MOS) controlled devices and methods of making the same

Metal-Oxide-Semiconductor (MOS) controlled semiconductor devices and methods of making the devices are provided. The devices include a gate which controls current flow through channel regions positioned between source/emitter and drain regions of the device. The devices include a gate oxide layer having a variable thickness. The thickness of the gate oxide layer under the edge of the gate and over the source/emitter regions is different than the thickness over the channel regions of the device. The oxide layer thickness near the edge of the gate can be greater than the oxide layer thickness over the channel regions. The source/emitter regions can be implanted to provide enhanced oxide growth during gate oxide formation. The source/emitter region can include regions that are implanted to provide enhanced oxide growth during gate oxide formation and regions which do not provide enhanced oxide growth during gate oxide formation. The devices can be SiC devices such as SiC MOSFETs and SiC IGBTs.

36 MATERIALS SCIENCE↗
DOE OSTI2022

Metal oxide semiconductor (MOS) controlled devices and methods of making the same

Metal-Oxide-Semiconductor (MOS) controlled semiconductor devices and methods of making the devices are provided. The devices include a gate which controls current flow through channel regions positioned between source/emitter and drain regions of the device.The devices include a gate oxide layer having a variable thickness. The thickness of the gate oxide layer under the edge of the gate and over the source/emitter regions is different than the thickness over the channel regions of the device. The oxide layer thickness near the edge of the gate can be greater than the oxide layer thickness over the channel regions. The source/emitter regions can be implanted to provide enhanced oxide growth during gate oxide formation. The source/emitter region can include regions that are implanted to provide enhanced oxide growth during gate oxide formation and regions which do not provide enhanced oxide growth during gate oxide formation. The devices can be SiC devices such as SiC MOSFETs and SiC IGBTs.

Matocha, Kevin↗
DOE OSTI2020

Investigation of Dynamic Temperature-Sensitive Electrical Parameters for Medium-Voltage Low-Current Silicon Carbide and Silicon Devices

This paper presents five dynamic temperature-sensitive electrical parameters (TSEPs) for the medium-voltage silicon carbide (SiC) and silicon (Si) devices. The theoretical temperature dependence of these parameters is analyzed. A test platform that enables to implement the temperature relevant dynamic characterization is developed. The tested TSEPs are summarized in terms of their relationship with junction temperature, drain/collector current, DC voltage, and external gate resistance. The comparison between the 3 kV 12 A Si IGBT and 3.3 kV 5 A SiC MOSFET with the identical TO-263 package is conducted. The results verify that the turn-off drain-source voltage switching rate achieves better thermal sensitivity for medium-voltage low-current SiC MOSFETs compared with Si IGBTs. Both the turn-on and turn-off delay time exhibit better thermal linearity for the two devices. The turn-off delay time further achieves five times better thermal sensitivity than the turn-on delay time for investigated medium-voltage SiC MOSFETs.

Ni, Ze↗
DOE OSTI2024

A Multi-Metrics In Situ Aging Detector for SiC Power MOSFET Modules with Full Driver-Integration Capability

In this paper, the concept and prototype of an aging detector for silicon carbide (SiC) power metal oxide semiconductor field effect transistor (MOSFET) are proposed and described. It leverages the resonant peak values of gate-source voltage at different instants during the switching transients to decode the change of multiple aging indicators, such as the increases of on-state resistance and threshold voltage. Modeling-based analysis is conducted to support the idea. The detector can be fully integrated into gate drivers without any additional connection to the power stage and is functional during normal power stage operation. A prototype unit was built, and preliminary tests were conducted to validate the idea and the practicality of the detector.

aging↗
DOE OSTI2023

Medium-Voltage Isolated Auxiliary Power Supply Design for High Insulation Capability, Ultra-Low Coupling Capacitance, and Small Size

To fully utilize the benefits of medium-voltage (MV) silicon carbide (SiC)-based converter and achieve high power density, the isolated auxiliary power supply (IAPS) needs to be as small as possible. However, the high insulation and low coupling capacitance requirements, considering the high voltage and high dv / dt , are constraints of size reduction. This article proposes an MV IAPS design for high insulation capability, ultra-low coupling capacitance, and small size. The topology selection, efficiency, load regulation, coupling capacitance, and size reduction considerations are discussed. A 2.5 W MV IAPS is designed and built for a 10 kV SiC mosfet -based 13.8 kV/100 kW three-phase converter, achieving a partial discharge (PD) inception voltage of higher than 15 kV rms, ultra-low coupling capacitance of 1.03 pF, and smaller size than that of the commercial products as well as the state-of-art research prototypes. Experimental results of PD test, 10 kV SiC mosfet -based half-bridge test, and 13.8 kV/100 kVA three-phase converter full rating test are conducted for design validation.

42 ENGINEERING↗
DOE OSTI2022

A 4 kV/120 A SiC Solid-State DC Circuit Breaker Powered By a Load-Independent IPT System

This article introduces a 4 kV/120 A solid-state dc circuit breaker (DCCB) based on discrete SiC mosfets. The DCCB is designed in a five-layer tower structure. Each layer consists of a circular main conduction branch and an attached gate driver. There are two primary benefits of the proposed DCCB. First, it reduces conduction loss with multiple devices in parallel. Second, it achieves an ultrafast response speed with SiC mosfets. Moreover, the gate drivers of the DCCB are powered by a domino inductive power transfer (IPT) system. It achieves the load-independent constant-voltage output characteristics, which means the outputs are immune to load variations. Additionally, an IPT system prototype is implemented to test the power transfer performance. At 500-kHz frequency, the total output power reaches 15.73 W, which is sufficient to power on five gate drivers, with a peak transfer efficiency of 75.4%. The IPT system is tested to power a 4 kV/120 A DCCB prototype. It validates that the DCCB is effective to turn off 120 A current within 3.5 μs.

42 ENGINEERING↗
DOE OSTI2020

Design Optimization of Medium-Frequency Transformer for DAB Converters With DC Bias Capacity

Medium-frequency transformer (MFT) dc bias is critical for the safe operation of dual-active-bridge (DAB) converters. To analyze the dc bias, expressions of dc bias are derived for SiC MOSFET DAB converters. It shows that the dc bias is a current source in steady state; thus, a dc bias current capacity is defined and used as a design constraint in the optimization of MFT. The dc bias current capacity is related to core materials, geometric parameters, and flux density, which is analyzed with analytical expression. Optimization equations with geometric variables are derived, which can be solved theoretically or numerically for both interleaved winding (IW) and separated winding (SW) MFT without and/or with leakage inductance design. Based on the optimization equations, different MFT designs for a 150-kW SiC MOSFET DAB converter are compared on the aspects of core materials, winding structures, and without/with leakage inductance design. The combination of IW structure MFT with auxiliary phase shift inductors is chosen, and the assembled prototype is tested with the 150-kW DAB converter. Here, the designed dc bias capacity, temperature rise, and efficiency are verified.

42 ENGINEERING↗