Engineering Papers⌕ Search

SEARCH · Engineering Papers

Results for “Nonvolatile memory”

Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

Quote a phrase for an exact phrase match. Source license links do not imply unrestricted reuse.

At least 55 records · Page 3

Investigation of field induced trapping on floating gates

The development of a technology for building electrically alterable read only memories (EAROMs) or reprogrammable read only memories (RPROMs) using a single level metal gate p channel MOS process with all conventional processing steps is outlined. Nonvolatile storage of data is achieved by the use of charged floating gate electrodes. The floating gates are charged by avalanche injection of hot electrodes through gate oxide, and discharged by avalanche injection of hot holes through gate oxide. Three extra diffusion and patterning steps are all that is required to convert a standard p channel MOS process into a nonvolatile memory process. For identification, this nonvolatile memory technology was given the descriptive acronym DIFMOS which stands for Dual Injector, Floating gate MOS.

Gosney, W. M.↗

Enhanced fatigue and retention in ferroelectric thin film memory capacitors by post-top electrode anneal treatment

Thin film ferroelectric capacitors comprising a ferroelectric film sandwiched between electrodes for nonvolatile memory operations are rendered more stable by subjecting the capacitors to an anneal following deposition of the top electrode. The anneal is done so as to form the interface between the ferroelectric film and the top electrode. Heating in an air oven, laser annealing, or electron bombardment may be used to form the interface. Heating in an air oven is done at a temperature at least equal to the crystallization temperature of the ferroelectric film. Where the ferroelectric film comprises lead zirconate titanate, annealing is done at about 550 to 600 C for about 10 to 15 minutes. The formation treatment reduces the magnitude of charge associated with the nonswitching pulse in the thin film ferroelectric capacitors. Reduction of this charge leads to significantly more stable nonvolatile memory operations in both digital and analog memory devices. The formation treatment also reduces the ratio of change of the charge associated with the nonswitching pulse as a function of retention time. These improved memory devices exhibit greater performance in retention and reduced fatigue in memory arrays.

Thakoor, Sarita↗

Effect of Gamma Radiation on TaOₓ ECRAM

Electrochemical random access memory (ECRAM) is an emerging three-terminal nonvolatile memory (NVM) with highly controllable channel conductance which is promising for use as an analog memory (or synapse) in analog in-memory computing (IMC) systems. Energy-efficient analog IMC computing is particularly desirable for power-constrained, high-radiation environments such as satellites. However, little is known about the suitability of ECRAM for use in a total ionizing dose (TID) environment. Here, this work investigates the effect of Co-60 gamma radiation on the channel conductance and noise—two properties critical for analog IMC systems—of a TaO x -based ECRAM up to 17.3 Mrad(SiO 2 ) for both low- and high-channel-conductance state devices. A transient increase in conductance is observed in response to radiation which consists of two elements: an immediate increase in conductivity due to photocurrent and a secondary increase in conductivity, which has a slower rise and saturation and can persist for hours after exposure. This secondary, persistent photoconductivity is attributed to charging caused by hole trapping. These transient effects would not likely occur in a space environment due to the low dose rate compared with this experiment. No permanent change is found in the low conductance state (LCS) following exposure and the minor shift in the high conductance change would be less significant than the regular retention decay in this state. A permanent increase in the random telegraph noise is observed, possibly due to increased traps created in the channel. This work demonstrates that TaO x -based ECRAM is suitable for use in spaceborne analog IMC systems that are subject to significant TID.

ECRAM↗

Enhanced fatigue and retention in ferroelectric thin film memory capacitors by post-top electrode anneal treatment

Thin film ferroelectric capacitors (10) comprising a ferroelectric film (18) sandwiched between electrodes (16 and 20) for nonvolatile memory operations are rendered more stable by subjecting the capacitors to an anneal following deposition of the top electrode (20). The anneal is done so as to form the interface (22) between the ferroelectric film and the top electrode. Heating in an air oven, laser annealing, or electron bombardment may be used to form the interface. Heating in an air oven is done at a temperature at least equal to the crystallization temperature of the ferroelectric film. Where the ferroelectric film comprises lead zirconate titanate, annealing is done at about 550.degree. to 600.degree. C. for about 10 to 15 minutes. The formation treatment reduces the magnitude of charge associated with the non-switching pulse in the thin film ferroelectric capacitors. Reduction of this charge leads to significantly more stable nonvolatile memory operations in both digital and analog memory devices. The formation treatment also reduces the ratio of change of the charge associated with the non-switching pulse as a function of retention time. These improved memory devices exhibit greater performance in retention and reduced fatigue in memory arrays.

Thakoor, Sarita↗

Nonvolatile Voltage Controlled Molecular Spin-State Switching for Memory Applications

Nonvolatile, molecular multiferroic devices have now been demonstrated, but it is worth giving some consideration to the issue of whether such devices could be a competitive alternative for solid-state nonvolatile memory. For the Fe (II) spin crossover complex [Fe{H2B(pz)2}2(bipy)], where pz = tris(pyrazol-1-yl)-borohydride and bipy = 2,2′-bipyridine, voltage-controlled isothermal changes in the electronic structure and spin state have been demonstrated and are accompanied by changes in conductance. Higher conductance is seen with [Fe{H2B(pz)2}2(bipy)] in the high spin state, while lower conductance occurs for the low spin state. Plausibly, there is the potential here for low-cost molecular solid-state memory because the essential molecular thin films are easily fabricated. However, successful device fabrication does not mean a device that has a practical value. Here, we discuss the progress and challenges yet facing the fabrication of molecular multiferroic devices, which could be considered competitive to silicon.

37 INORGANIC, ORGANIC, PHYSICAL, AND ANALYTICAL CH↗

Ultrafast high-endurance memory based on sliding ferroelectrics

The persistence of voltage-switchable collective electronic phenomena down to the atomic scale has extensive implications for area- and energy-efficient electronics, especially in emerging nonvolatile memory technology. We investigate the performance of a ferroelectric field-effect transistor (FeFET) based on sliding ferroelectricity in bilayer boron nitride at room temperature. Sliding ferroelectricity represents a different form of atomically thin two-dimensional (2D) ferroelectrics, characterized by the switching of out-of-plane polarization through interlayer sliding motion. We examined the FeFET device employing monolayer graphene as the channel layer, which demonstrated ultrafast switching speeds on the nanosecond scale and high endurance exceeding 10 11 switching cycles, comparable to state-of-the-art FeFET devices. These characteristics highlight the potential of 2D sliding ferroelectrics for inspiring next-generation nonvolatile memory technology.

Science & Technology - Other Topics↗

Understanding Reliability Trade-Offs in 1T-nC and 2T-nC FeRAM Designs

Ferroelectric random access memory (FeRAM) is a promising candidate for energy-efficient nonvolatile memory, particularly for logic-in-memory and compute-in-memory (CIM) applications. Among the available cell architectures, One-Transistor–n-Capacitor (1T-nC) and two-transistor–n-capacitor (2T-nC) FeRAMs each offer distinct trade-offs in density, scalability, and reliability. In this work, we present a comparative study of these two architectures under both dimensional scaling ( XY/Z shrinkage) and vertical integration (increasing stacked capacitors per cell). Using technology computer-aided design (TCAD) and circuit-level simulations, we analyze how scaling impacts ferroelectric capacitance, parasitic coupling, and floating-node (FN) dynamics, which together dictate sense margin (SM) and read stability. A key mitigation strategy—floating unselected capacitors—is applied to both architectures, effectively decoupling the SM from the number of stacked capacitors and enabling tractable analysis across scaling regimes. Results show that 1T-nC suffers more from charge sharing with the bitline (BL), while 2T-nC benefits from transistor isolation and stronger low-voltage sensing at the cost of increased area. By systematically evaluating these behaviors across scaling directions, this work establishes the reliability trade-offs of 1T-nC and 2T-nC cells and provides design guidelines for high-density, vertically integrated FeRAM systems.

1T-nC↗

Ultraefficient resistance switching between charge ordered phases in 1 T -TaS 2 with a single picosecond electrical pulse

Progress in high-performance computing demands significant advances in memory technology. Among novel memory technologies that promise efficient device operation on a sub-ns timescale, resistance switching between charge ordered phases of 1T-TaS 2 has shown to be potentially useful for development of high-speed, energy efficient nonvolatile memory devices. Measurement of the electrical operation of such devices in the picosecond regime is technically challenging and hitherto still largely unexplored. Here, we use an optoelectronic “laboratory-on-a-chip” experiment for measurement of ultrafast memory switching, enabling accurate measurement of electrical switching parameters with 100 fs temporal resolution. Photoexcitation and electro-optic sampling on a (Cd,Mn)Te substrate are used to generate and, subsequently, measure electrical pulse propagation with intra-band excitation and sub-gap probing, respectively. We demonstrate high contrast nonvolatile resistance switching from high to low resistance states of a 1T-TaS 2 device using single sub-2ps electrical pulses. Using detailed modeling, we find that the switching energy density per unit area is exceptionally small, E A =9.4 fJ/μm 2 . Finally, the speed and energy efficiency of an electronic “write” process place the 1T-TaS 2 devices into a category of their own among new generation nonvolatile memory devices.

42 ENGINEERING↗

DIFMOS - A floating-gate electrically erasable nonvolatile semiconductor memory technology

Electrically alterable read-only memories (EAROM's) or reprogrammable read-only memories (RPROM's) can be fabricated using a single-level metal-gate p-channel MOS technology with all conventional processing steps. Given the acronym DIFMOS for dual-injector floating-gate MOS, this technology utilizes the floating-gate technique for nonvolatile storage of data. Avalanche injection of hot electrons through gate oxide from a special injector diode in each bit is used to charge the floating gates. A second injector structure included in each bit permits discharge of the floating gate by avalanche injection of holes through gate oxide. The overall design of the DIFMOS bit is dictated by the physical considerations required for each of the avalanche injector types. The end result is a circuit technology which can provide fully decoded bit-erasable EAROM-type circuits using conventional manufacturing techniques.

Gosney, W. M.↗

Applications of Strain-Coupled Magnetoelectric Composites

This article deals with research, development and future directions of magnetoelectric composites for practical devices applications. In the past 20 years there has been a surge of research in the area of multiferroics (MF) and magnetoelectrics (ME) due to their potential to replace existing technologies based only on ferroelectric or ferromagnetic materials. Some of the magnetoelectric composites show exceptionally high potential in the area of magnetic field sensors, however, work remains before commercialization can be realized. The cross coupling among various ferroic parameters in magnetoelectric composites is several orders higher than single phase magetoelectrics, which make its favorable for low detection (nT or pT) magnetic field sensors. Advances in both layered structures or controlled three-dimensional matrix composites for applications as magnetoelectric nonvolatile memory elements are both required. Robust cross-coupling among various parameters with more than four logic states and its compatibility with complementary-symmetry metal–oxide–semiconductor (CMOS) technology are the main requirements for heterostructure magnetoelectric thin films. The major hurdles in the area of magnetoelectric nonvolatile memory elements are poor interfacial properties and weak magnetoelectric coupling for high density fast read and write processes. Another potential area is strained coupled magneto-electric composites where magnetostriction mediated dimensional change in the magnetic layer effectively modulate the change in the dimension of piezoelectric layers via piezostriction, which leads to a strong ME coupling where their coupling magnitude is sufficient for magnetic field sensors. Energy harvesters based on magnetoelectric composites are also intriguing concepts to capture various types of waste energy, in the form mechanical vibration, pressure, wind energy, hydrothermal and waste temperature.

36 MATERIALS SCIENCE↗

Giant Nonlinear Optical Response via Coherent Stacking of In-Plane Ferroelectric Layers

Thin ferroelectric materials hold great promise for compact nonvolatile memory and nonlinear optical and optoelectronic devices. Herein, an ultrathin in-plane ferroelectric material that exhibits a giant nonlinear optical effect, group-IV monochalcogenide SnSe, is reported. Nanometer-scale ferroelectric domains with ≈90°/270° twin boundaries or ≈180° domain walls are revealed in physical-vapor-deposited SnSe by lateral piezoresponse force microscopy. Atomic structure characterization reveals both parallel and antiparallel stacking of neighboring van der Waals ferroelectric layers, leading to ferroelectric or antiferroelectric ordering. Ferroelectric domains exhibit giant nonlinear optical activity due to coherent enhancement of second-harmonic fields and the as-resulted second-harmonic generation was observed to be 100 times more intense than monolayer WS 2 . This work demonstrates in-plane ferroelectric ordering and giant nonlinear optical activity in SnSe, which paves the way for applications in on-chip nonlinear optical components and nonvolatile memory devices.

36 MATERIALS SCIENCE↗

Electronegative metal dopants improve switching variability in Al 2 ⁢O 3 resistive switching devices

Resistive random-access memories are promising for nonvolatile memory and brain-inspired computing applications. High variability and low yield of these devices are key drawbacks hindering reliable training of physical neural networks. In this paper, we show that doping an oxide electrolyte, Al 2 ⁢O 3 , with electronegative metals makes resistive switching significantly more reproducible, surpassing the reproducibility requirements for obtaining reliable hardware neuromorphic circuits. Based on density functional theory calculations, the underlying mechanism is hypothesized to be the ease of creating oxygen vacancies in the vicinity of electronegative dopants due to the capture of the associated electrons by dopant midgap states and the weakening of Al-O bonds. These oxygen vacancies and vacancy clusters also bind significantly to the dopant, thereby serving as preferential sites and building blocks in the formation of conducting paths. Throughout this work, we validate this theory experimentally by implanting different dopants over a range of electronegativities in devices made of multiple alternating layers of Al 2 ⁢O 3 and WN and find superior repeatability and yield with highly electronegative metals, Au, Pt, and Pd. These devices also exhibit a gradual SET transition, enabling multibit switching that is desirable for analog computing.

36 MATERIALS SCIENCE↗

Nonvolatile read/write memory element - A concept

Memory, with limited number of programming cycles, is achieved by using verticle, fusible links in series with oxide breakthrough elements. Memory elements are fabricated with integrated circuit technology and are ideal for low power digital computer application.

Cricchi, J. R.↗

Nonvolatile read/write memory element - A concept

Bidirectional MOS driver, integrated with diode matrix reduces fuse read current to only that of junction leakage and transient MOS gate charging current. No current, except junction leakage current, flows in unaddressed cells. Current required to drive MOS gate flows through unfused branch only during read mode.

Cricchi, J. R.↗

Electrically Variable Resistive Memory Devices

Nonvolatile electronic memory devices that store data in the form of electrical- resistance values, and memory circuits based on such devices, have been invented. These devices and circuits exploit an electrically-variable-resistance phenomenon that occurs in thin films of certain oxides that exhibit the colossal magnetoresistive (CMR) effect. It is worth emphasizing that, as stated in the immediately preceding article, these devices function at room temperature and do not depend on externally applied magnetic fields. A device of this type is basically a thin film resistor: it consists of a thin film of a CMR material located between, and in contact with, two electrical conductors. The application of a short-duration, low-voltage current pulse via the terminals changes the electrical resistance of the film. The amount of the change in resistance depends on the size of the pulse. The direction of change (increase or decrease of resistance) depends on the polarity of the pulse. Hence, a datum can be written (or a prior datum overwritten) in the memory device by applying a pulse of size and polarity tailored to set the resistance at a value that represents a specific numerical value. To read the datum, one applies a smaller pulse - one that is large enough to enable accurate measurement of resistance, but small enough so as not to change the resistance. In writing, the resistance can be set to any value within the dynamic range of the CMR film. Typically, the value would be one of several discrete resistance values that represent logic levels or digits. Because the number of levels can exceed 2, a memory device of this type is not limited to binary data. Like other memory devices, devices of this type can be incorporated into a memory integrated circuit by laying them out on a substrate in rows and columns, along with row and column conductors for electrically addressing them individually or collectively.

Liu, Shangqing↗

Nanoprobe Based Information Processing: Nanoprobe‐Electronics

Abstract With computational architectures becoming data‐centric and with the rise of in‐memory computing, the role of memory will be ever more crucial. In turn, storing massive amount of data demands for ultra‐low power and non‐volatile types necessitating new memory technologies. Here, a controllable nanoelectromechanical (NEM) spin memory is proposed for compact nonvolatile memory arrays. It combines the advantages of both nanomechanical and spin‐transfer torque (STT) magnetic memory devices to overcome fundamental scalability roadblocks of non‐hybrid alternatives. The hybrid system paves the way to a new memory technology in the regime of sub‐10‐nm lateral size with a sub‐1‐MA cm −2 switching energy.

Yi, Bao↗