Engineering Papers⌕ Search

SEARCH · Engineering Papers

Results for “Neuromorphic computing”

Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

Quote a phrase for an exact phrase match. Source license links do not imply unrestricted reuse.

At least 55 records · Page 3

Three-Dimensional Integration of Functional Oxides and Crystalline Silicon for Optical Neuromorphic Computing Using Nanometer-Scale Oxygen Scavenging Barriers

Dating to the first reports of epitaxial oxide deposition on Si(001), the integration of complex oxides on silicon has been a fast-moving area of research, where fundamental materials physics is intimately connected to tremendous technological promise in such areas as integrated electronics, optical neuromorphic and quantum computing, and sensing, to name a few. Despite their great promise, devices relying on the co-integration of silicon and epitaxial perovskites are typically limited to basic, planar geometries due to practical issues with their fabrication. In this paper, we overcome these long-standing challenges by developing a method to produce high-quality Si(001)/TMO/Si(001)/TMO heterostructures without wafer bonding, resulting in the straightforward three-dimensional integration of functional complex oxides and active Si(001) layers into a technologically relevant platform that is needed for on-chip hardware implementations of neuromorphic computing based on optical signals. We present detailed structural and chemical characterization of our heterostructures and discuss generalized design rules for their fabrication. Our results exponentially expand the universe of practically achievable TMO-based integrated devices and push this promising class of materials closer to realizing their full technological potential.

37 INORGANIC, ORGANIC, PHYSICAL, AND ANALYTICAL CH↗

Resistive Switching of Spinel Li 4 Ti 5 O 12 Lithium-Ion Battery Material for Neuromorphic Computing

The rapid rise of AI has exposed significant limitations in conventional Von Neumann computing architecture, particularly in regard to speed and energy efficiency. To address these challenges, researchers are exploring a brain-inspired neuromorphic architecture that mimics biological neural networks, enabling massive parallel processing with reduced power consumption for complex AI computational demands. Recent interest has focused on utilizing battery electrodes and solid electrolyte materials for their resistive switching properties in developing a neuromorphic architecture. These properties are precisely tuned through local- and bulk-level chemical composition modifications via voltage bias stimuli. In this study, we demonstrate fabricating a three-terminal lithium-ion electrochemical transistor based on lithium titanium oxide (Li 4 Ti 5 O 12 ), a popular lithium-ion battery anode material. We deposited and characterized LTO thin films using RF sputtering, demonstrating a 6 orders of magnitude increase in electronic conductivity upon lithiation, with conductivity plateauing after 20% lithiation. Density functional theory calculations revealed transformation from the insulating to conducting state, supported by experimental characterization through X-Ray Photoelectron Spectroscopy (XPS) and Direct Current (DC) polarization analyses. The fabricated transistor consisted of LTO as the channel layer, gold as source/drain terminals, lithium phosphorus oxynitride (LiPON) as the lithium-ion conductor, and copper as the gate terminal. The device exhibited clear hysteresis in transfer characteristics due to lithium insertion/extraction processes. Long-term potentiation (LTP) and long-term depression (LTD) measurements showed an asymmetric ratio of 1.425 and maximum/minimum conductance ratio of 7.83. When implemented in a deep neural network (DNN) for MNIST handwritten digit recognition, the device achieved 92.03% accuracy over 20 training epochs. Detailed transport mechanism analysis revealed the crucial role of oxygen vacancies and interface effects in device operation. Our preliminary findings establish LTO-based lithium-ion electrochemical transistors as promising candidates for energy-efficient neuromorphic computing applications, offering potential solutions to traditional Von Neumann architecture limitations.

25 ENERGY STORAGE↗

Metaplastic and energy-efficient biocompatible graphene artificial synaptic transistors for enhanced accuracy neuromorphic computing

CMOS-based computing systems that employ the von Neumann architecture are relatively limited when it comes to parallel data storage and processing. In contrast, the human brain is a living computational signal processing unit that operates with extreme parallelism and energy efficiency. Although numerous neuromorphic electronic devices have emerged in the last decade, most of them are rigid or contain materials that are toxic to biological systems. In this work, we report on biocompatible bilayer graphene-based artificial synaptic transistors (BLAST) capable of mimicking synaptic behavior. The BLAST devices leverage a dry ion-selective membrane, enabling long-term potentiation, with ~50 aJ/µm 2 switching energy efficiency, at least an order of magnitude lower than previous reports on two-dimensional material-based artificial synapses. The devices show unique metaplasticity, a useful feature for generalizable deep neural networks, and we demonstrate that metaplastic BLASTs outperform ideal linear synapses in classic image classification tasks. With switching energy well below the 1 fJ energy estimated per biological synapse, the proposed devices are powerful candidates for bio-interfaced online learning, bridging the gap between artificial and biological neural networks.

97 MATHEMATICS AND COMPUTING↗

Controllable Reset Behavior in Domain Wall–Magnetic Tunnel Junction Artificial Neurons for Task-Adaptable Computation

Neuromorphic computing with spintronic devices has been of interest due to the limitations of CMOS-driven von Neumann computing. Domain wall–magnetic tunnel junction (DW-MTJ) devices have been shown to be able to intrinsically capture biological neuron behavior. Edgy-relaxed behavior, where a frequently firing neuron experiences a lower action potential threshold, may provide additional artificial neuronal functionality when executing repeated tasks. In this letter, we demonstrate that this behavior can be implemented in DW-MTJ artificial neurons via three alternative mechanisms: shape anisotropy, magnetic field, and current-driven soft reset. Using micromagnetics and analytical device modeling to classify the Optdigits handwritten digit dataset, we show that edgy-relaxed behavior improves both classification accuracy and classification rate for ordered datasets while sacrificing little to no accuracy for a randomized dataset. This letter establishes methods by which artificial spintronic neurons can be flexibly adapted to datasets.

42 ENGINEERING↗

Mixed Delay/Nondelay Embeddings Based Neuromorphic Computing with Patterned Nanomagnet Arrays

Patterned nanomagnet arrays (PNAs) have been shown to exhibit a strong geometrically frustrated dipole interaction. Some PNAs have also shown emergent domain wall dynamics. Previous works have demonstrated methods to physically probe these magnetization dynamics of PNAs to realize neuromorphic reservoir systems that exhibit chaotic dynamical behavior and high-dimensional nonlinearity. These PNA reservoir systems from prior works leverage echo state properties and linear/nonlinear short-term memory of component reservoir nodes to map and preserve the dynamical information of the input time-series data into nondelay spatial embeddings. Such mappings enable these PNA reservoir systems to imitate and predict/forecast the input time series data. However, these prior PNA reservoir systems are based solely on the nondelay spatial embeddings obtained at component reservoir nodes. As a result, they require a massive number of component reservoir nodes, or a very large spatial embedding (i.e., high-dimensional spatial embedding) per reservoir node, or both, to achieve acceptable imitation and prediction accuracy. These requirements reduce the practical feasibility of such PNA reservoir systems. To address this shortcoming, we present a mixed delay/nondelay embeddings-based PNA reservoir system. Our system uses a single PNA reservoir node with the ability to obtain a mixture of delay/nondelay embeddings of the dynamical information of the time-series data applied at the input of a single PNA reservoir node. Our analysis shows that when these mixed delay/nondelay embeddings are used to train a perceptron at the output layer, our reservoir system outperforms existing PNA-based reservoir systems for the imitation of NARMA 2, NARMA 5, NARMA 7, and NARMA 10 time series data, and for the short-term and long-term prediction of the Mackey Glass time series data.

Ti, Changpeng↗

A Suppression-based STDP Rule Resilient to Jitter Noise in Spike Patterns for Neuromorphic Computing

Multi-spike models of synaptic plasticity, such as the triplet and suppression spike-timing-dependent plasticity (STDP) rules, exhibit better alignment with neurophysiological data in the brain compared to the pair-based STDP rule. Previous studies have empirically shown that the pair-based STDP rule can detect spatiotemporal spike patterns hidden in equally dense distractor spike trains in an unsupervised manner. However, it fails to detect spike patterns influenced by jitter noise. Given that spiking neural networks (SNNs) exhibit variability in generated spike trains in response to the same inputs, it becomes imperative to have learning rules capable of detecting spike patterns even in the presence of jitter noise. In this study, we introduce a simplified suppression-based STDP rule that demonstrates significantly enhanced tolerance to jitter in spike patterns compared to the pair-based STDP rule. Unlike the ideal suppression STDP rule, characterized by an exponential learning window and requiring high-resolution synapses, the simplified rule limits the synaptic efficacy update to a single bit at any given instant. Moreover, it employs 4-bit fixed-point synapses, facilitating straightforward implementation in neuromorphic hardware.

Gautam, Ashish [ORNL]↗

Introduction: Neuromorphic Materials

The explosive growth in data collection and the need to process it efficiently, as well as the desire to automate increasingly complex tasks in transportation, medical care, manufacturing, security and many other fields have motivated a growing interest in neuromorphic computing. Unlike the binary, transistorbased ON/OFF logic gates and separate logic and memory functionalities employed in digital computing, neuromorphic computing is inspired by animal brains that use interconnected synapses and neurons to perform processing, storage and transmission of information at the same location, while only consuming ~20 W or less of power. Motivated by the brain’s efficiency, adaptability, self-learning and resiliency qualities, neuromorphic computing can be broadly defined as an approach to processing and storing information using hardware and algorithms inspired by models of biological neural systems. Present research in neuromorphic computing encompasses approaches that vary significantly in their degree of neuro-inspiration, from systems that only incorporate features such as asynchronous, event-driven operation or use crossbar arrays of non-volatile memory (NVM) elements to accelerate deep neural networks (DNNs), to designs that embrace the extreme parallelism, sparsity, reconfigurability, adaptability, complexity and stochasticity observed in nervous systems. The term ‘neuromorphic’ computing is often credited to Carver Mead, who in the 1980s investigated Si-based analog electronics to replicate functions of the animal retina. Earlier important advances in this field include the work of Frank Rosenblatt, who proposed the concept of the perceptron, Bernard Widrow, who used this concept to build one of the first analog neural networks, the Adaline and many other researchers (see ref. 6 for an historical perspective on neuromorphic computing). With the recent increase in the use of artificial intelligence and large language models, and rising concerns over the associated energy costs, interest in neuromorphic hardware has expanded rapidly. According to some estimates, driven largely by the drastic growth in the training use of artificial intelligence (AI) models using the current computing architectures, the energy cost of computing is projected to reach the energy supply worldwide by 2045. Furthermore, while this is not a realistic outcome, it means that, if more efficient computing technologies are not developed -- soon -- the world will soon become one where demand for energy and market constraints limit the continued increase of societal access to AI and cloud services from data centers. Data centers used for training and use of these models consume hundreds of terawatt hours of electricity, already past 4% of the US electricity demand.

Circuits↗

Ultra-Fast Non-Volatile Resistive Switching Devices with Over 512 Distinct and Stable Levels for Memory and Neuromorphic Computing

Low-current multilevel programmability with inherent non-volatility and high stability of resistance states is required for both multi-bit memory storage and deep learning accelerators but is difficult to achieve. Here, in a resistive switching system, this work realizes >512 (>9 bits) distinct non-volatile conductance levels with stable retention for each state with current levels down to the nanoampere range, highly promising for potential integration with small processing nodes with ultra-low power consumption requirements. This is achieved by demonstrating a new thin film design concept that encompasses three key features: an ultra-thin epitaxial oxygen ionic switching layer that provides a tunable energy barrier at the bottom electrode, an overcoat amorphous layer that acts as an ion migration barrier for stable state retention, and a partial conductive filament as a localized electronic transport channel to the epitaxial switching layer. A large dynamic resistance range of up to seven orders of magnitude is achieved with reset-free transitions among intermediate states, and programmability is demonstrated with ultra-fast (20 ns) pulses. Artificial neural network (ANN) simulations, based on the experimental performance and its non-idealities, demonstrate close-to-ideal inference accuracies for various Modified National Institute of Standards and Technology (MNIST) data sets.

36 MATERIALS SCIENCE↗

Reconfigurable Cascaded Thermal Neuristors for Neuromorphic Computing

While the complementary metal-oxide semiconductor (CMOS) technology is the mainstream for the hardware implementation of neural networks, an alternative route is explored based on a new class of spiking oscillators called “thermal neuristors”, which operate and interact solely via thermal processes. Utilizing the insulator-to-metal transition (IMT) in vanadium dioxide, a wide variety of reconfigurable electrical dynamics mirroring biological neurons is demonstrated. Notably, inhibitory functionality is achieved just in a single oxide device, and cascaded information flow is realized exclusively through thermal interactions. To elucidate the underlying mechanisms of the neuristors, a detailed theoretical model is developed, which accurately reflects the experimental results. In conclusion, this study establishes the foundation for scalable and energy-efficient thermal neural networks, fostering progress in brain-inspired computing.

36 MATERIALS SCIENCE↗

Defect-engineered monolayer MoS 2 with enhanced memristive and synaptic functionality for neuromorphic computing

Two-dimensional transition metal dichalcogenides (TMDs)-based memristors are promising candidates for realizing artificial synapses in next-generation computing. However, practical implementation faces several challenges, such as high non-linearity and asymmetry in synaptic weight updates, limited dynamic range, and cycle-to-cycle variability. Here, utilizing optimal-power argon plasma treatment, we significantly enhance the performance matrix of memristors fabricated from monolayer MoS 2 . Our approach not only improves linearity and symmetry in synaptic weight updates but also increases the number of available synaptic weight updates and enhances Spike-Time Dependent Plasticity. Notably, it broadens the switching ratio by two orders, minimizes cycle-to-cycle variability, reduces non-linear factors, and achieves an energy consumption of ~30 fJ per synaptic event. Implementation of these enhancements is demonstrated through Artificial Neural Network simulations, yielding a learning accuracy of ~97% on the MNIST hand-written digits dataset. Our findings underscore the significance of defect engineering as a powerful tool in advancing the synaptic functionality of memristors.

97 MATHEMATICS AND COMPUTING↗

Device Feasibility Analysis of Multi-level FeFETs for Neuromorphic Computing

As an emerging non-volatile memory device technology, Ferroelectric Field-Effect Transistors (FeFETs) can enable low-power, adaptive intelligent system design. However, device dimension and operating voltage dependent reliability issues of scaled FeFETs can ultimately lead to degraded performance in solving machine learning tasks. In this article, detailed experimental characterization of FeFET devices of different dimensions have been carried out to explicitly evaluate the non-ideal behavior in device conductance programming properties like number of programming states, cycle-to-cycle (C2C) variations, device-to-device (D2D) variations, and state retention. A hardware-aware software simulation approach has been adopted to capture the adversarial effects of the non-idealities on recognition accuracy through algorithm-level performance assessment by including them in NeuroSim, a popular neural network hardware simulator, to execute a neural network model considering all other hardware constraints. With the added non-idealities, significant accuracy degradation has been observed compared to the ideal scenarios where D2D variations play the most critical role. Thereafter, feasibility of a variation-aware training method has been evaluated to tackle the accuracy drop.

42 ENGINEERING↗

Vector-Matrix Multiplication Engine for Neuromorphic Computation with a CBRAM Crossbar Array [Slides]

The core function of many neural network algorithms is the dot product, or vector matrix multiply (VMM) operation. Crossbar arrays utilizing resistive memory elements can reduce computational energy in neural algorithms by up to five orders of magnitude compared to conventional CPUs. Moving data between a processor, SRAM, and DRAM dominates energy consumption. By utilizing analog operations to reduce data movement, resistive memory crossbars can enable processing of large amounts of data at lower energy than conventional memory architectures.

97 MATHEMATICS AND COMPUTING↗