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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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42 records · Page 3

Solar dynamic power module design

Studies have shown that use of solar dynamic (SD) power for the growth eras of the Space Station Freedom program will result in life cycle cost savings when compared to power supplied by photovoltaic sources. In the SD power module, a concentrator collects and focuses solar energy into a heat receiver which has integral thermal energy storage. A power conversion unit (PCU) based on the closed Brayton thermodynamic cycle removes thermal energy from the receiver and converts that energy to electrical energy. Since the closed Brayton cycle is a single phase gas cycle, the conversion hardware (heat exchangers, turbine, compressor, etc.) can be designed for operation in low earth orbit, and tested with confidence in test facilities on earth before launch into space. The concentrator subassemblies will be aligned and the receiver/PCU/radiator combination completely assembled and charged with gas and cooling liquid on earth before launch to, and assembly on orbit.

Space power

On-board Neural Processor Design for an Intelligent Multi-sensor Microspacecraft

A compact VLSI neural processor based on the Optimization Cellular Neural Network (OCNN)has been under development to provide a wide range of support for an intelligent remote sensing microspacecraft which requires both high bandwidth communication and high-performance computing for on-board data analysis, thematic data reduction, synergy of multiple types of sensors, and other smart-sensor functions. The OCNN architecture is a programmable multi-dimensional array of neurons which are locally connected with their local neurons. The OCNN operation theory, architecture, design and implementation, prototype chip, and system applications have been investigated in detail and presented in this paper.

array

Interpreter composition issues in the formal verification of a processor-memory module

This report describes interpreter composition techniques suitable for the formal specification and verification of a processor-memory module using the HOL theorem proving system. The processor-memory module is a multichip subsystem within a fault-tolerant embedded system under development within the Boeing Defense and Space Group. Modeling and verification methods were developed that permit provably secure composition at the transaction-level of specification, significantly reducing the complexity of the hierarchical verification of the system.

Fura, David A.