Decoding binary block codes on Q-ary output channels
Error correcting binary block code decoding on Q-ary output channels /weighted erasure decoding/, considering applications
Weldon, E. J., Jr.↗
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Erasure declaring Viterbi decoders
Several methods for realizing erasure declaring Viterbi decoders for the (7,1/2) NASA code are discussed. Only bit oriented algorithms are considered. When such decoders are used in a concatenated system with a (255,223) Reed-Solomon decoder, improvements on the probability of word error of at most 0.1 dB were obtained.
Pollara, F.↗
Erasure information for a Reed-Solomon decoder
Many Reed-Solomon decoders, including the one decoding the outer code for Voyager data from Uranus, assume that all symbols have the same chance of being correct or incorrect. Insome cases, like in a burst of incorrect symbols, this is not the case, and a Reed-Solomon decoder could make use of this. The use of information about bit quality sent to the Reed-Solomon from an (inner) Viterbi decoder is examined, as well as information about the error status of adjacent symbols in decoding interleaved Reed-Solomon encoded symbols. It is discovered that, in a region of interest, only about 0.04 dB can gained.
Pitt, G. H., III↗
Performance analysis of a cascaded coding scheme with interleaved outer code
A cascaded coding scheme for a random error channel with a bit-error rate is analyzed. In this scheme, the inner code C sub 1 is an (n sub 1, m sub 1l) binary linear block code which is designed for simultaneous error correction and detection. The outer code C sub 2 is a linear block code with symbols from the Galois field GF (2 sup l) which is designed for correcting both symbol errors and erasures, and is interleaved with a degree m sub 1. A procedure for computing the probability of a correct decoding is presented and an upper bound on the probability of a decoding error is derived. The bound provides much better results than the previous bound for a cascaded coding scheme with an interleaved outer code. Example schemes with inner codes ranging from high rates to very low rates are evaluated. Several schemes provide extremely high reliability even for very high bit-error rates say 10 to the -1 to 10 to the -2 power.
Lin, S.↗
Constructing LDPC Codes from Loop-Free Encoding Modules
A method of constructing certain low-density parity-check (LDPC) codes by use of relatively simple loop-free coding modules has been developed. The subclasses of LDPC codes to which the method applies includes accumulate-repeat-accumulate (ARA) codes, accumulate-repeat-check-accumulate codes, and the codes described in Accumulate-Repeat-Accumulate-Accumulate Codes (NPO-41305), NASA Tech Briefs, Vol. 31, No. 9 (September 2007), page 90. All of the affected codes can be characterized as serial/parallel (hybrid) concatenations of such relatively simple modules as accumulators, repetition codes, differentiators, and punctured single-parity check codes. These are error-correcting codes suitable for use in a variety of wireless data-communication systems that include noisy channels. These codes can also be characterized as hybrid turbolike codes that have projected graph or protograph representations (for example see figure); these characteristics make it possible to design high-speed iterative decoders that utilize belief-propagation algorithms. The present method comprises two related submethods for constructing LDPC codes from simple loop-free modules with circulant permutations. The first submethod is an iterative encoding method based on the erasure-decoding algorithm. The computations required by this method are well organized because they involve a parity-check matrix having a block-circulant structure. The second submethod involves the use of block-circulant generator matrices. The encoders of this method are very similar to those of recursive convolutional codes. Some encoders according to this second submethod have been implemented in a small field-programmable gate array that operates at a speed of 100 megasymbols per second. By use of density evolution (a computational- simulation technique for analyzing performances of LDPC codes), it has been shown through some examples that as the block size goes to infinity, low iterative decoding thresholds close to channel capacity limits can be achieved for the codes of the type in question having low maximum variable node degrees. The decoding thresholds in these examples are lower than those of the best-known unstructured irregular LDPC codes constrained to have the same maximum node degrees. Furthermore, the present method enables the construction of codes of any desired rate with thresholds that stay uniformly close to their respective channel capacity thresholds.
Divsalar, Dariush↗
Single-Chip VLSI Reed-Solomon Decoder
Efficient utilization of computing elements reduces size while preserving throughput. VLSI architecture is pipeline Reed-Solomon decoder for correction of errors and erasures. Uses transform circuit to compute syndrome polynomial. Erasure information enters decoder as binary sequence. Applied to variety of digital communications involving error-correcting RS codes.
Shao, Howard M.↗
A (72, 36; 15) box code
A (72,36;15) box code is constructed as a 9 x 8 matrix whose columns add to form an extended BCH-Hamming (8,4;4) code and whose rows sum to odd or even parity. The newly constructed code, due to its matrix form, is easily decodable for all seven-error and many eight-error patterns. The code comes from a slight modification in the parity (eighth) dimension of the Reed-Solomon (8,4;5) code over GF(512). Error correction uses the row sum parity information to detect errors, which then become erasures in a Reed-Solomon correction algorithm.
Solomon, G.↗
Capacity, cutoff rate, and coding for a direct-detection optical channel
It is shown that Pierce's pulse position modulation scheme with 2 to the L pulse positions used on a self-noise-limited direct detection optical communication channel results in a 2 to the L-ary erasure channel that is equivalent to the parallel combination of L completely correlated binary erasure channels. The capacity of the full channel is the sum of the capacities of the component channels, but the cutoff rate of the full channel is shown to be much smaller than the sum of the cutoff rates. An interpretation of the cutoff rate is given that suggests a complexity advantage in coding separately on the component channels. It is shown that if short-constraint-length convolutional codes with Viterbi decoders are used on the component channels, then the performance and complexity compare favorably with the Reed-Solomon coding system proposed by McEliece for the full channel. The reasons for this unexpectedly fine performance by the convolutional code system are explored in detail, as are various facets of the channel structure.
Massey, J. L.↗
Capacity, cutoff rate, and coding for a direct-detection optical channel
It is shown that when Pierce's pulse-position modulation scheme with 2 to the L power positions (where L is some positive integer) is used on a self-noise-limited direct-detection optical communication channel, there results a (2 to the L power)-ary erasure channel that is equivalent to the parallel combination of L completely correlated binary erasure channels. The capacity of the full channel is the sum of the capacities of the component channels, but the cutoff rate of the full channel is shown to be much smaller than the sum of the cutoff rates. An interpretation of the cutoff rate is given that suggests a complexity advantage in coding separately on the component channels. It is shown that if short-constraint length convolutional codes with Viterbi decoders are used on the component channels, then the performance and complexity compare favorably with the Reed-Solomon coding system proposed by McEliece (1979) for the full channel. The reasons for this unexpectedly fine performance by the convolutional code system are explored in detail, as are various facets of the channel structure.
Massey, J. L.↗
A comparison of VLSI architectures for time and transform domain decoding of Reed-Solomon codes
It is well known that the Euclidean algorithm or its equivalent, continued fractions, can be used to find the error locator polynomial needed to decode a Reed-Solomon (RS) code. It is shown that this algorithm can be used for both time and transform domain decoding by replacing its initial conditions with the Forney syndromes and the erasure locator polynomial. By this means both the errata locator polynomial and the errate evaluator polynomial can be obtained with the Euclidean algorithm. With these ideas, both time and transform domain Reed-Solomon decoders for correcting errors and erasures are simplified and compared. As a consequence, the architectures of Reed-Solomon decoders for correcting both errors and erasures can be made more modular, regular, simple, and naturally suitable for VLSI implementation.
Hsu, I. S.↗
Coding for a multiple-access channel
In a simple multiple-access communication system, two geographically separated users attempt to communicate binary data to two data sinks over a common channel called a multiple access channel. User one sends codewords from a block code C sub one, while user two sends codewords from a block code C sub two. The two users occupy the same frequency slot, transmit at the same time, and use the same type of modulation. Block codes which are uniquely decodable and capable of correcting errors are constructed for two multiple-access channel models. The first model is referred to as a noiseless multiple-access binary erasure channel. If the two transmitted bits from the two users are zeros, a zero is transmitted over the channel to the receiver; if the two transmitted bits are ones, a one is transmitted to the receiver; if the two bits are different, an erasure symbol is transmitted to the receiver. The second model is also a multiple-access binary erasure channel but with noise introduced.
Kasami, T.↗
Burst decoding of binary block codes on Q-ary output channels.
The burst-b distance between two binary vectors is defined and shown to be a metric. This definition is applied to a binary-input, Q-ary output channel where errors occur in bursts. A decoding algorithm is presented for such a channel that is an extension of Weldon's (1971) weighted erasure decoding. Examples are presented illustrating the techniques.
Wainberg, S.↗
A new VLSI architecture for a single-chip-type Reed-Solomon decoder
A new very large scale integration (VLSI) architecture for implementing Reed-Solomon (RS) decoders that can correct both errors and erasures is described. This new architecture implements a Reed-Solomon decoder by using replication of a single VLSI chip. It is anticipated that this single chip type RS decoder approach will save substantial development and production costs. It is estimated that reduction in cost by a factor of four is possible with this new architecture. Furthermore, this Reed-Solomon decoder is programmable between 8 bit and 10 bit symbol sizes. Therefore, both an 8 bit Consultative Committee for Space Data Systems (CCSDS) RS decoder and a 10 bit decoder are obtained at the same time, and when concatenated with a (15,1/6) Viterbi decoder, provide an additional 2.1-dB coding gain.
Hsu, I. S.↗