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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 55 records · Page 3
All sourcesNASA NTRSDOE OSTI
NASA NTRS1991

A systems approach to solder joint fatigue in spacecraft electronic packaging

Differential expansion induced fatigue resulting from temperature cycling is a leading cause of solder joint failures in spacecraft. Achieving high reliability flight hardware requires that each element of the fatigue issue be addressed carefully. This includes defining the complete thermal-cycle environment to be experienced by the hardware, developing electronic packaging concepts that are consistent with the defined environments, and validating the completed designs with a thorough qualification and acceptance test program. This paper describes a useful systems approach to solder fatigue based principally on the fundamental log-strain versus log-cycles-to-failure behavior of fatigue. This fundamental behavior has been useful to integrate diverse ground test and flight operational thermal-cycle environments into a unified electronics design approach. Each element of the approach reflects both the mechanism physics that control solder fatigue, as well as the practical realities of the hardware build, test, delivery, and application cycle.

Ross, R. G., Jr.↗
NASA NTRS2014

Enabling More than Moore: Accelerated Reliability Testing and Risk Analysis for Advanced Electronics Packaging

For five decades, the semiconductor industry has distinguished itself by the rapid pace of improvement in miniaturization of electronics products-Moore's Law. Now, scaling hits a brick wall, a paradigm shift. The industry roadmaps recognized the scaling limitation and project that packaging technologies will meet further miniaturization needs or ak.a "More than Moore". This paper presents packaging technology trends and accelerated reliability testing methods currently being practiced. Then, it presents industry status on key advanced electronic packages, factors affecting accelerated solder joint reliability of area array packages, and IPC/JEDEC/Mil specifications for characterizations of assemblies under accelerated thermal and mechanical loading. Finally, it presents an examples demonstrating how Accelerated Testing and Analysis have been effectively employed in the development of complex spacecraft thereby reducing risk. Quantitative assessments necessarily involve the mathematics of probability and statistics. In addition, accelerated tests need to be designed which consider the desired risk posture and schedule for particular project. Such assessments relieve risks without imposing additional costs. and constraints that are not value added for a particular mission. Furthermore, in the course of development of complex systems, variances and defects will inevitably present themselves and require a decision concerning their disposition, necessitating quantitative assessments. In summary, this paper presents a comprehensive view point, from technology to systems, including the benefits and impact of accelerated testing in offsetting risk.

Ghaffarian, Reza↗
NASA NTRS2012

Alumina Based 500 C Electronic Packaging Systems and Future Development

NASA space and aeronautical missions for probing the inner solar planets as well as for in situ monitoring and control of next-generation aeronautical engines require high-temperature environment operable sensors and electronics. A 96% aluminum oxide and Au thick-film metallization based packaging system including chip-level packages, printed circuit board, and edge-connector is in development for high temperature SiC electronics. An electronic packaging system based on this material system was successfully tested and demonstrated with SiC electronics at 500 C for over 10,000 hours in laboratory conditions previously. In addition to the tests in laboratory environments, this packaging system has more recently been tested with a SiC junction field effect transistor (JFET) on low earth orbit through the NASA Materials on the International Space Station Experiment 7 (MISSE7). A SiC JFET with a packaging system composed of a 96% alumina chip-level package and an alumina printed circuit board mounted on a data acquisition circuit board was launched as a part of the MISSE7 suite to International Space Station via a Shuttle mission and tested on the orbit for eighteen months. A summary of results of tests in both laboratory and space environments will be presented. The future development of alumina based high temperature packaging using co-fired material systems for improved performance at high temperature and more feasible mass production will also be discussed.

Chen, Liang-Yu↗
NASA NTRS2016

500 C Electronic Packaging and Dielectric Materials for High Temperature Applications

High-temperature environment operable sensors and electronics are required for exploring the inner solar planets and distributed control of next generation aeronautical engines. Various silicon carbide (SiC) high temperature sensors, actuators, and electronics have been demonstrated at and above 500C. A compatible packaging system is essential for long-term testing and application of high temperature electronics and sensors. High temperature passive components are also necessary for high temperature electronic systems. This talk will discuss ceramic packaging systems developed for high temperature electronics, and related testing results of SiC circuits at 500C and silicon-on-insulator (SOI) integrated circuits at temperatures beyond commercial limit facilitated by these high temperature packaging technologies. Dielectric materials for high temperature multilayers capacitors will also be discussed. High-temperature environment operable sensors and electronics are required for probing the inner solar planets and distributed control of next generation aeronautical engines. Various silicon carbide (SiC) high temperature sensors, actuators, and electronics have been demonstrated at and above 500C. A compatible packaging system is essential for long-term testing and eventual applications of high temperature electronics and sensors. High temperature passive components are also necessary for high temperature electronic systems. This talk will discuss ceramic packaging systems developed for high electronics and related testing results of SiC circuits at 500C and silicon-on-insulator (SOI) integrated circuits at temperatures beyond commercial limit facilitated by high temperature packaging technologies. Dielectric materials for high temperature multilayers capacitors will also be discussed.

dielectric performance↗
NASA NTRS1971

High density electronic packaging module with improved cooling assembly

Cold plate increases heat transfer within high density electronic module. Tapered pins improve heat transfer process by providing larger surface pressure with increased planar area. Cooling technique increases thermal contact where planar area is limited, interface pressure increases the heat transfer coefficient.

Martin, J. H.↗
NASA NTRS1994

High Frequency Electronic Packaging Technology

Commercial and government communication, radar, and information systems face the challenge of cost and mass reduction via the application of advanced packaging technology. A majority of both government and industry support has been focused on low frequency digital electronics.

high frequency packaging commercial Materials Scie↗
NASA NTRS2015

Book of Knowledge (BOK) for NASA Electronic Packaging Roadmap

The objective of this document is to update the NASA roadmap on packaging technologies (initially released in 2007) and to present the current trends toward further reducing size and increasing functionality. Due to the breadth of work being performed in the area of microelectronics packaging, this report presents only a number of key packaging technologies detailed in three industry roadmaps for conventional microelectronics and a more recently introduced roadmap for organic and printed electronics applications. The topics for each category were down-selected by reviewing the 2012 reports of the International Technology Roadmap for Semiconductor (ITRS), the 2013 roadmap reports of the International Electronics Manufacturing Initiative (iNEMI), the 2013 roadmap of association connecting electronics industry (IPC), the Organic Printed Electronics Association (OE-A). The report also summarizes the results of numerous articles and websites specifically discussing the trends in microelectronics packaging technologies.

Ghaffarian, Reza↗
NASA NTRS2004

Electronic packaging for extended Mars surface missions

Extended Mars missions will require vehicles to survive a large number of extended temperature cycles. To address this issue for electronics, previous strategies have been to locate critical electronics in a "warm electronics box" where thermal management is more easily maintained. However, that strategy limits the number and location of electronics. An alternative strategy allows electronics to be remotely located on actuator and wheel arms with no heating which has the advantage of distributed control.

Mojarradi, Mohammad M.↗
NASA NTRS1995

(abstract) Designing for Small Volume Assembly of Advanced Electronics Packages

There is a need for high reliability surface mount assembly processes for aerospace, military, and medical applications. This approach for improving design for producibility and reliability of electronic system assembly processes can be utilized as a starting framework. Described herein is a general methodology to Design for Producibility and Reliability (DFPAR) for very small volume production runs.

assembly processes↗
NASA NTRS2012

Robust, Rework-able Thermal Electronic Packaging: Applications in High Power TR Modules for Space

The higher output power densities required of modern radar architectures, such as the proposed DESDynI [Deformation, Ecosystem Structure, and Dynamics of Ice] SAR [Synthetic Aperture Radar] Instrument (or DSI) require increasingly dense high power electronics. To enable these higher power densities, while maintaining or even improving hardware reliability, requires improvements in integrating advanced thermal packaging technologies into radar transmit/receive (TR) modules. New materials and techniques have been studied and are now being implemented side-by-side with more standard technology typically used in flight hardware.

Hoffman, James Patrick↗
DOE OSTI2026

Enhancing 300 Degree Celsius Electronic Packaging with Ceramic PCBs and Advanced Interconnection Techniques

Geothermal energy development requires downhole tools that operate reliably at temperatures up to 320 °C. While MWD tools work without thermal protection and logging tools use vacuum flasks for limited high-temperature use, Sandia National Laboratories is developing durable electronics on ceramic PCBs with protective coatings to enable long-term operation of geothermal instruments at sustained temperatures up to 300 °C.

Wright, Andrew Alexander [Sandia National Laborato↗
NASA NTRS2013

Actuator and electronics packaging for extrinsic humanoid hand

The lower arm assembly for a humanoid robot includes an arm support having a first side and a second side, a plurality of wrist actuators mounted to the first side of the arm support, a plurality of finger actuators mounted to the second side of the arm support and a plurality of electronics also located on the first side of the arm support.

Ihrke, Chris A.↗
NASA NTRS1995

Designing for Small Volume Assembly of Advanced Electronics Packages

We describe a general methodology to Design for Producibility and Reliability (DFPAR) for very small volume production runs. In cases where the entire volume for fabrication is less than five products, traditional Statistical Process Control (SPC) is inadequate due to reliance on statistics of much larger volumes and the Central Limit Theorem. Data acquisition for process parameter estimation from such a small sample size is difficult; however, it is critical to producing high reliability product.

Central Limit Theorem statistics high reliability ↗