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Electronic memory system of 32-bit words corrects bit errors caused by some common type of failures - even failure of entire 4-bit-wide random-access-memory (RAM) chip. Detects failure of two such chips, so user warned that ouput of memory may contain errors. Includes eight 4-bit-wide DRAM's configured so each bit of each DRAM assigned to different one of four parallel 8-bit words. Each DRAM contributes only 1 bit to each 8-bit word.
Running on a treadmill with bungee-cord resistance is currently used on the Russian space station MIR as a countermeasure for the loss of bone and muscular strength which occurs during spaceflight. However, it is unknown whether ground reaction force (GRF) at the feet using bungee-cord resistance is similar to that which occurs during upright walking and running on Earth. We hypothesized-that the DRAMs generated during upright walking and running are greater than the DRAMs generated during supine bungee-cord gait. Eleven healthy subjects walked (4.8 +/- 0.13 km/h, mean +/- SE) and ran (9.1 +/- 0.51 km/h) during upright and supine bungee-cord exercise on an active treadmill. Subjects exercised for 3 min in each condition using a resistance of 1 body weight calibrated during an initial, stationary standing position. Data were sampled at a frequency of 500Hz and the mean of 3 trials was analyzed for each condition. A repeated measures analysis of variance tested significance between the conditions. Peak DRAMs during upright walking were significantly greater (1084.9 +/- 111.4 N) than during supine bungee-cord walking (770.3 +/- 59.8 N; p less than 0.05). Peak GRFs were also significantly greater for upright running (1548.3 +/- 135.4 N) than for supine bungee-cord running (1099.5 +/- 158.46 N). Analysis of GRF curves indicated that forces decreased throughout the stance phase for bungee-cord gait but not during upright gait. These results indicate that bungee-cord exercise may not create sufficient loads at the feet to counteract the loss of bone and muscular strength that occurs during long-duration exposure to microgravity.
NASA’s Dragonfly mission is a rotorcraft lander which will explore several geologic locations on Saturn’s moon, Titan and investigate evidence of surface-level prebiotic chemistry as well as search for chemical signatures of water-based and/or hydrocarbon-based life. To perform molecular composition investigations in-situ, the payload includes the Dragonfly Mass Spectrometer (DraMS), being developed at NASA’s Goddard Space Flight Center (GSFC). DraMS will utilize laser desorption mass spectrometry (LDMS) to interrogate surface samples and measure the organic composition. Enabling this science capability is the Throttled Hydrocarbon Analysis by Nanosecond Optical Source (THANOS) laser being developed at NASA-GSFC. The THANOS laser is comprised of a solid state, passively Q-Switched Nd:YAG oscillator which is frequency converted to 266 nm and utilizes a RTP high voltage electro-optic for pulse energy control. The laser outputs <2.0 ns pulses with a maximum energy of approximately 200 uJ which can be emitted in 1 - 50 shot bursts at 100 Hz while performing LDMS science operations. While operating, the laser has the capability to throttle its UV pulse energy output from full attenuation to maximum energy to provide varying levels of fluence on samples in the DraMS instrument. This paper reports the technology development and space qualification effort of the THANOS laser including vibration, thermal vacuum cycling, radiation as well as Titan atmospheric composition optical damage testing performed at NASA-GSFC from 2019 through 2022.
This paper reports on hard errors induced by single ions in dynamic memories. For ions with atomic number below 80, hard errors in DRAMs appear to be similar to the hard errors reported in previous work on SRAMs. One feature of these hard errors is that they tend to recover gradually with time, because of annealing, and are thus partially recoverable. However, for gold ions, a second type of hard error was discovered which is not recoverable, and appears to be due to catastrophic internal shorting rather than small changes in leakage current. Thus, nonrecoverable errors will likely occur even in devices which eliminate the extreme sensitivity to leakage current that is inherent in 4-T SRAMs and DRAMs. It is important to understand the mechanism that is responsible for nonrecoverable errors, and investigate the effect of device scaling.
Here, in this work, we present a variation-tolerant and energy-efficient charge-domain Ferroelectric FET (FeFET) based Compute-in-Memory (CiM) array design that is compatible with both binary and multi-level cell memory sensing. We demonstrate that: 1) by exploiting FeFET as a nonvolatile switch, its high ON/OFF ratio in the subthreshold region can suppress the error introduced by the inaccurate ON state conductance, thus realizing robust CiM operations, unlike the current-domain CiM design where the computation results is highly sensitive to the device conductance variation; 2) by leveraging a dense dynamic random access memory (DRAM)-like 1FeFET1C cell structure, the proposed design benefits from the existing high density DRAM establishment while also significantly relaxing the capacitor retention and transistor leakage requirement; 3) the charge-domain CiM supports both binary FeFET with minimum overhead and MLC FeFET with tolerable latency for MLC state sensing, whose efficacy is validated experimentally on both cell-level and array-level; 4) the proposed CiM shows much better device variation resilience than conventional current-domain CiM, and also improves inference accuracy. Macro-level evaluation results demonstrate significantly higher energy efficiency and area efficiency compared to prior CiM works.
A graph is an excellent way of representing relationships among entities. We can use graph analytics to synthesize and analyze such relational data, and extract relevant features that are useful for various tasks such as machine learning. Considering the crucial role of graph analytics in various domains, it is important and timely to investigate the right hardware configurations that can achieve optimal performance for graph workloads on future high-performance computing systems. Design space exploration studies facilitate the selection of appropriate configurations (e.g. memory) to achieve a desired system performance. Recently, the approach of accelerating graph analytics using persistent non-volatile memory has gained a lot of attention. Traditional system simulators such as Gem5 and NVMain can be used to explore the design space of these advanced memory architectures for graph workloads. However, these simulators are slow in execution thus limiting the efficiency of design space exploration studies. To overcome this challenge, we proposed a machine learning based approach to co-design advanced memory architectures for graph workloads. We tested our approach with DRAM, non-volatile memory, and hybrid memory (DRAM+NVM) using a breadth first search benchmark algorithm. Our results showed the applicability of the proposed machine learning based approach to the co-design of the advanced memory architectures. In this paper, we provide recommendations on selecting advanced memory architectures to achieve desired performance for graph workloads. We also discuss the performances of different machine learning models that were considered in this study.
This report describes the architecture and instruction set of the Rutgers CAM2000 memory chip. The CAM2000 combines features of Associative Processing (AP), Content Addressable Memory (CAM), and Dynamic Random Access Memory (DRAM) in a single chip package that is not only DRAM compatible but capable of applying simple massively parallel operations to memory. This document reflects the current status of the CAM2000 architecture and is continually updated to reflect the current state of the architecture and instruction set.
A third antenna was added to the system. It is a terrestrial low-gain feed, to act as a veto for local interference. The 3-chip design for a 4 megapoint complex FFT was reduced to finished working hardware. The 4-Megachannel circuit board contains 36 MByte of DRAM, 5 CPLDs, the three large FFT ASICs, and 74 ICs in all. The Austek FDP-based Spectrometer/Power Accumulator (SPA) has now been implemented as a 4-layer printed circuit. A PC interface board has been designed and together with its associated user interface and control software allows an IBM compatible computer to control the SPA board, and facilitates the transfer of spectra to the PC for display, processing, and storage. The Feature Recognizer Array cards receive the stream of modulus words from the 4M FFT cards, and forward a greatly thinned set of reports to the PC's in whose backplane they reside. In particular, a powerful ROM-based state-machine architecture has been adopted, and DRAM has been added to permit integration modes when tracking or reobserving source candidates. The general purpose (GP) array consists of twenty '486 PC class computers, each of which receives and processes the data from a feature extractor/correlator board set. The array performs a first analysis on the provided 'features' and then passes this information on to the workstation. The core workstation software is now written. That is, the communication channels between the user interface, the backend monitor program and the PC's have working software.
Designs of video random-access memory (VRAM) integrated circuits operating under control by external logic circuits simplified according to concept of combining two memory operations performed separately heretofore. Eliminates need for DRAM-refresh timers and counters, reducing amount of circuitry needed to control VRAM thereby reducing time needed to design VRAM. Simplification also reduces time needed to redesign DRAM-refresh logic circuitry when adapting VRAM design to another VRAM for which timing specifications different. Concept can be applied to VRAM clocking data out to display unit continuously.
The evolution of highly miniaturized electronic and mechanical systems will be accompanied by new problems and issues regarding the radiation response of these systems in the space environment. In this paper we discuss some of the more prominent radiation problems brought about by miniaturization. For example, autonomous micro-spacecraft will require large amounts of high density memory, most likely in the form of stacked, multichip modules of DRAM's, that must tolerate the radiation environment. However, advanced DRAM's (16 to 256 Mbit) are quite susceptible to radiation, particularly single event effects, and even exhibit new radiation phenomena that were not a problem for older, less dense memory chips. Another important trend in micro-spacecraft electronics is toward the use of low-voltage microelectronic systems that consume less power. However, the reduction in operating voltage also caries with it an increased susceptibility to radiation. In the case of application specific integrated microcircuits (ASIM's), advanced devices of this type, such as high density field programmable gate arrays (FPGA's) exhibit new single event effects (SEE), such as single particle reprogramming of anti-fuse links. New advanced bipolar circuits have been shown recently to degrade more rapidly in the low dose rate space environment than in the typical laboratory total dose radiation test used to qualify such devices. Thus total dose testing of these parts is no longer an appropriately conservative measure to be used for hardness assurance. We also note that the functionality of micromechanical Si-based devices may be altered due to the radiation-induced deposition of charge in the oxide passivation layers.
A process, voltage, and temperature (PVT) compensation circuit and a method of continuously generating a delay measure are provided. The compensation circuit includes two delay lines, each delay line providing a delay output. The two delay lines may each include a number of delay elements, which in turn may include one or more current-starved inverters. The number of delay lines may differ between the two delay lines. The delay outputs are provided to a combining circuit that determines an offset pulse based on the two delay outputs and then averages the voltage of the offset pulse to determine a delay measure. The delay measure may be one or more currents or voltages indicating an amount of PVT compensation to apply to input or output signals of an application circuit, such as a memory-bus driver, dynamic random access memory (DRAM), a synchronous DRAM, a processor or other clocked circuit.
Dragonfly is a planned rotorcraft mission that NASA/APL will be sending to Saturn’s moon Titan to study its chemistry. The Dragonfly Mass Spectrometer (DraMS) is a mass spectrometer that is being developed to identify different kinds of organic material that comprises Titan’s surface. The Cryogenic engineering team on DraMS is developing and interface between the room temperature rotorcraft body and the near-cryogenic temperatures of an onboard sample chamber, while minimizing the thermal leak to the Titan environment. As part of design process, the Cryogenic team has built a conductivity test rig for testing the thermophysical properties of candidate insulators, which includes Rohacell 31HF and hollowed 3D printed PEEK structures, at simulated Titan environmental conditions.
Icy celestial bodies are an exciting new frontier for surface exploration and in-situ sampling and analysis. These destinations are inherently cryogenic in nature, and each body presents unique challenges related to thermal design. The Dragonfly mission to Titan is one such example. One of the most important requirements of a sampling system is to preserve the integrity of the surface material. The interface between the Dragonfly Mass Spectrometer (DraMS) and the Drill for Acquisition of Complex Organics (DrACO) is complicated by several competing requirements. Development of this interface has required the use of new enabling technologies such as 3D printing to achieve a successful design. This overview of the DraMS Cryogenic subsystem will show how the design meets all the requirements of the interface and preserves integrity of Titan surface samples.
Recent advances in integrated photonics enable the implementation of reconfigurable, high-bandwidth, and low energy-per-bit interconnects in next-generation data centers. We propose and evaluate an Optically Connected Memory (OCM) architecture that disaggregates the main memory from the computation nodes in data centers. OCM is based on micro-ring resonators (MRRs), and it does not require any modification to the DRAM memory modules. We calculate energy consumption from real photonic devices and integrate them into a system simulator to evaluate performance. Here, our results show that (1) OCM is capable of interconnecting four DDR4 memory channels to a computing node using two fibers with 1.02 pJ energy-per-bit consumption and (2) OCM performs up to 5.5× faster than a disaggregated memory with 40G PCIe NIC connectors to computing nodes.
Among future space missions, national aeronautics and space administration (NASA) selected two of them to analyze the diversity in organic content within Martian and Titan soil samples using a gas chromatograph – mass spectrometer (GC–MS) instrument. The Dragonfly space mission is planned to be launched in 2027 to Titan's surface and explore the Shangri-La surface region for years. One of the main goals of this mission is to understand the past and actual abundant prebiotic chemistry on Titan, which is not well characterized yet. The ExoMars space mission is planned to be launched in 2028 to Mars’ surface and explore the Oxia Planum and Mawrth Vallis region for years. The main objectives focus on the exploration of the subsurface soil samples, potentially richer in organics, that might be relevant for the search of past life traces on Mars where irradiation does not impact the matrices and organics. One recently used sample pre-treatment for gas chromatography – mass spectrometry analysis is planned on both space missions to detect refractory organic molecules of interest for astrobiology. This pre-treatment is called derivatization and uses a chemical reagent – called dimethylformamide dimethyl acetal (DMF-DMA) – to sublimate organic compounds keeping them safe from thermal degradation and conserving the chirality of the molecules extracted from Titan or Mars’ matrices. Indeed, the detection of building blocks of life or enantiomeric excess of some organics (e.g. amino acids) after DMF-DMA pre-treatment and GC–MS analyses would be both bioindicators. The main results highlighted by our work on DMF-DMA and Tenax®TA interaction and efficiency to detect organic compounds at ppb levels in a fast and single preparation are first that Tenax®TA did not show the onset of degradation until after 150 experiments – a 120 h at 300 °C experiment – which greatly exceeds the experimental lifetimes for the DraMS and GC-space in situ investigations. Tenax®TA polymer and DMF-DMA produce many by-products (about 70 and 46, respectively, depending on the activation temperature). Further, the interaction between the two leads to the production of 22 additional by-products from DMF-DMA degradation, but these listed by-products do not prevent the detection of trace-level organic molecules after their efficient derivatization and volatilization by DMF-DMA in the oven ahead the GC–MS trap and column.
Viruses infect, reprogram and kill microbes, leading to profound ecosystem consequences, from elemental cycling in oceans and soils to microbiome-modulated diseases in plants and animals. Although metagenomic datasets are increasingly available, identifying viruses in them is challenging due to poor representation and annotation of viral sequences in databases. Here, we establish efam, an expanded collection of Hidden Markov Model (HMM) profiles that represent viral protein families conservatively identified from the Global Ocean Virome 2.0 dataset. This resulted in 240 311 HMM profiles, each with at least 2 protein sequences, making efam >7-fold larger than the next largest, pan-ecosystem viral HMM profile database. Adjusting the criteria for viral contig confidence from ‘conservative’ to ‘eXtremely Conservative’ resulted in 37 841 HMM profiles in our efam-XC database. To assess the value of this resource, we integrated efam-XC into VirSorter viral discovery software to discover viruses from less-studied, ecologically distinct oxygen minimum zone (OMZ) marine habitats. This expanded database led to an increase in viruses recovered from every tested OMZ virome by ~24% on average (up to ~42%) and especially improved the recovery of often-missed shorter contigs (<5 kb). Additionally, to help elucidate lesser-known viral protein functions, we annotated the profiles using multiple databases from the DRAM pipeline and virion-associated metaproteomic data, which doubled the number of annotations obtainable by standard, single-database annotation approaches. Together, these marine resources (efam and efam-XC) are provided as searchable, compressed HMM databases that will be updated bi-annually to help maximize viral sequence discovery and study from any ecosystem.
Processing-in-Memory (PIM) is emerging as a practical path to overcome the limitations of traditional von Neumann architectures. At its core, PIM systems implement computing primitives such as logic operations and multiply-accumulate acceleration through compute-in-memory, near-memory processing, or hybrid designs. The role of memory cells varies widely across technologies, acting as inputs, outputs, or analog accumulators through bit-lines and sense amplifiers. This diversity creates trade-offs in precision, bandwidth, latency, and programmability, making it difficult to build a unified understanding on the progress of the field. In this survey, we organize recent advances of PIM into three areas. First, we discuss the progress on the architectural optimizations of PIM and its integration with both DRAM and emerging non-volatile memories. Second, we examine how PIM is being used to accelerate key computing domains, including generative AI workloads and high-performance kernels, along with new approaches. Third, we highlight the growing adoption of PIM in computational sciences, where it is being applied to solve interdisciplinary problems such as genome analysis, mRNA quantification, mass spectrometry, quantum circuit simulation, wave modeling, and secure computation. Finally, we synthesize the major challenges that continue to slow PIM adoption, including manufacturing constraints, power delivery, thermal reliability, data consistency, runtime and memory-management coordination, and the difficulty of building portable software abstractions without sacrificing commercial viability. This work provides an updated, structured perspective on PIM’s potential across computing and computational sciences and the barriers that must be solved for it to reach its full impact.
Training in Deep learning (DL) remains highly compute- and data-intensive, with I/O becoming a critical bottleneck as models and datasets scale. Recent studies report that data loading can dominate training time, especially on large-scale HPC systems with shared parallel file systems (PFS). Existing caching approaches either rely on single-tier designs or require intrusive modifications to training pipelines, limiting their portability and effectiveness. In this work, we present FitCache, a transparent drop-in framework for multi-tier caching to accelerate distributed DL training by coordinating fast local memory (e.g., DRAM, Persistent Memory (PMem)) and NVMe as hierarchical caches atop PFS. Our design adapts to hardware diversity, i.e., if NVMe is missing, memory transparently acts as a caching tier, ensuring stable performance. FitCache transparently intercepts I/O requests and issues concurrent fetches across all tiers, returning data from the fastest responder without centralized metadata or static redirection paths. FitCache adapts to dynamic workloads and heterogeneous clusters while maintaining POSIX compatibility. Experiments on Frontier (2048 GPUs) and smaller research clusters show that FitCache reduces training time by up to 40% and per-batch I/O latency by up to 71.6% compared to Lustre Orion PFS, offering a drop-in solution for scalable DL training.