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All sourcesNASA NTRSDOE OSTI
NASA NTRS1987

IRAC test report. Gallium doped silicon band 2: Read noise and dark current

A direct readout infrared detector array, a candidate for the Space Infrared Telescope Facility (SIRTF) Infrared Array Camera (IRAC), has been tested. The array has a detector surface of gallium doped silicon, bump bonded to a 58x62 pixel MOSFET multiplexer on a separate chip. Although this chip and system do not meet all the SIRTF requirements, the critically important read noise is within a factor of 3 of the requirement. Significant accomplishments of this study include: (1) development of a low noise correlated double sampling readout system with a readout noise of 127 to 164 electrons (based on the detector integrator capacitance of 0.1 pF); (2) measurement of the readout noise of the detector itself, ranging from 123 to 214 electrons with bias only (best to worst pixel), and 256 to 424 electrons with full clocking in normal operation at 5.4 K where dark current is small. Thirty percent smaller read noises are obtained at a temperature of 15K; (3) measurement of the detector response versus integration time, showing significant nonlinear behavior for large signals, well below the saturation level; and (4) development of a custom computer interface and suitable software for collection, analysis and display of data.

Lamb, Gerald↗
NASA NTRS1991

Gallium arsenide quantum well-based far infrared array radiometric imager

We have built an array-based camera (FIRARI) for thermal imaging (lambda = 8 to 12 microns). FIRARI uses a square format 128 by 128 element array of aluminum gallium arsenide quantum well detectors that are indium bump bonded to a high capacity silicon multiplexer. The quantum well detectors offer good responsivity along with high response and noise uniformity, resulting in excellent thermal images without compensation for variation in pixel response. A noise equivalent temperature difference of 0.02 K at a scene temperature of 290 K was achieved with the array operating at 60 K. FIRARI demonstrated that AlGaAS quantum well detector technology can provide large format arrays with performance superior to mercury cadmium telluride at far less cost.

Forrest, Kathrine A.↗
NASA NTRS2005

Hybrid UV Imager Containing Face-Up AlGaN/GaN Photodiodes

A proposed hybrid ultraviolet (UV) image sensor would comprise a planar membrane array of face-up AlGaN/GaN photodiodes integrated with a complementary metal oxide/semiconductor (CMOS) readout-circuit chip. Each pixel in the hybrid image sensor would contain a UV photodiode on the AlGaN/GaN membrane, metal oxide/semiconductor field-effect transistor (MOSFET) readout circuitry on the CMOS chip underneath the photodiode, and a metal via connection between the photodiode and the readout circuitry (see figure). The proposed sensor design would offer all the advantages of comparable prior CMOS active-pixel sensors and AlGaN UV detectors while overcoming some of the limitations of prior (AlGaN/sapphire)/CMOS hybrid image sensors that have been designed and fabricated according to the methodology of flip-chip integration. AlGaN is a nearly ideal UV-detector material because its bandgap is wide and adjustable and it offers the potential to attain extremely low dark current. Integration of AlGaN with CMOS is necessary because at present there are no practical means of realizing readout circuitry in the AlGaN/GaN material system, whereas the means of realizing readout circuitry in CMOS are well established. In one variant of the flip-chip approach to integration, an AlGaN chip on a sapphire substrate is inverted (flipped) and then bump-bonded to a CMOS readout circuit chip; this variant results in poor quantum efficiency. In another variant of the flip-chip approach, an AlGaN chip on a crystalline AlN substrate would be bonded to a CMOS readout circuit chip; this variant is expected to result in narrow spectral response, which would be undesirable in many applications. Two other major disadvantages of flip-chip integration are large pixel size (a consequence of the need to devote sufficient area to each bump bond) and severe restriction on the photodetector structure. The membrane array of AlGaN/GaN photodiodes and the CMOS readout circuit for the proposed image sensor would be fabricated separately.

Zheng, Xinyu↗
NASA NTRS2009

Silicon Wafer-Scale Substrate for Microshutters and Detector Arrays

The silicon substrate carrier was created so that a large-area array (in this case 62,000+ elements of a microshutter array) and a variety of discrete passive and active devices could be mounted on a single board, similar to a printed circuit board. However, the density and number of interconnects far exceeds the capabilities of printed circuit board technology. To overcome this hurdle, a method was developed to fabricate this carrier out of silicon and implement silicon integrated circuit (IC) technology. This method achieves a large number of high-density metal interconnects; a 100-percent yield over a 6-in. (approximately equal to 15-cm) diameter wafer (one unit per wafer); a rigid, thermally compatible structure (all components and operating conditions) to cryogenic temperatures; re-workability and component replaceability, if required; and the ability to precisely cut large-area holes through the substrate. A method that would employ indium bump technology along with wafer-scale integration onto a silicon carrier was also developed. By establishing a silicon-based version of a printed circuit board, the objectives could be met with one solution. The silicon substrate would be 2 mm thick to survive the environmental loads of a launch. More than 2,300 metal traces and over 1,500 individual wire bonds are required. To mate the microshutter array to the silicon substrate, more than 10,000 indium bumps are required. A window was cut in the substrate to allow the light signal to pass through the substrate and reach the microshutter array. The substrate was also the receptacle for multiple unpackaged IC die wire-bonded directly to the substrate (thus conserving space over conventionally packaged die). Unique features of this technology include the implementation of a 2-mmthick silicon wafer to withstand extreme mechanical loads (from a rocket launch); integrated polysilicon resistor heaters directly on the substrate; the precise formation of an open aperture (approximately equal to 3x3cm) without any crack propagation; implementation of IR transmission blocking techniques; and compatibility with indium bump bonding. Although designed for the microshutter arrays for the NIRSpec instrument on the James Webb Space Telescope, these substrates can be linked to microshutter applications in the photomask generation and stepper equipment used to make ICs and microelectromechanical system (MEMS) devices.

Jhabvala, Murzy↗
NASA NTRSDate not supplied

Characterizations of Optimized Microshutter Arrays for Space Borne Observatory Applications

We report the latest design, fabrication, and characterization result of the Next-Generation Microshutter Arrays (NGMSA) for space borne observatory applications. Our improved blade design aims to reduce the counter torque induced by the potential on the opposing wall to eliminate the torque bump, and thus enables pure electrostatic actuation for more reliable and stable microshutter operations. This paper presents the experimental performances of micro-fabricated microshutter arrays with varying design parameters and compares the results with simulation predictions.

Electrostatic↗
NASA NTRS1992

Real-time processor for staring receivers

The design, fabrication, and testing of a state-of-the-art, high-throughput on-focal plane IR-image signal processor is described. The processing functions performed are frame differencing and thresholding. The final focal plane array will consist of a 128 x 128-pixel platinum-silicide detector bump-mounted to an on-chip CCD multiplexer. The processor is in a 128-channel parallel-pipeline format. Each channel consists of a pixel regenerator (charge differencer), 128-pixel frame store CCD memory, pixel differencer, second pixel regenerator, thresholder (analog comparator), and digital latch. Four parallel analog outputs and four parallel digital outputs are included. The digital outputs provide a bit map of the image. All analog clock signals (128 KHz, 256 KHz, and 5 MHz) are generated by on-chip TTL-input clock drivers. TTL clock driver inputs are generated off-chip. The technology is low-temperature surface and buried channel CCD/CMOS/indium bump. The design goal was 8-bit resolution at 77 K and 1000 frames/s. Applications include point- or extended-target motion detection with thresholding. Design trade-offs and enhancements (such as on-chip detector gain compensation and a simple window processor) are discussed.

Hanzal, Brian↗
NASA NTRS1992

An Analog Processor for Image Compression

This paper describes a novel analog Vector Array Processor (VAP) that was designed for use in real-time and ultra-low power image compression applications. This custom CMOS processor is based architectually on the Vector Quantization (VQ) algorithm in image coding, and the hardware implementation fully exploits the inherent parallelism built-in the VQ algorithm.

Vector Array Processor VAP analog processor image ↗
NASA NTRS2007

Indium Hybridization of Large Format TES Bolometer Arrays to Readout Multiplexers for Far-Infrared Astronomy

The advance of new detector technologies combined with enhanced fabrication methods has resulted in an increase in development of large format arrays. The next generation of scientific instruments will utilize detectors containing hundreds to thousands of elements providing a more efficient means to conduct large area sky surveys. Some notable detectors include a 32x32 x-ray microcalorimeter for Constellation-X, an infrared bolometer called SAFIRE to fly on the airborne observatory SOFIA, and the sub-millimeter bolometer SCUBA-2 to be deployed at the JCMT which will use more than 10,000 elements for two colors, each color using four 32x40 arrays. Of these detectors, SCUBA-2 is farthest along in development and uses indium hybridization to multiplexers for readout of the large number of elements, a technology that will be required to enable the next generation of large format arrays. Our current efforts in working toward large format arrays have produced GISMO, the Goddard IRAM Superconducting 2-Millimeter observer. GISMO is a far infrared instrument to be field tested later this year at the IRAM 30 meter telescope in Spain. GISMO utilizes transition edge sensor (TES) technology in an 8x16 filled array format that allows for typical fan-out wiring and wire-bonding to four 1x32 NIST multiplexers. GISMO'S electrical wiring is routed along the tops of 30 micron walls which also serve as the mechanical framework for the array. This architecture works well for the 128 element array, but is approaching the limit for routing the necessary wires along the surface while maintaining a high fill factor. Larger format arrays will benefit greatly from making electrical connections through the wafer to the backside, where they can be hybridized to a read-out substrate tailored to handling the wiring scheme. The next generation array we are developing is a 32x40 element array on a pitch of 1135 microns that conforms to the NIST multiplexer, already developed for the SCUBA-2 instrument This architecture will utilize electrical connections that route from the TES to the support frame and through the wafer. The detector chip will then be hybridized to the NIST multiplexer via indium bump bonding. In our development scheme we are using substrates that allow for diagnostic testing of electrical continuity across the entire array and we are testing our process to minimize or eliminate any contact resistance at metal interfaces. Our goal is hybridizing a fully functional 32x40 array of TES bolometers to a NIST multiplexer. The following work presents our current progress toward enabling this technology.

Miller, Timothy M.↗
NASA NTRS2007

Array of Bolometers for Submillimeter- Wavelength Operation

A feed-horn-coupled monolithic array of micromesh bolometers is undergoing development for use in a photometric camera. The array is designed for conducting astrophysical observations in a wavelength band centered at 350 m. The bolometers are improved versions of previously developed bolometers comprising metalized Si3N4 micromesh radiation absorbers coupled with neutron- transmutation-doped Ge thermistors. Incident radiation heats the absorbers above a base temperature, changing the electrical resistance of each thermistor. In the present array of improved bolometers (see figure), the thermistors are attached to the micromesh absorbers by indium bump bonds and are addressed by use of lithographed, vapor-deposited electrical leads. This architecture reduces the heat capacity and minimizes the thermal conductivity to 1/20 and 1/300, respectively, of earlier versions of these detectors, with consequent improvement in sensitivity and speed of response. The micromesh bolometers, intended to operate under an optical background set by thermal emission from an ambient-temperature space-borne telescope, are designed such that the random arrival of photons ("photon noise") dominates the noise sources arising from the detector and readout electronics. The micromesh is designed to be a highly thermally and optically efficient absorber with a limiting response time of about 100 s. The absorber and thermistor heat capacity are minimized in order to give rapid speed of response. Due to the minimization of the absorber volume, the dominant source of heat capacity arises from the thermistor.

Bock, James↗
NASA NTRS2011

Programmable Aperture with MEMS Microshutter Arrays

A microshutter array (MSA) has been developed for use as an aperture array for multi-object selections in James Webb Space Telescope (JWST) technology. Light shields, molybdenum nitride (MoN) coating on shutters, and aluminum/aluminum oxide coatings on interior walls are put on each shutter for light leak prevention, and to enhance optical contrast. Individual shutters are patterned with a torsion flexure that permits shutters to open 90 deg. with a minimized mechanical stress concentration. The shutters are actuated magnetically, latched, and addressed electrostatically. Also, micromechanical features are tailored onto individual shutters to prevent stiction. An individual shutter consists of a torsion hinge, a shutter blade, a front electrode that is coated on the shutter blade, a backside electrode that is coated on the interior walls, and a magnetic cobalt-iron coating. The magnetic coating is patterned into stripes on microshutters so that shutters can respond to an external magnetic field for the magnetic actuation. A set of column electrodes is placed on top of shutters, and a set of row electrodes on sidewalls is underneath the shutters so that they can be electrostatically latched open. A linear permanent magnet is aligned with the shutter rows and is positioned above a flipped upside-down array, and sweeps across the array in a direction parallel to shutter columns. As the magnet sweeps across the array, sequential rows of shutters are rotated from their natural horizontal orientation to a vertical open position, where they approach vertical electrodes on the sidewalls. When the electrodes are biased with a sufficient electrostatic force to overcome the mechanical restoring force of torsion bars, shutters remain latched to vertical electrodes in their open state. When the bias is removed, or is insufficient, the shutters return to their horizontal, closed positions. To release a shutter, both the electrode on the shutter and the one on the back wall where the shutter sits are grounded. The shutters with one or both ungrounded electrodes are held open. Sub-micron bumps underneath light shields and silicon ribs on back walls are the two features to prevent stiction. These features ensure that the microshutter array functions properly in mechanical motions. The MSA technology can be used primarily in multi-object imaging and spectroscopy, photomask generation, light switches, and in the stepper equipment used to make integrated circuits and MEMS (microelectromechanical systems) devices.

Moseley, Samuel↗
NASA NTRS1994

Reconfigurable Full-Page Braille Displays

Electrically actuated braille display cells of proposed type arrayed together to form full-page braille displays. Like other braille display cells, these provide changeable patterns of bumps driven by digitally recorded text stored on magnetic tapes or in solid-state electronic memories. Proposed cells contain electrorheological fluid. Viscosity of such fluid increases in strong electrostatic field.

Garner, H. Douglas↗
NASA NTRS1999

Corrugated Quantum Well Infrared Photodetector Focal Plane Array Test Results

The corrugated quantum-well infrared photodetector (C-QWIP) uses total internal reflection to couple normal incident light into the optically active quantum wells. The coupling efficiency has been shown to be relatively independent of the pixel size and wavelength thus making the C-QWIP a candidate for detectors over the entire infrared spectrum. The broadband coupling efficiency of the C-QWIP makes it an ideal candidate for multiwavelength detectors. We fabricated and tested C-QWIP focal plane arrays (FPAs) with cutoff wavelengths of 11.2 and 16.2 micrometers. Each FPA has 256 x 256 pixels that are bump-bonded to a direct injection readout circuit. Both FPAs provided infrared imagery with good aesthetic attributes. For the 11.2-micrometers FPA, background-limited performance (BLIP) was observed at 60 K with f/3 optics. For the 16.2-micrometers FPA, BLIP was observed at 38 K. Besides the reduction of dark current in C-QWIP structures, the measured internal quantum efficiency (eta) remains to be high. The values for responsivity and quantum efficiency obtained from the FPA results agree well with those measured for single devices.

Goldberg, A.↗
NASA NTRS2000

Flight Control Using Distributed Shape-Change Effector Arrays

Recent discoveries in material science and fluidics have been used to create a variety of novel effector devices that offer great potential to enable new approaches to aerospace vehicle flight control. Examples include small inflatable blisters, shape-memory alloy diaphragms, and piezoelectric patches that may be used to produce distortions or bumps on the surface of an airfoil to generate control moments. Small jets have also been used to produce a virtual shape-change through fluidic means by creating a recirculation bubble on the surface of an airfoil. An advanced aerospace vehicle might use distributed arrays of hundreds of such devices to generate moments for stabilization and maneuver control, either augmenting or replacing conventional ailerons, flaps or rudders. This research demonstrates the design and use of shape-change device arrays for a tailless aircraft in a low-rate maneuvering application. A methodology for assessing the control authority of the device arrays is described, and a suite of arrays is used in a dynamic simulation to illustrate allocation and deployment methodologies. Although the authority of the preliminary shape-change array designs studied in this paper appeared quite low, the simulation results indicate that the effector suite possessed sufficient authority to stabilize and maneuver the vehicle in mild turbulence.

Raney, David L.↗
DOE OSTI2024

ETROC1: the first full chain precision timing prototype ASIC for CMS MTD endcap timing layer upgrade

We present the design and characterization of the first fullchain precision timing prototype ASIC, named ETL Readout Chipversion 1 (ETROC1) for the CMS MTD endcap timing layer (ETL)upgrade. The ETL utilizes Low Gain Avalanche Diode (LGAD) sensors todetect charged particles, with the goal to achieve a time resolutionof 40–50 ps per hit, and 30–40 ps per track with hits from twodetector layers. The ETROC1 is composed of a 5 × 5 pixelarray and peripheral circuits. The pixel array includes a4 × 4 active pixel array with an H-tree shaped networkdelivering clock and charge injection signals. Each active pixel iscomposed of various components, including a bump pad, a chargeinjection circuit, a pre-amplifier, a discriminator, adigital-to-analog converter, and a time-to-digital converter. Thesecomponents play essential roles as the front-end link in processingLGAD signals and measuring timing-related information. Theperipheral circuits provide clock signals and readoutfunctionalities. The size of the ETROC1 chip is7 mm× 9 mm. ETROC1 has been fabricated in a 65 nmCMOS process, and extensively tested under stimuli of chargeinjection, infrared laser, and proton beam. The time resolution ofbump-bonded ETROC1 + LGAD chipsets reaches 42–46 ps per hit in thebeam test.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗
NASA NTRS2013

Fast, High-Precision Readout Circuit for Detector Arrays

The GEO-CAPE mission described in NASA's Earth Science and Applications Decadal Survey requires high spatial, temporal, and spectral resolution measurements to monitor and characterize the rapidly changing chemistry of the troposphere over North and South Americas. High-frame-rate focal plane arrays (FPAs) with many pixels are needed to enable such measurements. A high-throughput digital detector readout integrated circuit (ROIC) that meets the GEO-CAPE FPA needs has been developed, fabricated, and tested. The ROIC is based on an innovative charge integrating, fast, high-precision analog-to-digital circuit that is built into each pixel. The 128×128-pixel ROIC digitizes all 16,384 pixels simultaneously at frame rates up to 16 kHz to provide a completely digital output on a single integrated circuit at an unprecedented rate of 262 million pixels per second. The approach eliminates the need for off focal plane electronics, greatly reducing volume, mass, and power compared to conventional FPA implementations. A focal plane based on this ROIC will require less than 2 W of power on a 1×1-cm integrated circuit. The ROIC is fabricated of silicon using CMOS technology. It is designed to be indium bump bonded to a variety of detector materials including silicon PIN diodes, indium antimonide (InSb), indium gallium arsenide (In- GaAs), and mercury cadmium telluride (HgCdTe) detector arrays to provide coverage over a broad spectral range in the infrared, visible, and ultraviolet spectral ranges.

Rider, David M.↗
NASA NTRS2003

Wafer-Level Membrane-Transfer Process for Fabricating MEMS

A process for transferring an entire wafer-level micromachined silicon structure for mating with and bonding to another such structure has been devised. This process is intended especially for use in wafer-level integration of microelectromechanical systems (MEMS) that have been fabricated on dissimilar substrates. Unlike in some older membrane-transfer processes, there is no use of wax or epoxy during transfer. In this process, the substrate of a wafer-level structure to be transferred serves as a carrier, and is etched away once the transfer has been completed. Another important feature of this process is that two electrodes constitutes an electrostatic actuator array. An SOI wafer and a silicon wafer (see Figure 1) are used as the carrier and electrode wafers, respectively. After oxidation, both wafers are patterned and etched to define a corrugation profile and electrode array, respectively. The polysilicon layer is deposited on the SOI wafer. The carrier wafer is bonded to the electrode wafer by using evaporated indium bumps. The piston pressure of 4 kPa is applied at 156 C in a vacuum chamber to provide hermetic sealing. The substrate of the SOI wafer is etched in a 25 weight percent TMAH bath at 80 C. The exposed buried oxide is then removed by using 49 percent HF droplets after an oxygen plasma ashing. The SOI top silicon layer is etched away by using an SF6 plasma to define the corrugation profile, followed by the HF droplet etching of the remaining oxide. The SF6 plasma with a shadow mask selectively etches the polysilicon membrane, if the transferred membrane structure needs to be patterned. Electrostatic actuators with various electrode gaps have been fabricated by this transfer technique. The gap between the transferred membrane and electrode substrate is very uniform ( 0.1 m across a wafer diameter of 100 mm, provided by optimizing the bonding control). Figure 2 depicts the finished product.

Yang, Eui-Hyeok↗
NASA NTRS2000

Bolometric Array Detectors for Space-Borne Astronomy

Funding from the NASA Innovative Research Grant was used to develop bolometric detectors. As described in the proposal, silicon nitride micromesh ('spider-web') absorbers had been demonstrated at U.C. Berkeley but not developed to be flight-worthy devices. We proceeded to first fabricate bolometers with Neutron Transmutation Doped (NTD) Ge thermistors that demonstrated high optical coupling (Church et al. 1996) and were developed for a ground-based millimeter-wave receiver (Mauskopf et al. 1997). The next generation of devices used In bump-bonded thermistors to achieve devices with performance product NEP*sqrt(tau) = 3e - 18 j at 300 mK, demonstrating a full order of magnitude improvement over pervious devices. These devices achieved an NEP = 1e-18 W/rtHz (Murray et al. 1996) as promised in the proposal. Sensitivities as good as 1e - 19 W/rtHz appear achievable with the silicon nitride architecture (Bock et al. 1997). Finally, arrays of micromesh bolometers were shown to be feasible in the last year of the program by etching a large number of devices on a single silicon wafer (75 mm). Full arrays were subsequently demonstrated for selection on the ESA/NASA Far-Infrared Space Telescope (FIRST) in competition with detectors provided by CEA in France and GSFC in the US Micromesh bolometer arrays are now baselined for both the ESA/NASA Planck and FIRST missions.

Lange, Andrew E.↗