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NASA NTRS2000

A Real-Time High Performance Data Compression Technique For Space Applications

A high performance lossy data compression technique is currently being developed for space science applications under the requirement of high-speed push-broom scanning. The technique is also error-resilient in that error propagation is contained within a few scan lines. The algorithm is based on block-transform combined with bit-plane encoding; this combination results in an embedded bit string with exactly the desirable compression rate. The lossy coder is described. The compression scheme performs well on a suite of test images typical of images from spacecraft instruments. Hardware implementations are in development; a functional chip set is expected by the end of 2001.

Yeh, Pen-Shu↗

NASA NTRS2010

Method and system for progressive mesh storage and reconstruction using wavelet-encoded height fields

Systems and methods are provided for progressive mesh storage and reconstruction using wavelet-encoded height fields. A method for progressive mesh storage includes reading raster height field data, and processing the raster height field data with a discrete wavelet transform to generate wavelet-encoded height fields. In another embodiment, a method for progressive mesh storage includes reading texture map data, and processing the texture map data with a discrete wavelet transform to generate wavelet-encoded texture map fields. A method for reconstructing a progressive mesh from wavelet-encoded height field data includes determining terrain blocks, and a level of detail required for each terrain block, based upon a viewpoint. Triangle strip constructs are generated from vertices of the terrain blocks, and an image is rendered utilizing the triangle strip constructs. Software products that implement these methods are provided.

Baxes, Gregory A.↗

NASA NTRS2011

Method and system for progressive mesh storage and reconstruction using wavelet-encoded height fields

Baxes, Gregory A.↗

NASA NTRS1966

Uniform codes.

Existence of q-ary uniform convolutional codes where q is any prime-power, noting error- correcting ability comparable to familiar maximal- length block codes

ENCODING↗

NASA NTRS2006

General Solution for Theoretical Packet Data Loss Rate

Communications systems which transfer blocks ("frames") of data must use a marker ("frame synchronization pattern") for identifying where a block begins. A technique ("frame synchronization strategy") is used to locate the start of each frame and maintain synchronization as additional blocks are processed. A device which strips out the frame synchronization pattern [FSP] and provides an "end of frame" pulse is called a frame synchronizer. As clock and data errors are introduced into the system, the start-of-block marker becomes displaced and/or corrupted. The capability of the frame synchronizer to stay locked to the pattern under these conditions is a figure of merit for the frame synchronization strategy. It is important to select a strategy which will stay locked nearly all the time at bit error rates where the data is usable. ("Bit error rate" [BER] is the fraction of binary bits which are inverted by passage through a communication system.) The fraction of frames that are discarded because the frame synchronizer is not locked is called "Percent Data Loss" or "Packet Data Loss rate" [PDL]. A general approach for accurately predicting PDL given BER was developed in Theoretical Percent Data Loss Calculation and Measurement Accuracy, T. P. Kelly, LESC-30554, December 1992. Kelly gave a solution in terms of matrix equations, and only addressed "level" channel encoding. This paper goes on to give a closed-form polynomial solution for the most common class of frame synchronizer strategies, and will also address "mark" and "space" (differential) channel encoding, and burst error environments. The paper is divided into four sections and follows a logically ordered presentation, with results developed before they are evaluated. However, most readers will derive the greatest benefit from this paper by treating the results as reference material. The result developed for differential encoding can be extended to other applications (like block codes) where the probability is needed that a block contains only a certain number of errors.

Lansdowne, Chatwin↗

NASA NTRS1992

Control Circuit For Reed-Solomon Encoder

Control circuit designed for use with commercially available AHA4610 Reed-Solomon encoder. Needed to select depth of interleaving and to synchronize input and output blocks of data and parity bits with suitable clock signals. Circuit provides synchronizing and control signals for Reed-Solomon encoder. Encoder can operate with asynchronous input and output data streams at rates up to 80 Mb/s. Interleaving depth selectable, and accommodation to input data rate automatic.

Ross, Douglas↗

NASA NTRS1977

Development ephemeris number 96

Program tape contains two files: file one contains all software necessary to create binary file and perform ephemeris calculation on that file; file two of distributed tape contains encoded ephemeris data. These data are essentially a blocked listing of complete dump of original binary tape, with double precision data modified to special form.

Keesey, M. S. W.↗

NASA NTRS1986

Optimal block cosine transform image coding for noisy channels

The two dimensional block transform coding scheme based on the discrete cosine transform was studied extensively for image coding applications. While this scheme has proven to be efficient in the absence of channel errors, its performance degrades rapidly over noisy channels. A method is presented for the joint source channel coding optimization of a scheme based on the 2-D block cosine transform when the output of the encoder is to be transmitted via a memoryless design of the quantizers used for encoding the transform coefficients. This algorithm produces a set of locally optimum quantizers and the corresponding binary code assignment for the assumed transform coefficient statistics. To determine the optimum bit assignment among the transform coefficients, an algorithm was used based on the steepest descent method, which under certain convexity conditions on the performance of the channel optimized quantizers, yields the optimal bit allocation. Comprehensive simulation results for the performance of this locally optimum system over noisy channels were obtained and appropriate comparisons against a reference system designed for no channel error were rendered.

Vaishampayan, V.↗

NASA NTRS1988

Finite-state codes

A class of codes called finite-state (FS) codes is defined and investigated. The codes, which generalize both block and convolutional codes, are defined by their encoders, which are finite-state machines with parallel inputs and outputs. A family of upper bounds on the free distance of a given FS code is derived. A general construction for FS codes is given, and it is shown that in many cases the FS codes constructed in this way have a free distance that is the largest possible. Catastrophic error propagation (CEP) for FS codes is also discussed. It is found that to avoid CEP one must solve the graph-theoretic problem of finding a uniquely decodable edge labeling of the state diagram.

Pollara, Fabrizio↗

NASA NTRS1990

Optimal block cosine transform image coding for noisy channels

The two dimensional block transform coding scheme based on the discrete cosine transform was studied extensively for image coding applications. While this scheme has proven to be efficient in the absence of channel errors, its performance degrades rapidly over noisy channels. A method is presented for the joint source channel coding optimiaation of a scheme based on the 2-D block cosine transorm when the output of the encoder is to be transmitted via a memoryless design of the quantizers used for encoding the transform coefficients. This algorithm produces a set of locally optimum quantizers and the corresponding binary code assignment for the assumed transform coefficient statistics. To determine the optimum bit assignment among the transform coefficients, an algorithm was used based on the steepest descent method, which under certain convexity conditions on the performance of the channel optimized quantizers, yields the optimal bit allocation. Comprehensive simulation results for the performance of this locally optimum system over noise channels were obtained and appropriate comparisons against a reference system designed for no channel error were rendered.

Vaishampayan, Vinay A.↗

NASA NTRS1990

Custom CMOS Reed Solomon coder for the Hubble Space Telescope

A VLSI coder is presented that can function either as an encoder or decoder for Reed-Solomon codes. VLSI is one approach to implementing high-performance Reed-Solomon decoders. There are three VLSI technologies that could be used: gate arrays, standard cells, and full custom. The first two approaches are relatively easy to implement, but are limited in both performance and density. Full-custom VLSI is used to achieve both circuit density and speed, and allows control of the amount of interconnect. Speed, which is a function of capacitance, which is a function of interconnect, is an important parameter in high-performance VLSI. A single 8.2 mm x 8.4 mm, 200,000 transistor CMOS chip implementation of the Reed-Solomon code required by the Hubble Space Telescope is reported. The chip features a 10-MHz sustained byte rate independent of error pattern. The 1.6-micron CMOS integrated circuit has complete decoder and encoder functions and uses a single data/system clock. Block lengths up to 255 bytes and shortened codes are supported with no external buffering. Erasure corrections and random error corrections are supported with programmable correction of up to 10 symbol errors. Correction time is independent of error pattern and the number of errors in the incoming message.

Whitaker, S.↗

NASA NTRS1990

Reed Solomon error correction for the space telescope

This paper reports a single 8.2mm by 8.4mm, 200,000 transistor CMOS chip implementation of the Reed Solomon code required by the Space Telescope. The chip features a 10 MHz sustained byte rate independent of error pattern. The 1.6 micron CMOS integrated circuit has complete decoder and encoder functions and uses a single data/system clock. Block lengths up to 255 bytes as well as shortened codes are supported with no external buffering. Erasure corrections as well as random error corrections are supported with programmable corrections of up to 10 symbol errors. Correction time is independent of error pattern and the number of errors.

Whitaker, S.↗

NASA NTRS2009

NASA Tech Briefs, October 2009

Topics covered include: Light-Driven Polymeric Bimorph Actuators; Guaranteeing Failsafe Operation of Extended-Scene Shack-Hartmann Wavefront Sensor Algorithm; Cloud Water Content Sensor for Sounding Balloons and Small UAVs; Pixelized Device Control Actuators for Large Adaptive Optics; T-Slide Linear Actuators; G4FET Implementations of Some Logic Circuits; Electrically Variable or Programmable Nonvolatile Capacitors; System for Automated Calibration of Vector Modulators; Complementary Paired G4FETs as Voltage-Controlled NDR Device; Three MMIC Amplifiers for the 120-to-200 GHz Frequency Band; Low-Noise MMIC Amplifiers for 120 to 180 GHz; Using Ozone To Clean and Passivate Oxygen-Handling Hardware; Metal Standards for Waveguide Characterization of Materials; Two-Piece Screens for Decontaminating Granular Material; Mercuric Iodide Anticoincidence Shield for Gamma-Ray Spectrometer; Improved Method of Design for Folding Inflatable Shells; Ultra-Large Solar Sail; Cooperative Three-Robot System for Traversing Steep Slopes; Assemblies of Conformal Tanks; Microfluidic Pumps Containing Teflon[Trademark] AF Diaphragms; Transparent Conveyor of Dielectric Liquids or Particles; Multi-Cone Model for Estimating GPS Ionospheric Delays; High-Sensitivity GaN Microchemical Sensors; On the Divergence of the Velocity Vector in Real-Gas Flow; Progress Toward a Compact, Highly Stable Ion Clock; Instruments for Imaging from Far to Near; Reflectors Made from Membranes Stretched Between Beams; Integrated Risk and Knowledge Management Program -- IRKM-P; LDPC Codes with Minimum Distance Proportional to Block Size; Constructing LDPC Codes from Loop-Free Encoding Modules; MMICs with Radial Probe Transitions to Waveguides; Tests of Low-Noise MMIC Amplifier Module at 290 to 340 GHz; and Extending Newtonian Dynamics to Include Stochastic Processes.

Source record↗

NASA NTRS1985

Encoding Scheme Reduces Hardware Requirements

Shift register time-shared in proposed error-correcting code for tape-storage systems. Error-correcting code logic for blocks of 256-bit data words implemented by 14-stage-time-shared shift register, two 4,096bit RAM's and logic gates. Encoding and decoding logic implement generator polynomial that defines error-correcting code, and error correction based on algorithm also implemented by logic.

Sasnowitz, H.↗

NASA NTRS1995

Regulation of insulin-like growth factor I transcription by cyclic adenosine 3',5'-monophosphate (cAMP) in fetal rat bone cells through an element within exon 1: protein kinase A-dependent control without a consensus AMP response element

Insulin-like growth factor I (IGF-I) is a locally synthesized anabolic growth factor for bone. IGF-I synthesis by primary fetal rat osteoblasts (Ob) is stimulated by agents that increase the intracellular cAMP concentration, including prostaglandin E2 (PGE2). Previous studies with Ob cultures demonstrated that PGE2 enhanced IGF-I transcription through selective use of IGF-I promoter 1, with little effect on IGF-I messenger RNA half-life. Transient transfection of Ob cultures with an array of promoter 1-luciferase reporter fusion constructs has now allowed localization of a potential cis-acting promoter element(s) responsible for cAMP-stimulated gene expression to the 5'-untranslated region (5'-UTR) of IGF-I exon 1, within a segment lacking a consensus cAMP response element. Our evidence derives from three principal observations: 1) a transfection construct containing only 122 nucleotides (nt) of promoter 1 and 328 nt of the 5'-UTR retained full PGE2-stimulated reporter expression; 2) maximal PGE2-driven reporter expression required the presence of nt 196 to 328 of exon 1 when tested within the context of IGF-I promoter 1; 3) cotransfection of IGF-I promoter-luciferase-reporter constructs with a plasmid encoding the alpha-isoform of the catalytic subunit of murine cAMP-dependent protein kinase (PKA) produced results comparable to those seen with PGE2 treatment, whereas cotransfection with a plasmid encoding a mutant regulatory subunit of PKA that cannot bind cAMP blocked PGE2-induced reporter expression. Deoxyribonuclease I footprinting of the 5'-UTR of exon 1 demonstrated protected sequences at HS3A, HS3B, and HS3D, three of six DNA-protein binding sites previously characterized with rat liver nuclear extracts. Of these three regions, only the HS3D binding site is located within the functionally identified hormonally responsive segment of IGF-I exon 1. These results directly implicate PKA in the control of IGF-I gene transcription by PGE2 and identify a segment of IGF-I exon 1 as being essential for this hormonal regulation.

Non-NASA Center↗

NASA NTRS1979

A connection between block and convolutional codes

Convolutional codes of any rate and any constraint length give rise to a sequence of quasi-cyclic codes. Conversely, any quasi-cyclic code may be convolutionally encoded. Among the quasi-cyclic codes are the quadratic residue codes, Reed-Solomon codes and optimal BCH codes. The constraint length K for the convolutional encoding of many of these codes (Golay, (48, 24) QR, etc.) turns out to be surprisingly small. Thus using the soft decoding techniques for convolutional decoding, a new maximum likelihood decoding algorithm for many block codes is established. Conversely an optimal quasi-cyclic code will yield a convolutional encoding with optimal local properties and therefore with good infinite convolutional coding properties.

Solomon, G.↗

NASA NTRS1973

On the performance of block codes

It is important to define and evaluate measures which incorporate most, if not all, of the quantities affecting the overall system reliability. For the simple types of block codes normally employed in space communication systems, the complexity of the encoder and decoder is of little consequence, since the use of integrated circuit technology allows the construction of the basic components in an inexpensive fashion. The complexity is essentially independent of the particular code-decoder used. The processing speed is generally a function of the type of logic used and the technology in the construction of the integrated circuits.

Helgert, H. J.↗

NASA NTRS1993

Estimating the size of Huffman code preambles

Data compression via block-adaptive Huffman coding is considered. The compressor consecutively processes blocks of N data symbols, estimates source statistics by computing the relative frequencies of each source symbol in the block, and then synthesizes a Huffman code based on these estimates. In order to let the decompressor know which Huffman code is being used, the compressor must begin the transmission of each compressed block with a short preamble or header file. This file is an encoding of the list n = (n(sub 1), n(sub 2)....,n(sub m)), where n(sub i) is the length of the Hufffman codeword associated with the ith source symbol. A simple method of doing this encoding is to individually encode each n(sub i) into a fixed-length binary word of length log(sub 2)l, where l is an a priori upper bound on the codeword length. This method produces a maximum preamble length of mlog(sub 2)l bits. The object is to show that, in most cases, no substantially shorter header of any kind is possible.

Mceliece, R. J.↗