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Data traffic reduction schemes for Cholesky factorization on asynchronous multiprocessor systems

Communication requirements of Cholesky factorization of dense and sparse symmetric, positive definite matrices are analyzed. The communication requirement is characterized by the data traffic generated on multiprocessor systems with local and shared memory. Lower bound proofs are given to show that when the load is uniformly distributed the data traffic associated with factoring an n x n dense matrix using n to the alpha power (alpha less than or equal 2) processors is omega(n to the 2 + alpha/2 power). For n x n sparse matrices representing a square root of n x square root of n regular grid graph the data traffic is shown to be omega(n to the 1 + alpha/2 power), alpha less than or equal 1. Partitioning schemes that are variations of block assignment scheme are described and it is shown that the data traffic generated by these schemes are asymptotically optimal. The schemes allow efficient use of up to O(n to the 2nd power) processors in the dense case and up to O(n) processors in the sparse case before the total data traffic reaches the maximum value of O(n to the 3rd power) and O(n to the 3/2 power), respectively. It is shown that the block based partitioning schemes allow a better utilization of the data accessed from shared memory and thus reduce the data traffic than those based on column-wise wrap around assignment schemes.

Naik, Vijay K.↗

UPC++ v1.0 Programmer’s Guide (Rev. 2023.9.0)

UPC++ is a C++ library that supports Partitioned Global Address Space (PGAS) programming. It is designed for writing efficient, scalable parallel programs on distributed-memory parallel computers. The key communication facilities in UPC++ are one-sided Remote Memory Access (RMA) and Remote Procedure Call (RPC). The UPC++ control model is single program, multiple-data (SPMD), with each separate constituent process having access to local memory as it would in C++. The PGAS memory model additionally provides one-sided RMA communication to a global address space, which is allocated in shared segments that are distributed over the processes. UPC++ also features Remote Procedure Call (RPC) communication, making it easy to move computation to operate on data that resides on remote processes. UPC++ was designed to support exascale high-performance computing, and the library interfaces and implementation are focused on maximizing scalability. In UPC++, all communication operations are syntactically explicit, which encourages programmers to consider the costs associated with communication and data movement. Moreover, all communication operations are asynchronous by default, encouraging programmers to seek opportunities for overlapping communication latencies with other useful work. UPC++ provides expressive and composable abstractions designed for efficiently managing aggressive use of asynchrony in programs. Together, these design principles are intended to enable programmers to write applications using UPC++ that perform well even on hundreds of thousands of cores.

97 MATHEMATICS AND COMPUTING↗

UPC++ v1.0 Programmer’s Guide (Revision 2022.3.0)

UPC++ is a C++ library that supports Partitioned Global Address Space (PGAS) programming. It is designed for writing efficient, scalable parallel programs on distributed-memory parallel computers. The key communication facilities in UPC++ are one-sided Remote Memory Access (RMA) and Remote Procedure Call (RPC). The UPC++ control model is single program, multiple-data (SPMD), with each separate constituent process having access to local memory as it would in C++. The PGAS memory model additionally provides one-sided RMA communication to a global address space, which is allocated in shared segments that are distributed over the processes. UPC++ also features Remote Procedure Call (RPC) communication, making it easy to move computation to operate on data that resides on remote processes. UPC++ was designed to support exascale high-performance computing, and the library interfaces and implementation are focused on maximizing scalability. In UPC++, all communication operations are syntactically explicit, which encourages programmers to consider the costs associated with communication and data movement. Moreover, all communication operations are asynchronous by default, encouraging programmers to seek opportunities for overlapping communication latencies with other useful work. UPC++ provides expressive and composable abstractions designed for efficiently managing aggressive use of asynchrony in programs. Together, these design principles are intended to enable programmers to write applications using UPC++ that perform well even on hundreds of thousands of cores.

97 MATHEMATICS AND COMPUTING↗

UPC++ v1.0 Programmer’s Guide, Revision 2023.3.0

UPC++ is a C++ library that supports Partitioned Global Address Space (PGAS) programming. It is designed for writing efficient, scalable parallel programs on distributed-memory parallel computers. The key communication facilities in UPC++ are one-sided Remote Memory Access (RMA) and Remote Procedure Call (RPC). The UPC++ control model is single program, multiple-data (SPMD), with each separate constituent process having access to local memory as it would in C++. The PGAS memory model additionally provides one-sided RMA communication to a global address space, which is allocated in shared segments that are distributed over the processes. UPC++ also features Remote Procedure Call (RPC) communication, making it easy to move computation to operate on data that resides on remote processes. UPC++ was designed to support exascale high-performance computing, and the library interfaces and implementation are focused on maximizing scalability. In UPC++, all communication operations are syntactically explicit, which encourages programmers to consider the costs associated with communication and data movement. Moreover, all communication operations are asynchronous by default, encouraging programmers to seek opportunities for overlapping communication latencies with other useful work. UPC++ provides expressive and composable abstractions designed for efficiently managing aggressive use of asynchrony in programs. Together, these design principles are intended to enable programmers to write applications using UPC++ that perform well even on hundreds of thousands of cores.

97 MATHEMATICS AND COMPUTING↗

UPC++ v1.0 Programmer’s Guide, Revision 2022.9.0

UPC++ is a C++ library that supports Partitioned Global Address Space (PGAS) programming. It is designed for writing efficient, scalable parallel programs on distributed-memory parallel computers. The key communication facilities in UPC++ are one-sided Remote Memory Access (RMA) and Remote Procedure Call (RPC). The UPC++ control model is single program, multiple-data (SPMD), with each separate constituent process having access to local memory as it would in C++. The PGAS memory model additionally provides one-sided RMA communication to a global address space, which is allocated in shared segments that are distributed over the processes. UPC++ also features Remote Procedure Call (RPC) communication, making it easy to move computation to operate on data that resides on remote processes. UPC++ was designed to support exascale high-performance computing, and the library interfaces and implementation are focused on maximizing scalability. In UPC++, all communication operations are syntactically explicit, which encourages programmers to consider the costs associated with communication and data movement. Moreover, all communication operations are asynchronous by default, encouraging programmers to seek opportunities for overlapping communication latencies with other useful work. UPC++ provides expressive and composable abstractions designed for efficiently managing aggressive use of asynchrony in programs. Together, these design principles are intended to enable programmers to write applications using UPC++ that perform well even on hundreds of thousands of cores.

97 MATHEMATICS AND COMPUTING↗

Large-Scale Materials Modeling at Quantum Accuracy: Ab Initio Simulations of Quasicrystals and Interacting Extended Defects in Metallic Alloys

Ab initio electronic-structure has remained dichotomous between achievable accuracy and length-scale. Quantum many-body (QMB) methods realize quantum accuracy but fail to scale. Density functional theory (DFT) scales favorably but remains far from quantum accuracy. We present a framework that breaks this dichotomy by use of three interconnected modules: (i) invDFT: a methodological advance in inverse DFT linking QMB methods to DFT; (ii) MLXC: a machine-learned density functional trained with invDFT data, commensurate with quantum accuracy; (iii) DFT-FE-MLXC: an adaptive higher-order spectral finite-element (FE) based DFT implementation that integrates MLXC with efficient solver strategies and HPC innovations in FE-specific dense linear algebra, mixed-precision algorithms, and asynchronous compute-communication. Furthermore, we demonstrate a paradigm shift in DFT that not only provides an accuracy commensurate with QMB methods in ground-state energies, but also attains an unprecedented performance of 659.7 PFLOPS (43.1% peak FP64 performance) on 619,124 electrons using 8,000 GPU nodes of Frontier supercomputer.

density functional theory↗

Effects of Communication Delay on Human Spaceflight Missions

Missions onboard the International Space Station rely on the real-time availability of a large ground team of system experts to command the vehicle, solve safety-critical problems, and guide the crew during complex operations. Also, in Low Earth Orbit (LEO), supplies can be sent and crews evacuated quite quickly if needed. Future missions Beyond Low Earth Orbit (BLEO) will not have this 24/7, real-time safety net as communication latency increases, resupply difficulty increases, and evacuation opportunities diminish. There are few, if any, terrestrial analogs for human spaceflight missions BLEO that reflect the conditions—including extreme environments, long mission durations, and small crew sizes – that make these missions so high risk. Studies on specific conditions, such as communication delays and asynchronous interactions, have been performed in NASA Earth-based analog missions and have found that communication delays can disrupt ground-crew interactions and adversely impact team performance. However, there are gaps and limitations in studies conducted to date, notably on human spacecraft system failure response and recovery, the impacts of shorter lunar-relevant communication delays on complex operations, and the effectiveness of countermeasures. The work presented here breaks down real anomalies that occurred on ISS and Apollo missions and creates example scenarios fort Lunar Surface and Mars missions to explore the impact of communication delays of varying length on onboard operations and mission outcomes. Our analyses indicate that short communication delays (e.g., seconds to a minute) adversely impact the ability for ground to provide real-time oversight and guidance and to catch quickly emerging problems in time. Longer communication delays (e.g., up to 40 minutes on Mars missions) call for a shift of responsibility for tactical operations from ground to crew; crew must make time-critical decisions independently and respond to time-critical vehicle anomalies to prevent consequences.

human-systems integration↗

Effects of Communication Delay on Human Spaceflight Missions

Missions onboard the International Space Station rely on the real-time availability of a large ground team of system experts to command the vehicle, solve safety-critical problems, and guide the crew during complex operations. Also, in Low Earth Orbit (LEO), supplies can be sent and crews evacuated quite quickly if needed. Future missions Beyond Low Earth Orbit (BLEO) will not have this 24/7, real-time safety net as communication latency increases, resupply difficulty increases, and evacuation opportunities diminish. There are few, if any, terrestrial analogs for human spaceflight missions BLEO that reflect the conditions—including extreme environments, long mission durations, and small crew sizes – that make these missions so high risk. Studies on specific conditions, such as communication delays and asynchronous interactions, have been performed in NASA Earth-based analog missions and have found that communication delays can disrupt ground-crew interactions and adversely impact team performance. However, there are gaps and limitations in studies conducted to date, notably on human spacecraft system failure response and recovery, the impacts of shorter lunar-relevant communication delays on complex operations, and the effectiveness of countermeasures. The work presented here breaks down real anomalies that occurred on ISS and Apollo missions and creates example scenarios fort Lunar Surface and Mars missions to explore the impact of communication delays of varying length on onboard operations and mission outcomes. Our analyses indicate that short communication delays (e.g., seconds to a minute) adversely impact the ability for ground to provide real-time oversight and guidance and to catch quickly emerging problems in time. Longer communication delays (e.g., up to 40 minutes on Mars missions) call for a shift of responsibility for tactical operations from ground to crew; crew must make time-critical decisions independently and respond to time-critical vehicle anomalies to prevent consequences.

human-systems integration↗

Fast simulation of packet loss rates in a shared buffer communications switch

This paper describes an efficient technique for estimating, via simulation, the probability of buffer overflows in a queueing model that arises in the analysis of ATM (Asynchronous Transfer Mode) communication switches. There are multiple streams of (autocorrelated) traffic feeding the switch that has a buffer of finite capacity. Each stream is designated as either being of high or low priority. When the queue length reaches a certain threshold, only high priority packets are admitted to the switch's buffer. The problem is to estimate the loss rate of high priority packets. An asymptotically optimal importance sampling approach is developed for this rare event simulation problem. In this approach, the importance sampling is done in two distinct phases. In the first phase, an importance sampling change of measure is used to bring the queue length up to the threshold at which low priority packets get rejected. In the second phase, a different importance sampling change of measure is used to move the queue length from the threshold to the buffer capacity.

Chang, Cheng-Shang↗

Asynchronous Message Passing in the JPL Flight System Testbed

The flight mission simulation software in the Jet Propulsion Laboratory's Flight System Testbed (FST) is a heterogeneous, distributed system that is built on an interprocess communication model of asynchronous message passing rather than remote procedure calls (RPCs). The reasoning behind this design decision is discussed; the mechanism used to implement it (.

message passing RPC interprocess communication dis↗

Scalable Asynchronous Domain Decomposition Solvers

We discuss how parallel implementations of linear iterative solvers generally alternate between phases of data exchange and phases of local computation. Increasingly large problem sizes and more heterogeneous compute architectures make load balancing and the design of low latency network interconnects that are able to satisfy the communication requirements of linear solvers very challenging tasks. In particular, global communication patterns such as inner products become increasingly limiting at scale. We explore the use of asynchronous communication based on one-sided Message Passing Interface primitives in the context of domain decomposition solvers. In particular, a scalable asynchronous two-level Schwarz method is presented. We discuss practical issues encountered in the development of a scalable solver and show experimental results obtained on a state-of-the-art supercomputer system that illustrate the benefits of asynchronous solvers in load balanced as well as load imbalanced scenarios. Using the novel method, we can observe speedups of up to four times over its classical synchronous equivalent.

97 MATHEMATICS AND COMPUTING↗

On the utility of threads for data parallel programming

Threads provide a useful programming model for asynchronous behavior because of their ability to encapsulate units of work that can then be scheduled for execution at runtime, based on the dynamic state of a system. Recently, the threaded model has been applied to the domain of data parallel scientific codes, and initial reports indicate that the threaded model can produce performance gains over non-threaded approaches, primarily through the use of overlapping useful computation with communication latency. However, overlapping computation with communication is possible without the benefit of threads if the communication system supports asynchronous primitives, and this comparison has not been made in previous papers. This paper provides a critical look at the utility of lightweight threads as applied to data parallel scientific programming.

Fahringer, Thomas↗

UPC++ v1.0 Programmer’s Guide, Revision 2021.9.0

UPC++ is a C++ library that provides Partitioned Global Address Space (PGAS) programming. It is designed for writing parallel programs that run efficiently and scale well on distributed-memory parallel computers. The PGAS model is single program, multiple-data (SPMD), with each separate constituent process having access to local memory as it would in C++. PGAS additionally provides one-sided Remote Memory Access (RMA) to a global address space, which is allocated in shared segments that are distributed over the processes. UPC++ also features Remote Procedure Call (RPC) communication, making it easy to move computation to operate on data that resides on remote processes. In UPC++, all communication operations are explicit, which encourages programmers to be aware of the cost of communication and data movement. Moreover, all communication operations are asynchronous by default, to enable programmers to write code that scales well even on hundreds of thousands of cores.

96 KNOWLEDGE MANAGEMENT AND PRESERVATION↗

An enhanced Ada run-time system for real-time embedded processors

An enhanced Ada run-time system has been developed to support real-time embedded processor applications. The primary focus of this development effort has been on the tasking system and the memory management facilities of the run-time system. The tasking system has been extended to support efficient and precise periodic task execution as required for control applications. Event-driven task execution providing a means of task-asynchronous control and communication among Ada tasks is supported in this system. Inter-task control is even provided among tasks distributed on separate physical processors. The memory management system has been enhanced to provide object allocation and protected access support for memory shared between disjoint processors, each of which is executing a distinct Ada program.

Sims, J. T.↗

A Heritage BioSensor for Lunar Biology Experiments

Introduction: Automated biological experiments on small spacecraft missions have gained prominence over the past decade due to their simplicity, accessibility, and small mass, volume, and power needs. Most recently, the BioSensor microfluidic CubeSat payload aboard BioSentinel used an automated microfluidic cell culture system to study the effects of environmental stressors like deep space radiation and microgravity on yeast growth and metabolism. BioSentinel’s successor, the Lunar Explorer Instrument for space biology Applications (LEIA), will study the effects of lunar gravity and radiation using an improved version of the BioSensor microfluidic platform. The BioSensor payload has great adaptability to host a diverse range of biological experiments with single- and multi-celled organisms in both crewed and uncrewed missions, making it a compelling candidate for future space biology studies in a lunar surface environment. BioSensor Instrumentation on BioSentinel: The first spaceflight mission with the BioSensor, BioSentinel’s biology experiments occurred at three locations -- deep space, ISS and ground. The payload contained 18 microfluidic cards, each featuring 16 growth wells (a total of 288 growth wells). Each well was loaded before launch with desiccated yeast. In space, liquid culture medium (nutrients) was automatically introduced to batches of wells at a time to initiate a series of biology experiments. Temperature was maintained by thin film heaters on both sides of each card. Each well was equipped with three LEDs emitting at 570 nm, 630 nm, and 850 nm, paired with photodetectors to measure cell concentration and the alamarBlue (metabolic indicator dye) color transition from blue to pink. Phenotypic parameters like cell viability, metabolic rate, and generation time can be derived from these measurements. The sequence and timing of fluid fills, optical measurements, and thermal control were stored onboard, but could be updated asynchronously via ground communication. LEIA: LEIA is slated for launch no earlier than 2026 on a CLPS lander. BioSentinel’s BioSensor has been modified for use in LEIA. These improvements include: (a) storage for multiple culture medium types, (b) additional LED color (465 nm) for a new biological assay for antioxidant (carotenoid) production, (c) housing modifications for later biology load before launch, (d) improved isolation between electronic and fluidic components, and (e) improved humidity control for prolonged organism viability in case of post-load launch delay. Future Prospects: The consistent and successful demonstration of complex fluidics platforms alongside reliable instrument operations in a space environment is poised to create strong momentum for BioSensor-based biological experiment payloads. Planned future developments with the BioSensor include extending compatibility to a broader range of organisms and assays. Preliminary work has already demonstrated successful growth of Arabidopsis seedlings in fluidic cards. With a few modifications to the optical assembly, the setup could easily measure photosynthetic traits in plants and cyanobacteria. The addition of fluorescence measurements and generation of novel luminescent assays will elevate BioSensor’s functionality further. Beyond the BioSensor’s potential uses on free-flyer missions, ISS and Gateway, and CLPS landers, deploying the BioSensor to the lunar surface or in an artificial habitat on crewed missions could enable pioneering research on both how life responds to lunar conditions and future bioproduction capabilities making the BioSensor an indispensable tool for future space biology research.

Chinmayee Govinda Raj↗

Virtually-synchronous communication based on a weak failure suspector

Failure detectors (or, more accurately Failure Suspectors (FS)) appear to be a fundamental service upon which to build fault-tolerant, distributed applications. This paper shows that a FS with very weak semantics (i.e., that delivers failure and recovery information in no specific order) suffices to implement virtually-synchronous communication (VSC) in an asynchronous system subject to process crash failures and network partitions. The VSC paradigm is particularly useful in asynchronous systems and greatly simplifies building fault-tolerant applications that mask failures by replicating processes. We suggest a three-component architecture to implement virtually-synchronous communication: (1) at the lowest level, the FS component; (2) on top of it, a component (2a) that defines new views; and (3) a component (2b) that reliably multicasts messages within a view. The issues covered in this paper also lead to a better understanding of the various membership service semantics proposed in recent literature.

Schiper, Andre↗

Gimballess multi-access transceiver lasercom terminal development

A breadboard sync satellite terminal has been developed incorporating a unique concept of a gimballess multi-access transceiver, which is capable of simultaneously communicating with six independent, asynchronous LEO satellites. The developmental hardware illustrates that low power, weight, and volume is achievable compared to multiple independent gimballed transceivers, while also putting a lesser burden of power, size, and weight on the LEO satellite tranceivers that communicate with the multiple-access transceiver.

Clarke, E. S.↗

Carrying Synchronous Voice Data On Asynchronous Networks

Buffers restore synchronism for internal use and permit asynchronism in external transmission. Proposed asynchronous local-area digital communication network (LAN) carries synchronous voice, data, or video signals, or non-real-time asynchronous data signals. Network uses double buffering scheme that reestablishes phase and frequency references at each node in network. Concept demonstrated in token-ring network operating at 80 Mb/s, pending development of equipment operating at planned data rate of 200 Mb/s. Technique generic and used with any LAN as long as protocol offers deterministic (or bonded) access delays and sufficient capacity.

Bergman, Larry A.↗