Memory Seeds Enable High Structural Phase Purity in 2D Perovskite Films for High-Efficiency Devices
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99 GENERAL AND MISCELLANEOUS↗
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Results for “memory spaces”
Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.
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Spectral quadrature for the first principles study of crystal defects: Application to magnesium
In this work, we present an accurate and efficient finite-difference formulation and parallel implementation of Kohn-Sham Density (Operator) Functional Theory (DFT) for non periodic systems embedded in a bulk environment. Specifically, employing non-local pseudopotentials, local reformulation of electrostatics, and truncation of the spatial Kohn-Sham Hamiltonian, and the Linear Scaling Spectral Quadrature method to solve for the pointwise electronic fields in real-space and the non-local component of the atomic force, we develop a parallel finite difference framework suitable for distributed memory computing architectures to simulate non-periodic systems embedded in a bulk environment. Choosing examples from magnesium-aluminum alloys, we first demonstrate the convergence of energies and forces with respect to spectral quadrature polynomial order, and the width of the spatially truncated Hamiltonian. Next, we demonstrate the parallel scaling of our framework, and show that the computation time and memory scale linearly with respect to the number of atoms. Next, we use the developed framework to simulate isolated point defects and their interactions in magnesium-aluminum alloys. Our findings conclude that the binding energies of divacancies, Al solute-vacancy and two Al solute atoms are anisotropic and are dependent on cell size. Furthermore, the binding is favorable in all three cases.
71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗
Case Study: Field Evaluation of a Low-Cost Circuit-Level Electrical Submetering System
Circuit-level metering technologies provide the ability to monitor individual circuits within an electrical panel in a building, providing detailed power and energy consumption data at a much more granular level than was previously achievable in a cost-effective manner. While the fundamental hardware components of circuit-level—split-core current transformers (CTs) and power monitoring meters—have existed for some time, the new offerings in the market have tightly integrated these components, lower costs, and have streamlined data organization, transport, and access via software solutions accessible through web and application programming interfaces (API). NREL evaluated Meazon’s single-circuit metering system. The evaluation of the equipment under test (EUT) focused on three aspects: (1) accuracy of the data provided by the system, (2) ease of installation of this technology and ease of data integration into existing U.S. General Services Administration (GSA) analytics platforms, and (3) total cost of ownership and cost-effectiveness of the technology. The metering technology was tested in a field deployment where it was installed in low and high-voltage commercial electrical panels in the César E. Chávez Memorial Building in Denver, Colorado. The goals were to assess the metering accuracy, the ease of installation and data retrieval, and the total cost of ownership and cost-effectiveness. This technology proved easy to install by a certified electrician who completed the install of 6 meters in 2 separate panels (120/208 V and 277/480 V) and 2 circuit disconnects (along with associated commissioning) at the César E. Chávez Memorial Building in less than one day. The technology was installed in high- and low-voltage panels and with limited space in the electrical room, demonstrating the applicability of this technology to almost all commercial buildings in the GSA portfolio. Primary considerations for this technology include appropriate sizing of CTs for each circuit, selection of loads/circuits/panels that are of high value for detailed submetering (e.g., tailored for high-load devices), and how GSA would like to integrate these data with its existing energy management infrastructure. Through the field evaluation, we demonstrated data integration from the vendor system into the primary software component on the GSA enterprise-level energy management and information system, GSA Link. Data from the circuit-level metering were integrated into this platform and used to perform FDD. This demonstrated the ability of the EUT to augment existing energy management and information systems in buildings where GSA Link is deployed and provides a pathway for delivering FDD at other buildings throughout the portfolio.
29 ENERGY PLANNING, POLICY, AND ECONOMY↗
GASNet-EX RMA Communication Performance on Recent Supercomputing Systems
Partitioned Global Address Space (PGAS) programming models, typified by systems such as Unified Parallel C (UPC) and Fortran coarrays, expose one-sided Remote Memory Access (RMA) communication as a key building block for High Performance Computing (HPC) applications. Architectural trends in supercomputing make such programming models increasingly attractive, and newer, more sophisticated models such as UPC++, Legion and Chapel that rely upon similar communication paradigms are gaining popularity. GASNet-EX is a portable, open-source, high-performance communication library designed to efficiently support the networking requirements of PGAS runtime systems and other alternative models in emerging exascale machines. The library is an evolution of the popular GASNet communication system, building upon 20 years of lessons learned. We present microbenchmark results which demonstrate the RMA performance of GASNet-EX is competitive with MPI implementations on four recent, high-impact, production HPC systems. These results are an update relative to previously published results on older systems. The networks measured here are representative of hardware currently used in six of the top ten fastest supercomputers in the world, and all of the exascale systems on the U.S. DOE road map.
Hargrove, Paul H↗
T Cell Activation Thresholds are Affected by Gravitational
T cells stimulated in space flight by various mitogenic signals show a dramatic reduction in proliferation and expression of early activation markers. Similar results are also obtained in a ground based model of microgravity, clinorotation, which provides a vector-averaged reduction of the apparent gravity on cells without significant shear force. Here we demonstrate that T cell inhibition is due to an increase in the required threshold for activation. Dose response curves indicate that cells activated during clinorotation require higher stimulation to achieve the same level of activation, as measured by CD69 expression. Interleukin 2 receptor expression, and DNA synthesis. The amount of stimulation necessary for 50% activation is 5 fold in the clinostat relative to static. Correlation of TCR internalization with activation also exhibit a dramatic right shift in clinorotation, demonstrating unequivocally that signal transduction mechanism independent of TCR triggering account for the increased activation threshold. Previous results from space flight experiments are consistent with the dose response curves obtained for clinorotation. Activation thresholds are important aspects of T cell memory, autoimmunity and tolerance Clinorotation is a useful, noninvasive tool for the study of cellular and biochemical event regulating T cell activation threshold and the effects of gravitation forces on these systems.
Adams, Charley↗
Evaluation Metrics for the Paragon XP/S-15
On February 17th 1993, the Numerical Aerodynamic Simulation (NAS) facility located at the NASA Ames Research Center installed a 224 node Intel Paragon XP/S-15 system. After its installation, the Paragon was found to be in a very immature state and was unable to support a NAS users' workload, composed of a wide range of development and production activities. As a first step towards addressing this problem, we implemented a set of metrics to objectively monitor the system as operating system and hardware upgrades were installed. The metrics were designed to measure four aspects of the system that we consider essential to support our workload: availability, utilization, functionality, and performance. This report presents the metrics collected from February 1993 to August 1993. Since its installation, the Paragon availability has improved from a low of 15% uptime to a high of 80%, while its utilization has remained low. Functionality and performance have improved from merely running one of the NAS Parallel Benchmarks to running all of them faster (between 1 and 2 times) than on the iPSC/860. In spite of the progress accomplished, fundamental limitations of the Paragon operating system are restricting the Paragon from supporting the NAS workload. The maximum operating system message passing (NORMA IPC) bandwidth was measured at 11 Mbytes/s, well below the peak hardware bandwidth (175 Mbytes/s), limiting overall virtual memory and Unix services (i.e. Disk and HiPPI I/O) performance. The high NX application message passing latency (184 microns), three times than on the iPSC/860, was found to significantly degrade performance of applications relying on small message sizes. The amount of memory available for an application was found to be approximately 10 Mbytes per node, indicating that the OS is taking more space than anticipated (6 Mbytes per node).
Traversat, Bernard↗
MPST Software: MoonKommand
This software automatically processes Sally Ride Science (SRS) delivered MoonKAM camera control files (ccf) into uplink products for the GRAIL-A and GRAIL-B spacecraft as part of an education and public outreach (EPO) extension to the Grail Mission. Once properly validated and deemed safe for execution onboard the spacecraft, MoonKommand generates the command products via the Automated Sequence Processor (ASP) and generates uplink (.scmf) files for radiation to the Grail-A and/or Grail-B spacecraft. Any errors detected along the way are reported back to SRS via email. With Moon Kommand, SRS can control their EPO instrument as part of a fully automated process. Inputs are received from SRS as either image capture files (.ccficd) for new image requests, or downlink/delete files (.ccfdl) for requesting image downlink from the instrument and on-board memory management. The Moon - Kommand outputs are command and file-load (.scmf) files that will be uplinked by the Deep Space Network (DSN). Without MoonKommand software, uplink product generation for the MoonKAM instrument would be a manual process. The software is specific to the Moon - KAM instrument on the GRAIL mission. At the time of this writing, the GRAIL mission was making final preparations to begin the science phase, which was scheduled to continue until June 2012.
Kwok, John H.↗
Standardizing Microprocessor and GPU Radiation Test Approaches
Microprocessor, Graphics Processing Units (GPUs) and DDRx memory devices have emerged as promising next-generation technologies that enables both high performance processing and acceleration of complex algorithms for the latest challenges in human spaceflight, autonomous vehicles and artificial intelligence (AI). The feature sets of these devices offer exponential increases to throughput, calculation capability and system autonomy when compared to legacy flight systems. NASA's Electronic Part and Packaging (NEPP) Program has conducted an investigation into the radiation susceptibility of leading edge devices and process technologies by establishing standardized test approaches. Unlike most discrete devices, these require state of the art test systems to induce specific hardware activity similar to application software, thus allowing the characterization of failure modes within the system. To best characterize the tested part, NEPP eliminates variables that may impact device performance under radiation. Simplification of remaining system-level variables leads to an improved understanding of complex computational devices and their intended applications. The failure modes and error signatures that are recorded during testing are used to determine radiation sensitivity of the semiconductor process and the microcode architecture of the design. This presentation will discuss the test methodology that NASA Electronic Parts and Packaging (NEPP) is working to establish for its microprocessor, GPU and DDRx memory test programs to provide guidance on these devices and their underlying technology, in regards to their potential usage in future space flight systems.
GPU↗
In-flight observations of multiple-bit upset in DRAMs
In-flight data is examined showing a very high incidence of multiple-bit errors in a solid-state recorder that incorporates error detection and correction. The high MBU rate is shown to be a consequence of the physical selection of memory cell locations in the recorder architecture.
single↗
Active control of buckling of flexible beams
The feasibility of using the rapidly growing technology of the shape memory alloys actuators in actively controlling the buckling of large flexible structures is investigated. The need for such buckling control systems is becoming inevitable as the design trends of large space structures have resulted in the use of structural members that are long, slender, and very flexible. In addition, as these truss members are subjected mainly to longitudinal loading they become susceptible to structural instabilities due to buckling. Proper control of such instabilities is essential to the effective performance of the structures as stable platforms for communication and observation. Mathematical models are presented that simulate the dynamic characteristics of the shape memory actuator, the compressive structural members, and the associated active control system. A closed-loop computer-controlled system is designed, based on the developed mathematical models, and implemented to control the buckling of simple beams. The performance of the computer-controlled system is evaluated experimentally and compared with the theoretical predictions to validate the developed models. The obtained results emphasize the importance of buckling control and suggest the potential of the shape memory actuators as attractive means for controlling structural deformation in a simple and reliable way.
Baz, A.↗
Data Production on Past and Future NASA Missions
Data return is a metric that is commonly publicized for all space science missions. In the early days of the Space Program, this figure was small, and could be described in bits or maybe even megabits. But now, missions are capable of returning data volumes two or three orders of magnitude larger. For example, Voyager 1 and 2 combined produced a little over 5 Terabits of data in 39 years of operation. In contrast, the Cassini mission, launched two decades after Voyager, produced about one and a half times those data volumes in half the time. NISAR, an Earth Science Mission currently in implementation, plans to produce over 28 Petabits of raw data in just 3 years. This means that NISAR will produce about as many data in 30 days as the combined data production of nearly all planetary missions to date. These increases in capability are a result of technology enhancements in two main areas: telecommunications architecture (both space and ground segments) and data storage technology. This paper describes the progression of these two technologies over the course of more than three decades of space missions and provides additional insight into the design of the end-to-end NISAR Data System Architecture. Trends in the data are briefly explored and compared to Moore’s Law which provides only a qualitative model for memory growth but not for data production. In summary, early missions are found to be driven by unrefined processes while later missions, having utilized earlier lessons learned, focus more on improvements to flight and ground capabilities. Data return seems to fall into three categories. First, deep space missions are driven by the large distances that limit data return to the Earth. Next, the orbiter infrastructure around Mars helps these missions generate more data than other deep space spacecraft. Finally, near-Earth missions have the greatest capabilities for the studied metrics due to their close proximity to Earth and the ground network availability.
Xaypraseuth, Peter↗
SpaceCube v2.0 Space Flight Hybrid Reconfigurable Data Processing System
This paper details the design architecture, design methodology, and the advantages of the SpaceCube v2.0 high performance data processing system for space applications. The purpose in building the SpaceCube v2.0 system is to create a superior high performance, reconfigurable, hybrid data processing system that can be used in a multitude of applications including those that require a radiation hardened and reliable solution. The SpaceCube v2.0 system leverages seven years of board design, avionics systems design, and space flight application experiences. This paper shows how SpaceCube v2.0 solves the increasing computing demands of space data processing applications that cannot be attained with a standalone processor approach.The main objective during the design stage is to find a good system balance between power, size, reliability, cost, and data processing capability. These design variables directly impact each other, and it is important to understand how to achieve a suitable balance. This paper will detail how these critical design factors were managed including the construction of an Engineering Model for an experiment on the International Space Station to test out design concepts. We will describe the designs for the processor card, power card, backplane, and a mission unique interface card. The mechanical design for the box will also be detailed since it is critical in meeting the stringent thermal and structural requirements imposed by the processing system. In addition, the mechanical design uses advanced thermal conduction techniques to solve the internal thermal challenges.The SpaceCube v2.0 processing system is based on an extended version of the 3U cPCI standard form factor where each card is 190mm x 100mm in size The typical power draw of the processor card is 8 to 10W and scales with application complexity. The SpaceCube v2.0 data processing card features two Xilinx Virtex-5 QV Field Programmable Gate Arrays (FPGA), eight memory modules, a monitor FPGA with analog monitoring, Ethernet, configurable interconnect to the Xilinx FPGAs including gigabit transceivers, and the necessary voltage regulation. The processor board uses a back-to-back design methodology for common parts that maximizes the board real estate available. This paper will show how to meet the IPC 6012B Class 3A standard with a 22-layer board that has two column grid array devices with 1.0mm pitch. All layout trades such as stack-up options, via selection, and FPGA signal breakout will be discussed with feature size results. The overall board design process will be discussed including parts selection, circuit design, proper signal termination, layout placement and route planning, signal integrity design and verification, and power integrity results. The radiation mitigation techniques will also be detailed including configuration scrubbing options, Xilinx circuit mitigation and FPGA functional monitoring, and memory protection.Finally, this paper will describe how this system is being used to solve the extreme challenges of a robotic satellite servicing mission where typical space-rated processors are not sufficient enough to meet the intensive data processing requirements. The SpaceCube v2.0 is the main payload control computer and is required to control critical subsystems such as autonomous rendezvous and docking using a suite of vision sensors and object avoidance when controlling two robotic arms.
Xilinx FPGA↗
High-Performance, Radiation-Hardened Electronics for Space Environments
The Radiation Hardened Electronics for Space Environments (RHESE) project endeavors to advance the current state-of-the-art in high-performance, radiation-hardened electronics and processors, ensuring successful performance of space systems required to operate within extreme radiation and temperature environments. Because RHESE is a project within the Exploration Technology Development Program (ETDP), RHESE's primary customers will be the human and robotic missions being developed by NASA's Exploration Systems Mission Directorate (ESMD) in partial fulfillment of the Vision for Space Exploration. Benefits are also anticipated for NASA's science missions to planetary and deep-space destinations. As a technology development effort, RHESE provides a broad-scoped, full spectrum of approaches to environmentally harden space electronics, including new materials, advanced design processes, reconfigurable hardware techniques, and software modeling of the radiation environment. The RHESE sub-project tasks are: SelfReconfigurable Electronics for Extreme Environments, Radiation Effects Predictive Modeling, Radiation Hardened Memory, Single Event Effects (SEE) Immune Reconfigurable Field Programmable Gate Array (FPGA) (SIRF), Radiation Hardening by Software, Radiation Hardened High Performance Processors (HPP), Reconfigurable Computing, Low Temperature Tolerant MEMS by Design, and Silicon-Germanium (SiGe) Integrated Electronics for Extreme Environments. These nine sub-project tasks are managed by technical leads as located across five different NASA field centers, including Ames Research Center, Goddard Space Flight Center, the Jet Propulsion Laboratory, Langley Research Center, and Marshall Space Flight Center. The overall RHESE integrated project management responsibility resides with NASA's Marshall Space Flight Center (MSFC). Initial technology development emphasis within RHESE focuses on the hardening of Field Programmable Gate Arrays (FPGA)s and Field Programmable Analog Arrays (FPAA)s for use in reconfigurable architectures. As these component/chip level technologies mature, the RHESE project emphasis shifts to focus on efforts encompassing total processor hardening techniques and board-level electronic reconfiguration techniques featuring spare and interface modularity. This phased approach to distributing emphasis between technology developments provides hardened FPGA/FPAAs for early mission infusion, then migrates to hardened, board-level, high speed processors with associated memory elements and high density storage for the longer duration missions encountered for Lunar Outpost and Mars Exploration occurring later in the Constellation schedule.
Keys, Andrew S.↗
Graphene-Based Interconnect Exploration for Large SRAM Caches for Ultrascaled Technology Nodes
Graphene-based interconnects are considered promising replacements for traditional copper (Cu) interconnect due to their great electric properties. In this article, an interconnect-memory co- design framework is developed to efficiently optimize various graphene-based interconnect technologies. Four interconnect materials and heterogeneous design schemes are benchmarked against their traditional Cu counterparts to optimize large cache-level SRAM performance in terms of delay and energy per access, energy-delay product (EDP), and energy-delay-area product (EDAP). Here, a large design space exploration is performed based on realistic subarray design and device technology. Various interconnect- and array-level design parameters are studied to quantify the true potential of graphene-based wires for optimal memory performance.
42 ENGINEERING↗
Matrix-free preconditioning for high-order H (curl) discretizations
The greater arithmetic intensity of high-order finite element discretizations makes them attractive for implementation on next-generation hardware, but assembly of high-order finite element operators as matrices is prohibitively expensive. As a result, the development of general algebraic solvers for such operators has been an open research challenge. Fast matrix-free application of high-order operators has received significant attention in the literature in the context of Poisson-type problems, but preconditioners and solvers for inverting more general operators are not very well-developed. In this paper, we consider the problem of preconditioning a definite Maxwell operator at high polynomial order without assembling a matrix. We show that given efficient preconditioners for high-order H 1 finite element problems on the same mesh, efficient H(curl) preconditioners can be constructed in an auxiliary space framework. We demonstrate the resulting preconditioners in a practical setting with tensor-product basis functions on an unstructured mesh of quadrilaterals. Overall, our approach uses a sparsified H 1 solver constructed on a low-order mesh of the nodal points of the underlying high-order space, and we show that the resulting H(curl) preconditioner is effective at very high polynomial orders for two-dimensional model problems with complicated geometry, varying piecewise constant coefficients, and curved elements. The resulting preconditioner scales with nearly optimal O(p d+1 ) floating point operation count and optimal O(p d ) memory transfer requirements, outperforming existing Maxwell preconditioners in the high-order regime.
97 MATHEMATICS AND COMPUTING↗
A single-board preprocessor and pulse generator
The Aeronomy Lab. of NOAA has designed and built a single board, programmable radar controller for use with VHF ST (stratosphere troposphere) radars. The controller consists of a coherent integrator preprocessor and a radar pulse generator, both of which are described, as well as interfaces to an antenna beam switch and a receiver bandwidth switch. The controller occupies a single slot in a Data General Nova of Eclipse computer. The integrator and pulse generator take advantage of high density, dual port FIFO chips such as the 512 x 9 Mostek MK 4501. These FIFOs have separate input and output ports and independent read and write cycles with cycle times of less than 200 ns, making them very fast and easy to interface. A simple block diagram of the coherent integrator is shown. The integrator is designed to handle inputs from one receiver (2 channels) with 1 sec sample spacing. The pulse generator is based on controllers designed by R. F. Woodman for the Arecibo and SOUSY radars us a recirculating memory scheme.
Carter, D. A.↗
A state-of-the-art assessment of active structures
A state-of-the-art assessment of active structures with emphasis towards the applications in aeronautics and space is presented. It is felt that since this technology area is growing at such a rapid pace in many different disciplines, it is not feasible to cover all of the current research but only the relevant work as relates to aeronautics and space. Research in smart actuation materials, smart sensors, and control of smart/intelligent structures is covered. In smart actuation materials, piezoelectric, magnetostrictive, shape memory, electrorheological, and electrostrictive materials are covered. For sensory materials, fiber optics, dielectric loss, and piezoelectric sensors are examined. Applications of embedded sensors and smart sensors are discussed.
Source record↗
Media Controller For Receiving Data From A TAXI(TM) Link
TAXI(TM) media controller (TMC) is interface circuit that supports operation of test equipment in diagnosis of telemetry system in which data communicated via TAXI(TM) links. TMC designed specifically for use with TAXI(TM) test adapter for monitoring and testing telemetry data signals generated by payloads and other subsystems of Space Station Freedom. Overall, TMC characterized as providing interface between output part of a TAXI(TM) receiving chip and input port of memory system in test adapter. TMC detects some abnormalities in received data stream and resynchronizes stream to locally generated clock signal.
Stauffer, David R.↗