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A method for managing a network queue memory includes receiving sensor information about the network queue memory, predicting a memory failure in the network queue memory based on the sensor information, and outputting a notification through a plurality of nodes forming a network and using the network queue memory, the notification configuring communications between the nodes.
A data processing system includes a memory, a group of input/output (I/O) devices, an input/output memory management unit (IOMMU). The IOMMU is connected to the memory and adapted to allocate a hardware resource from among a group of hardware resources to receive an address translation request for a memory access from an I/O device. The IOMMU detects address translation requests from the plurality of I/O devices. The IOMMU reorders the address translation requests such that an order of dispatching an address translation request is based on a policy associated with the I/O device that is requesting the memory access. The IOMMU selectively allocates a hardware resource to the input/output device, based on the policy that is associated with the I/O device in response to the reordering.
We describe a methodology for decreasing the memory footprint and machine I/O load associated with the need to access a forward solution during an adjoint solve. Specifically, we are interested in the depletion perturbation equations, where terms in the adjoint Bateman and transport equations depend on the forward flux solution. Checkpointing is the procedure of storing snapshots of the forward solution to disk and using these snapshots to recompute the parts of the forward solution that are necessary for the adjoint solve. For large problems, however, the storage cost of just a few copies of an angular flux vector can exceed the available RAM on the host machine. We propose a methodology that does not checkpoint the angular flux vector; instead, we write and store converged source moments, which are typically of a much lower dimension than the angular flux solution. This reduces the memory footprint and I/O load of the problem, but requires that we perform single sweeps to reconstruct flux vectors on demand. We argue that this trade-off is exactly the kind of algorithm that will scale on advanced, memory-limited architectures. We analyze the cost, in terms of FLOPS and memory footprint, of five checkpointing schemes. We also provide computational results that support the analysis and show that the memory-for-work trade off does improve time to solution. (authors)
An apparatus and method for managing packet transfer between a memory fabric having a physical layer interface higher data rate than a data rate of a physical layer interface of another device, receives incoming packets from the memory fabric physical layer interface wherein at least some of the packets include different instruction types. The apparatus and method determine a packet type of the incoming packet received from the memory fabric physical layer interface and when the determined incoming packet type is of a type containing an atomic request, the method and apparatus prioritizes transfer of the incoming packet with the atomic request over other packet types of incoming packets, to memory access logic that accesses local memory within an apparatus.
A system and method for protecting memory instructions against faults are described. The system and method include converting the slave instructions to dummy operations, modifying memory arbiter to issue up to N master and N slave global/shared memory instructions per cycle, sending master memory requests to memory system, using slave requests for error checking, entering master requests to the GM/LM FIFO, storing slave requests in a register, and comparing the entered master requests with the stored slave requests.
Andra's approach for memory preservation on the long term is based first on a reference solution, which has been developed and implemented for the Manche disposal facility, the 'Centre de la Manche' (CSM). The reference solution is based on three sets of documents ('passive memory' provisions) and on activities involving the public, the local stakeholders and/or experts ('active memory' provisions). The reference solution is perennial for 6 to 10 centuries. Andra has decided to set a target of keeping the memory of the disposal facility for as long as possible. So, a research program to develop memory provisions for several millennia was launched in 2010. The most important and most promising studies come from scientific realms such as linguistics and semiotics, geology and archaeology, and feedback from surveys on transmission medium and preservation. Other studies are available in different areas, where social sciences and humanities play a prominent role. (authors)
The delayed-gamma (DG) line-emission (line) sampling was first introduced into MCNPX in 2005. At the time, storage demands for problems with large numbers of DG lines was a major concern. In order to accommodate large amounts of line data while keeping the memory footprint of such a problem from exceeding memory limits, complicated logic was included to sift through various storage options. In mid-2015 concerns arose over the adequacy of the MCNP6 DG source option (inherited from MCNPX) with line sampling for modeling high-fidelity problems. One indication that there was a problem came when studying the MCNP6 produced DG spectra of U-238 and its progeny using high-fidelity spectroscopic tallies when compared to DG line amplitudes directly from ENDF/B-VII.1 emission data. Despite producing a correct integral number of gammas, the comparison to ENDF data showed a broadening in the energy lines and a reduction in the amplitude of more prominent lines. It was later found that the cause of this broadening was one of the memory-saving techniques used to store DG line data when problems required many DG lines. Specifically, the DG lines were integrated into fine energy bins for sampling. When a DG line was to be sampled, a random number would be used to choose which energy bin to sample based on emission probability. Once chosen, a second random number was used to perform nearest-line sampling in that bin. The integration of lines led to an oversampling of low-probability lines, especially when in close proximity to high-probability lines. This treatment also caused a similar issue with the time-dependent behavior of DG line emission which occurred when low-probability lines were sampled near high probability lines with the former decay constant being used. The effect on time-dependent gamma production was demonstrated in analytic benchmarks performed by Weldon et al.. To address these issues a new gamma line storage and sampling treatment was introduced in 2015. This new treatment, stores gamma emission data in a line-by-line CDF which is sampled directly, thereby resolving both the line-broadening issue, and the time-dependence issue as was demonstrated by Tutt el al.. In addition, the new DG sampling treatment was written to use dynamically dimensioned storage arrays as opposed to large fixed-dimensioned arrays, as in the former treatment, and also makes more efficient use of line data that is stored by reducing or eliminating repeated data. As a result, storage arrays are generated only for DG data relevant to the problem being executed. The result should be a reduction in both memory requirements and runtime. However, these reductions could not be realized until the logic for the old treatment could be removed. This paper provides an update on recent work which has focused on the removal of the old DG sampling logic and attempts to quantify the memory reduction and speed up of selected problems.
Disclosed in some examples are methods, systems, memory devices, memory controllers, and machine-readable mediums which provide for reserving physical memory device resources to specific execution units. Execution units may include processes, threads, virtual machines, functions, procedures, or the like. Physical memory device resources may include channels, modules, ranks, banks, bank groups, and the like. For example, a physical memory device resource that is reservable may be a smallest unit that allows for parallel access with another of the same size unit.
Domain-specific systems improve the performance of a specific set of applications compared to general-purpose processing systems by deploying custom hardware accelerators. These hardware accelerators are generated using high-level synthesis (HLS) tools. The HLS tools enable a comprehensive design space exploration to optimize the compute performance of the generated accelerators. However, they often ignore the challenges of implementing the accelerators in a system-on-chip, particularly how the accelerators access memory. Our work introduces a buffering system design that improves accelerators' memory accesses by intelligently employing burst transactions to prefetch useful data from external memory to on-chip local buffers. Our design is dynamic, parametric, and transparent to the accelerators generated by HLS tools. We derive the buffering system parameters using appropriate compiler-based analysis passes and memory channel latency constraints. The proposed buffering system design results in, on average, 8.8x performance improvements while lowering memory channel utilization on average by 53.2% for a set of PolyBench kernels.
Pattern recognition algorithms are commonly employed to simplify the challenging and necessary step of track reconstruction in sub-atomic physics experiments. Aiding in the discrimination of relevant interactions, pattern recognition seeks to accelerate track reconstruction by isolating signals of interest. In high collision rate experiments, such algorithms can be particularly crucial for determining whether to retain or discard information from a given interaction even before the data is transferred to tape. As data rates, detector resolution, noise, and inefficiencies increase, pattern recognition becomes more computationally challenging, motivating the development of higher efficiency algorithms and techniques. Quantum associative memory is an approach that seeks to exploits quantum mechanical phenomena to gain advantage in learning capacity, or the number of patterns that can be stored and accurately recalled. Here, we study quantum associative memory based on quantum annealing and apply it to the particle track classification. We focus on discrimination models based on Ising formulations of quantum associative memory model (QAMM) recall and quantum content-addressable memory (QCAM) recall. We characterize classification performance of these approaches as a function detector resolution, pattern library size, and detector inefficiencies, using the D-Wave 2000Q processor as a testbed. Discrimination criteria is set using both solution-state energy and classification labels embedded in solution states. We find that energy-based QAMM classification performs well in regimes of small pattern density and low detector inefficiency. In contrast, state-based QCAM achieves reasonably high accuracy recall for large pattern density and the greatest recall accuracy robustness to a variety of detector noise sources.
Whether self-correcting quantum memories can exist at nonzero temperature in a physically reasonable setting remains a great open problem. Furthermore, it has recently been argued that symmetry-protected topological (SPT) systems in three space dimensions subject to a strong constraint—that the quantum dynamics respect a 1-form symmetry—realize such a quantum memory. We illustrate how this works in Walker-Wang codes, which provide a specific realization of these desiderata. In this setting we show that it is sufficient for the 1-form symmetry to be enforced on a subvolume of the system. This strongly suggests that the SPT character of the state is not essential. We confirm this by constructing an explicit example with a trivial (paramagnetic) bulk that realizes a self-correcting quantum memory. We therefore show that the enforcement of a 1-form symmetry on a measure-zero subvolume of a three-dimensional system can be sufficient to stabilize a self-correcting quantum memory at nonzero temperature.
This paper presents a systematic review of the literature on the melt memory effects observed in polymers, an area that has engendered considerable debate for over 50 years. Recent advances in experimental techniques have provided fresh insights into how a polymer's thermal history influences its recrystallization behavior. It has been observed that given other conditions unchanged, the crystallization temperature during recrystallization decreases with an increase in the melt temperature T s above the melting point T m until a critical melt temperature is attained. This phenomenon also extends to the half-time of crystallization and the secondary structures, such as lamellar thickness, of semi-crystalline polymers. Despite these findings, a comprehensive constitutive model that encapsulates polymer melt memory effects remains elusive. Cutting-edge instrumentation, including in situ small and wide-angle X-ray scattering, temperature-controlled Fourier transform infrared spectroscopy, and flash differential scanning calorimetry, have posed significant challenges to the traditional nucleation and growth models established in the 1970s. These models are foundational to our understanding of polymer crystallization, which is an integral part of polymer processing and production. In this review, the historical contours of this discourse are traced, with an examination of both the recent experimental breakthroughs and theoretical advancements pertinent to polymer melt memory effects. In conclusion, this paper delves into the prevailing theories of polymer nucleation and crystallization and engages with theoretical discussions and numerical simulations that attempt to elucidate and rationalize these melt memory phenomena.
The functional behavior of the porous shape memory alloy produced by self-propagating high-temperature synthesis from the Ti-48.0 at.% Ni powder mixture was studied. It was found that a large unelastic strain recovered on unloading and it was not attributed to the pseudoelasticity effect. A decrease in deformation temperatures did not influence the value of strain that recovered on unloading, while the effective modulus decreased from 1.9 to 1.44 GPa. It was found that the porous Ti-48.0 at.% Ni alloy revealed the one-way shape memory effect, where the maximum recoverable strain was 5%. The porous Ti-48.0 at.% Ni alloy demonstrated the transformation plasticity and the shape memory effects on cooling and heating under a stress. An increase in stress did not influence the shape memory effect value, which was equal to 1%. It was shown that the functional properties of the porous alloy were determined by the TiNi phase consisted of the two volumes Ti{sub 49.3}Ni{sub 50.7} and Ti{sub 50}Ni{sub 50} where the martensitic transformation occurred at different temperatures. The results of the study showed that the existence of the Ti{sub 49.3}Ni{sub 50.7} volumes in the porous Ti-48.0 at.% Ni alloy improved the functional properties of the alloy.
The structural origin of the memory effect is still elusive in glassy materials. Here, in this letter, the memory effect in a series of metallic glasses (MGs) is observed by two step annealing using differential scanning calorimetry (DSC) and molecular dynamics simulations. It demonstrates that the Kovacs peak can be reflected from not only the system potential energy but also the atomic dynamics, showing the memory effect could originate from the formation of more loose packing configurations around mobile atoms by structural rejuvenation in the second step of high temperature annealing. In contrast, the high-low temperature annealing protocol can only induce the monotonic relaxation. Therefore, our results pave a pathway to better understand the origin of memory effect in MGs and other glassy materials from their dynamics and local atomic structure.
Coupled arrays of Josephson junctions possess multiple stable zero voltage states. Such states can store information and consequently can be utilized for cryogenic memory applications. Basic memory operations can be implemented by sending a pulse to one of the junctions and studying transitions between the states. In order to be suitable for memory operations, such transitions between the states have to be fast and energy efficient. Here in this article we employed simulated annealing, a stochastic optimization algorithm, to study parameter optimization of array parameters which minimizes times and energies of transitions between specifically chosen states that can be utilized for memory operations (Read, Write, and Reset). Simulation results show that such transitions occur with access times on the order of 10–100 ps and access energies on the order of 10 -19 –5×10 -18 J. Numerical simulations are validated with approximate analytical results.
Functionalized magnetic nanoparticles are pivotal in magnetic resonance imaging, computed tomography, controlled drug delivery, and hyperthermia treatments due to their exceptional magnetic relaxation and functional properties. The magnetic core composition and structure significantly affects the complex magnetic properties of these nanoparticles necessitating a thorough examination of magnetism fundamentals related to these systems. One important aspect is the ability of magnetic nanoparticles to retain previous magnetic state configurations known as memory effect, primarily governed by domain structure and magnetic anisotropy. Despite its relevance to advanced applications, comprehensive studies on magnetic relaxation and memory effects remain limited. Here, the present review aims to bridge this gap by investigating relaxation mechanisms, synthesis strategies, and applications, fostering further innovation. It investigates the memory effects and their dependence on particle composition and morphology along with key synthesis techniques for large-scale production in industrial adoption. Structured into focused sections on magnetic properties and their influence on biomedical and technological applications, this review provides essential insights into memory effects, magneto-relaxation mechanisms, influencing factors, and both experimental and theoretical methodologies. It also delves into computational modelling and AI-driven design, which are revolutionizing the prediction, discovery, and optimization of materials with tailored properties.
Shape memory polymers are promising materials in many emerging applications due to their large extensibility and excellent shape recovery. However, practical application of these polymers is limited by their poor energy densities (up to ~1 MJ/m 3 ). Here, we report an approach to achieve a high energy density, one-way shape memory polymer based on the formation of strain-induced supramolecular nanostructures. As polymer chains align during strain, strong directional dynamic bonds form, creating stable supramolecular nanostructures and trapping stretched chains in a highly elongated state. Upon heating, the dynamic bonds break, and stretched chains contract to their initial disordered state. This mechanism stores large amounts of entropic energy (as high as 19.6 MJ/m 3 or 17.9 J/g), almost six times higher than the best previously reported shape memory polymers while maintaining near 100% shape recovery and fixity. The reported phenomenon of strain-induced supramolecular structures offers a new approach toward achieving high energy density shape memory polymers.
Electronic devices or circuits that can implement both logic and memory functions are regarded as the building blocks for future massive parallel computing beyond von Neumann architecture. Here we proposed phase-change memory (PCM)-based nonvolatile logic gates capable of AND, OR, and NOT Boolean logic operations verified in SPICE simulations and circuit experiments. The logic operations are parallel computing and results can be stored directly in the states of the logic gates, facilitating the combination of computing and memory in the same circuit. These results are encouraging for ultralow-power and high-speed nonvolatile logic circuit design based on novel memory devices.