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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 523 records · Page 29

COOLR: A New System for Dynamic Thermal-Aware Computing

Extreme-scale systems need to walk a fine line between the amount of cooling they receive and the thermal-induced performance and reliability degradation they can sustain. System managers are extremely motivated to battle cooling-energy cost: the largest line item in their total operating cost. On the other hand, pushing the nodes to peak performance in tightened cooling regimes places the burden on the dynamic thermal management (DTM) to protect the hardware. DTM schemes throttle performance to relieve heat accumulation within nodes when cooling cannot mitigate the problem. These interventions prevent fatal failures but introduce inevitable performance degradations and variations. Such variations can have drastic consequences on the performance of extreme-scale systems. Furthermore, distribution of heat across different system nodes depends not only on the amount of workload. Even if a strictly equal share of computational load is assigned to all nodes, there are physical attributes and topological features of each system that inherently cause uneven accumulation of heat. These can cause one subcomponent to trigger DTM prematurely and penalize the overall system. Our goal in this project is to create a holistic thermal-aware view of the system, capturing both inherent physical attributes and dynamic system state. We developed COOLR, a dynamic system with the ability to evaluate the interplay between management of computation, data, power dissipation, and thermal state. Thereby, COOLR will achieve higher overall performance at the same energy and cooling cost. First, we performed a systematic power and thermal modeling and of high performance computing architectures. Analytical and empirical techniques were blended to generate a light-weight thermal model of target systems. Second, we developed a thermal-aware OS and runtime system. Policies for managing resources and schedules for processes has been designed to co-optimize the thermal state and performance of the system. The main outcome of our proposed thermal-aware dynamic computing system are scheduling and allocation of processes and memory accesses leading to an appropriately “skewed” distribution of activity across the system. The ultimate result of this new arrangement resulted in reduced occurrences of hotspots and reduced episodes of DTM intervention, leading to improvements in performance. The overall thermal characterization and modeling methodology (thermal instrumentation techniques, model building, and systematic model reduction) resulting from this project can be applied to systems beyond our immediate scope and will be applicable to future scaling. The thermal-aware dynamic computing paradigm will impact the efficiency of extreme-scale systems. The gained “thermal slack” can be given back to further tighten the cooling budget, benefiting the management cost of next generation extreme-scale systems.

97 MATHEMATICS AND COMPUTING↗

Best Practices and Lessons Learned from Deploying and Operating Large-Scale Data-Centric Parallel File Systems, In: SC '14: Proceedings of the International Conference for High Performance Computing, Networking, Storage and Analysis

The Oak Ridge Leadership Computing Facility (OLCF) has deployed multiple large-scale parallel file systems (PFS) to support its operations. During this process, OLCF acquired significant expertise in large-scale storage system design, file system software development, technology evaluation, benchmarking, procurement, deployment, and operational practices. Based on the lessons learned from each new PFS deployment, OLCF improved its operating procedures, and strategies. This paper provides an account of our experience and lessons learned in acquiring, deploying, and operating large-scale parallel file systems. We believe that these lessons will be useful to the wider HPC community.

Computer Science↗

Logic operations with active topological defects

Logic operations performed by semiconductor-based transistors are the basis of modern computing. There is considerable interest in creating autonomous materials systems endowed with the capability to make decisions. In this work, we introduce the concept of using topological defects in active matter to perform logic operations. When an extensile active stress in a nematic liquid crystal is turned on, +1/2 defects can self-propel, in analogy to electron transport under a voltage gradient. By relying on hydrodynamic simulations of active nematics, we demonstrate that patterns of activity, when combined with surfaces imparting certain orientations, can be used to control the formation and transport of +1/2 defects. We further show that asymmetric high- and low-activity patterns can be used to create effective defect gates, tunnels, and amplifiers. The proposed active systems offer the potential to perform computations and transmit information in active soft materials, including actin-, tubulin-, and cell-based systems.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗

Condensation in horizontal heat exchanger tubes

Many innovative reactor concepts for Generation III nuclear power plants use passive safety equipment for residual heat removal. These systems use two phase natural circulation. Heat transfer to the coolant results in a density difference providing the driving head for the required mass flow. By balancing the pressure drop the system finds its operational mode. Therefore the systems depend on a strong link between heat transfer and pressure drop determining the mass flow through the system. In order to be able to analyze these kind of systems with the help of state of the art computer codes the implemented numerical models for heat transfer, pressure drop or two phase flow structure must be able to predict the system performance in a wide parameter range. Goal of the program is to optimize the numerical models and therefore the performance of computer codes analyzing passive systems. Within the project the heat transfer capacity of a heat exchanger tube will be investigated. Therefore the tube will be equipped with detectors, both temperature and pressure, in several directions perpendicular to the tube axis to be able to resolve the angular heat transfer. In parallel the flow structure of a two phase flow inside and along the tube will be detected with the help of x-ray tomography. The water cooling outside of the tube will be realized by forced convection. It will be possible to combine the flow structure measurement with an angular resolved heat transfer for a wide parameter range. The test rig is set up at the TOPLFOW facility at the Helmholtz-Zentrum Dresden-Rossendorf (HZDR), so that it will be possible to vary the pressure between 5 and 70 bar. The steam mass content will be varied between 0 and 100 percent. The results will be compared to the large scaled Emergency Condenser Tests performed at the INKA test facility in Karlstein (Germany). The paper will explain the test setup and the status of the project will be presented. (authors)

22 GENERAL STUDIES OF NUCLEAR REACTORS↗

Using cross-layer adaptations for dynamic data management in large scale coupled scientific workflows, In: SC '13 Proceedings of the International Conference on High Performance Computing, Networking, Storage and Analysis

As system scales and application complexity grow, managing and processing simulation data has become a significant challenge. While recent approaches based on data staging and in-situ/in-transit data processing are promising, dynamic data volumes and distributions, such as those occurring in AMR-based simulations, make the efficient use of these techniques challenging. In this paper we propose cross-layer adaptations that address these challenges and respond at runtime to dynamic data management requirements. Specifically we explore (1) adaptations of the spatial resolution at which the data is processed, (2) dynamic placement and scheduling of data processing kernels, and (3) dynamic allocation of in-transit resources. We also exploit coordinated approaches that dynamically combine these adaptations at the different layers. We evaluate the performance of our adaptive cross-layer management approach on the Intrepid IBM-BlueGene/P and Titan Cray-XK7 systems using Chombo-based AMR applications, and demonstrate its effectiveness in improving overall time-to-solution and increasing resource efficiency.

Computer Science↗

End-System Network Interface Controller for 100 Gb/s Wide Area Networks: Final Report

In recent years, network bandwidth requirements have scaled multiple folds, pushing the need for the development of data exchange mechanisms at 100 Gb/s and beyond. High performance computing, climate modeling, large-scale storage, and collaborative scientific research are examples of applications that can greatly benefit by leveraging high bandwidth capabilities of the order of 100 Gb/s. Such requirements and advances in IEEE Ethernet standards, Optical Transport Unit4 (OTU4), and host-system interconnects demand a network infrastructure supporting throughput rates of the order of 100 Gb/s with a single wavelength. To address such a demand Acadia Optronics in collaboration with the University of New Mexico, proposed and developed a end-system Network Interface Controller (NIC) for the 100Gbps WANs. Acadia’s 100G NIC employs an FPGA based system with a high-performance processor interconnect (PCIe 3.0) and a high capacity optical transmission link (CXP) to provide data transmission at the rate of 100 Gbps.

100 Gb/s network interface controller↗

An Integrated High-performance Computing and Digital Real-time Simulation Testbed to Benchmark Closed-loop Load Shedding Algorithms in Power Systems

An integrated testbed using digital real-time simulator (DRTS) and a high-performance computing (HPC) cluster is presented here to compare speed and performance of computational schemes to mitigate time-critical issues in electric power systems. The first approach in this testbed validation is taken by running a set of closed-loop load shedding algorithms to compare and contrast two paradigms of arresting cascading failure propagation. Two algorithms involve solving DC and AC power flow model-based optimization problems to compute load shedding at different buses, while a model-based stochastic search using parallel computing provides a viable alternative. The algorithms are implemented in the DRTS-HPC testbed for the IEEE 14-bus benchmark transmission system. As a proof of the concept, simulation results are presented for implementation of closed-loop load-shedding algorithms for cascading failures in the DRTS-HPC testbed

24 POWER TRANSMISSION AND DISTRIBUTION↗

An Integrated ML/AI Framework for Digitizing, Structuring and Searching DOE U-TRU-Fuels Data with Gap Analysis of Non-DOE Records

The U.S. Department of Energy (DOE) Advanced Fuels Campaign (AFC) is advancing transmutation fuel technologies to reduce long-lived radioactive waste by converting minor actinides into shorter-lived or stable elements through irradiation in sodium-cooled fast reactors. Key experiments such as AFC-1, AFC-2, FUels for the transmutation of Trans-URanium elements In phéniX (FUTURIX)-Fortes Teneurs en Actinides (FTA), and Experimental Breeder Reactor-II (EBR-II) X501 have provided fuel fabrication, irradiation, and performance data on various transuranic-bearing fuel forms. This report documents the creation of an artificial-intelligence assisted database, which has consolidated all DOE-owned data related to Transuranic (TRU)-bearing fuel experiments and stored across it across both the Idaho National Laboratory (INL) Nuclear Data Management and Analysis System and the INL high performance computing (HPC) infrastructure. A dedicated webpage, hosted on the INL HPC system, has been developed to support role-based access and data interaction. The database architecture allows researchers to navigate large, heterogeneous archives with far greater speed and accuracy than manual search and lays the foundation for future expansion into multimodal nuclear materials analysis environments. The database represents a major step towards a nationally integrated fuels database utilizing artificial intelligence tools.

11 - NUCLEAR FUEL CYCLE AND FUEL MATERIALS↗

Comparing the Performance of Blue Gene/Q with Leading Cray XE6 and InfiniBand Systems

Abstract—Three types of systems dominate the current High Performance Computing landscape: the Cray XE6, the IBM Blue Gene, and commodity clusters using InfiniBand. These systems have quite different characteristics making the choice for a particular deployment difficult. The XE6 uses Cray’s proprietary Gemini 3-D torus interconnect with two nodes at each network endpoint. The latest IBM Blue Gene/Q uses a single socket integrating processor and communication in a 5-D torus network. InfiniBand provides the flexibility of using nodes from many vendors connected in many possible topologies. The performance characteristics of each vary vastly along with their utilization model. In this work we compare the performance of these three systems using a combination of micro-benchmarks and a set of production applications. In particular we discuss the causes of variability in performance across the systems and also quantify where performance is lost using a combination of measurements and models. Our results show that significant performance can be lost in normal production operation of the Cray XT6 and InfiniBand Clusters in comparison to Blue Gene/Q.

-High Performance Computing, Performance Evaluatio↗

Three Birds with One Stone: Improving Performance, Convergence, and System Throughput with NEST

Variational quantum algorithms (VQAs) have the potential to demonstrate quantum utility on near-term quantum computers. However, these algorithms often get executed on the highest-fidelity qubits and computers to achieve the best performance, causing low system throughput. Recent efforts have shown that VQAs can be run on low-fidelity qubits initially and high-fidelity qubits later on to still achieve good performance. We take this effort forward and show that carefully varying the qubit fidelity map of the VQA over its execution using our technique, Nest, does not just (1) improve performance (i.e., help achieve close to optimal results), but also (2) lead to faster convergence. We also use Nest to co-locate multiple VQAs concurrently on the same computer, thus (3) increasing the system throughput, and therefore, balancing and optimizing three conflicting metrics simultaneously.

qaoa↗

Advanced Scientific Computing Research Exascale Requirements Review. An Office of Science review sponsored by Advanced Scientific Computing Research, September 27-29, 2016, Rockville, Maryland

The widespread use of computing in the American economy would not be possible without a thoughtful, exploratory research and development (R&D) community pushing the performance edge of operating systems, computer languages, and software libraries. These are the tools and building blocks — the hammers, chisels, bricks, and mortar — of the smartphone, the cloud, and the computing services on which we rely. Engineers and scientists need ever-more specialized computing tools to discover new material properties for manufacturing, make energy generation safer and more efficient, and provide insight into the fundamentals of the universe, for example. The research division of the U.S. Department of Energy’s (DOE’s) Office of Advanced Scientific Computing and Research (ASCR Research) ensures that these tools and building blocks are being developed and honed to meet the extreme needs of modern science. See also http://exascaleage.org/ascr/ for additional information.

97 MATHEMATICS AND COMPUTING↗

DARMA v. Beta 0.5

DARMA is a portability layer for asynchronous many-task (AMT) runtime systems. AMT runtime systems show promise to mitigate challenges imposed by next generation high performance computing architectures. However, current runtime system technologies are not production-ready. DARMA is a portability layer that seeks to insulate application developers from idiosyncrasies of individual runtime systems, thereby facilitating application-developer use of these technologies. DARMA comprises a frontend application programming interface (API) for application developers, a backend API for runtime system developers, and a translation that translates frontend API calls into backend API calls. Application developers use C++ abstractions to annotate both data and tasks in their code. The DARMA translation layer uses C++ template metaprogramming to capture data-task dependencies, and provides this information to a potential backend runtime system via a series of backend API calls.

Hollman, David↗

Enabling Exascale Hardware and Software Design through Scalable System Virtualization (Final Report)

In this grant, we enhanced the Palacios virtual machine monitor to increase its scalability and suitability for addressing exascale system software design issues. This included a wide range of research on core Palacios features, large-scale system emulation, fault injection, perfomrance monitoring, and VMM extensibility. This research resulted in large number of high-impact publications in well-known venues, the support of a number of students, and the graduation of two Ph.D. students and one M.S. student. In addition, our enhanced version of the Palacios virtual machine monitor has been adopted as a core element of the Hobbes operating system under active DOE-funded research and development.

97 MATHEMATICS AND COMPUTING↗

NANDFlashSim: High-Fidelity, Microarchitecture-Aware NAND Flash Memory Simulation [NANDFlashSim: Intrinsic Latency Variation Aware NAND Flash Memory System Modeling and Simulation at Microarchitecture Level]

As the popularity of NAND flash expands in arenas from embedded systems to high-performance computing, a high-fidelity understanding of its specific properties becomes increasingly important. Further, with the increasing trend toward multiple-die, multiple-plane architectures and high-speed interfaces, flash memory systems are expected to continue to scale and cheapen, resulting in their broader proliferation. However, when designing NAND-based devices, making decisions about the optimal system configuration is nontrivial, because flash is sensitive to a number of parameters and suffers from inherent latency variations, and no available tools suffice for studying these nuances. The parameters include the architectures, such as multidie and multiplane, diverse node technologies, bit densities, and cell reliabilities. Therefore, we introduce NANDFlashSim, a high-fidelity, latency-variation-aware, and highly configurable NAND-flash simulator, which implements a detailed timing model for 16 state-of-the-art NAND operations. Using NANDFlashSim, we notably discover the following. First, regardless of the operation, reads fail to leverage internal parallelism. Second, MLC provides lower I/O bus contention than SLC, but contention becomes a serious problem as the number of dies increases. Third, many-die architectures outperform many-plane architectures for disk-friendly workloads. Lastly, employing a high-performance I/O bus or an increased page size does not enhance energy savings.

97 MATHEMATICS AND COMPUTING↗

Runtime Systems for Energy Efficiency in Advanced Computing Systems

As heterogeneous systems become increasingly popular for both mobile and high-performance computing, conventional efficiency techniques such as dynamic voltage and frequency scaling (DVFS) fail to account for the tightly coupled and varied nature of systems on a chip (SoCs). In this work, we explore the impact of system unaware DVFS techniques on a mobile SoC under three benchmark suites: Chai, Rodinia, and Antutu. We then analyze performance trends across the suites to identify a set of consistent operating points that optimally balance power and performance across the system. The consistent operating points are then constructed into a dependency graph which can be leveraged to produce a more effective, SoC-wide governor.

97 MATHEMATICS AND COMPUTING↗

Data Movement Dominates: Final Report

Over the past three years in this project, what we have observed is that the primary reason for data movement in large-scale systems is that the per-node capacity is not large enough—i.e., one of the solutions to the data-movement problem (certainly not the only solution that is required, but a significant one nonetheless) is to increase per-node capacity so that inter-node traffic is reduced. This unfortunately is not as simple as it sounds. Today’s main memory systems for datacenters, enterprise computing systems, and supercomputers, fail to provide high per-socket capacity [Dirik & Jacob 2009; Cooper-Balis et al. 2012], except at extremely high price points (factors of 10–100x the cost/bit of consumer main-memory systems) [Stokes 2008]. The reason is that our choice of technology for today’s main memory systems—i.e., DRAM, which we have used as a main-memory technology since the 1970s [Jacob et al. 2007]—can no longer keep up with our needs for density and price per bit. Main memory systems have always been built from the cheapest, densest, lowest-power memory technology available, and DRAM is no longer the cheapest, the densest, nor the lowest-power storage technology out there. It is now time for DRAM to go the way that SRAM went: move out of the way for a cheaper, slower, denser storage technology, and become a cache instead. This inflection point has happened before, in the context of SRAM yielding to DRAM. There was once a time that SRAM was the storage technology of choice for all main memories [Tomasulo 1967; Thornton 1970; Kidder 1981]. However, once DRAM hit volume production in the 1970s and 80s, it supplanted SRAM as a main memory technology because it was cheaper, and it was denser. It also happened to be lower power, but that was not the primary consideration of the day. At the time, it was recognized that DRAM was much slower than SRAM, but it was only at the supercomputer level (For instance the Cray X-MP in the 1980s and its follow-on, the Cray Y-MP, in the 1990s) that could one afford to build ever- larger main memories out of SRAM—the reasoning for moving to DRAM was that an appropriately designed memory hierarchy, built of DRAM as main memory and SRAM as a cache, would approach the performance of SRAM, at the price-per-bit of DRAM [Mashey 1999]. Today it is quite clear that, were one to build an entire multi-gigabyte main memory out of SRAM instead of DRAM, one could improve the performance of almost any computer system by up to an order of magnitude—but this option is not even considered, because to build that system would be prohibitively expensive. It is now time to revisit the same design choice in the context of modern technologies and modern systems. For reasons both technical and economic, we can no longer afford to build ever-larger main memory systems out of DRAM. Flash memory, on the other hand, is significantly cheaper and denser than DRAM and therefore should take its place. While it is true that flash is significantly slower than DRAM, one can afford to build much larger main memories out of flash than out of DRAM, and we show that an appropriately designed memory hierarchy, built of flash as main memory and DRAM as a cache, will approach the performance of DRAM, at the price-per-bit of flash. In our studies as part of this project, we have investigated Non-Volatile Main Memory (NVMM), a new main-memory architecture for large-scale computing systems, one that is specifically designed to address the weaknesses described previously. In particular, it provides the following features: non-volatility: The bulk of the storage is comprised of NAND flash, and in this organization DRAM is used only as a cache, not as main memory. Furthermore, the flash is journaled, which means that operations such as checkpoint/restore are already built into the system. 1+ terabytes of storage per socket: SSDs and DRAM DIMMs have roughly the same form factor (several square inches of PCB surface area), and terabyte SSDs are now commonplace. performance approaching that of DRAM: DRAM is used as a cache to the flash system. price-per-bit approaching that of NAND: Flash is currently well under $0.50 per gigabyte; DDR3 SDRAM is currently just over $10 per gigabyte [Newegg 2014]. Even today, one can build an easily affordable main memory system with a terabyte or more of NAND storage per CPU socket (which would be extremely expensive were one to use DRAM), and our cycle- accurate, full-system experiments show that this can be done at a performance point that lies within a factor of two of DRAM.

96 KNOWLEDGE MANAGEMENT AND PRESERVATION↗

Efficient Memory Access with NumPy Global Arrays using Local Memory Access

This paper discusses the work completed working with Global Arrays of data on distributed multi-computer systems and improving their performance. The tasks completed were done at Pacific Northwest National Laboratory in the Science Undergrad Laboratory Internship program in the summer of 2013 for the Data Intensive Computing Group in the Fundamental and Computational Sciences DIrectorate. This work was done on the Global Arrays Toolkit developed by this group. This toolkit is an interface for programmers to more easily create arrays of data on networks of computers. This is useful because scientific computation is often done on large amounts of data sometimes so large that individual computers cannot hold all of it. This data is held in array form and can best be processed on supercomputers which often consist of a network of individual computers doing their computation in parallel. One major challenge for this sort of programming is that operations on arrays on multiple computers is very complex and an interface is needed so that these arrays seem like they are on a single computer. This is what global arrays does. The work done here is to use more efficient operations on that data that requires less copying of data to be completed. This saves a lot of time because copying data on many different computers is time intensive. The way this challenge was solved is when data to be operated on with binary operations are on the same computer, they are not copied when they are accessed. When they are on separate computers, only one set is copied when accessed. This saves time because of less copying done although more data access operations were done.

Daily, Jeffrey A.↗

The Archive Solution for Distributed Workflow Management Agents of the CMS Experiment at LHC

The CMS experiment at the CERN LHC developed the Workflow Management Archive system to persistently store unstructured framework job report documents produced by distributed workflow management agents. In this paper we present its architecture, implementation, deployment, and integration with the CMS and CERN computing infrastructures, such as central HDFS and Hadoop Spark cluster. The system leverages modern technologies such as a document oriented database and the Hadoop eco-system to provide the necessary flexibility to reliably process, store, and aggregate $\mathcal{O}$(1M) documents on a daily basis. We describe the data transformation, the short and long term storage layers, the query language, along with the aggregation pipeline developed to visualize various performance metrics to assist CMS data operators in assessing the performance of the CMS computing system.

72 PHYSICS OF ELEMENTARY PARTICLES AND FIELDS↗