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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.
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Encoding hierarchical 3D architecture through inverse design of programmable bonds
The ability to fabricate materials and devices at small scales by design has resulted in tremendous technological progress. However, the need for engineered three-dimensional (3D) nanoscale materials requires new strategies for organizing nanocomponents. Here we demonstrate an inverse design approach for the assembly of nanoparticles into hierarchically ordered 3D organizations using DNA voxels with directional, addressable bonds. By identifying intrinsic symmetries in repeating mesoscale structural motifs, we prescribe a set of voxels, termed a mesovoxel, that are assembled into target 3D crystals. The relationship between different degrees of encoded information used for voxel bonds and the fidelity of assembly is investigated using experimental and computational methods. We apply this assembly strategy to create periodic 3D nanoparticle ordered organizations, including structures with low-dimensional elements, helical motifs, a nanoscale analogue of a face-centred perovskite crystal and a distributed Bragg reflector based on a crystal with plasmonic and photonic length-scale regimes.
Electrode architecture and the design of reactive interfaces
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Architecture for VLSI design of Reed-Solomon encoders
The logic structure of a universal VLSI chip called the symbol-slice Reed-Solomon (RS) encoder chip is discussed. An RS encoder can be constructed by cascading and properly interconnecting a group of such VLSI chips. As a design example, it is shown that a (255,223) RD encoder requiring around 40 discrete CMOS ICs may be replaced by an RS encoder consisting of four identical interconnected VLSI RS encoder chips. Besides the size advantage, the VLSI RS encoder also has the potential advantages of requiring less power and having a higher reliability.
Architecture for VLSI design of Reed-Solomon encoders
A description is given of the logic structure of the universal VLSI symbol-slice Reed-Solomon (RS) encoder chip, from a group of which an RS encoder may be constructed through cascading and proper interconnection. As a design example, it is shown that an RS encoder presently requiring approximately 40 discrete CMOS ICs may be replaced by an RS encoder consisting of four identical, interconnected VLSI RS encoder chips, offering in addition to greater compactness both a lower power requirement and greater reliability.
Artificial intelligence and design: Opportunities, research problems and directions
The issues of industrial productivity and economic competitiveness are of major significance in the U.S. at present. By advancing the science of design, and by creating a broad computer-based methodology for automating the design of artifacts and of industrial processes, we can attain dramatic improvements in productivity. It is our thesis that developments in computer science, especially in Artificial Intelligence (AI) and in related areas of advanced computing, provide us with a unique opportunity to push beyond the present level of computer aided automation technology and to attain substantial advances in the understanding and mechanization of design processes. To attain these goals, we need to build on top of the present state of AI, and to accelerate research and development in areas that are especially relevant to design problems of realistic complexity. We propose an approach to the special challenges in this area, which combines 'core work' in AI with the development of systems for handling significant design tasks. We discuss the general nature of design problems, the scientific issues involved in studying them with the help of AI approaches, and the methodological/technical issues that one must face in developing AI systems for handling advanced design tasks. Looking at basic work in AI from the perspective of design automation, we identify a number of research problems that need special attention. These include finding solution methods for handling multiple interacting goals, formation problems, problem decompositions, and redesign problems; choosing representations for design problems with emphasis on the concept of a design record; and developing approaches for the acquisition and structuring of domain knowledge with emphasis on finding useful approximations to domain theories. Progress in handling these research problems will have major impact both on our understanding of design processes and their automation, and also on several fundamental questions that are of intrinsic concern to AI. We present examples of current AI work on specific design tasks, and discuss new directions of research, both as extensions of current work and in the context of new design tasks where domain knowledge is either intractable or incomplete. The domains discussed include Digital Circuit Design, Mechanical Design of Rotational Transmissions, Design of Computer Architectures, Marine Design, Aircraft Design, and Design of Chemical Processes and Materials. Work in these domains is significant on technical grounds, and it is also important for economic and policy reasons.
MAST Propellant and Delivery System Design Methods
A Mars Aerospace Taxi (MAST) concept and propellant storage and delivery case study is undergoing investigation by NASA's Element Design and Architectural Impact (EDAI) design and analysis forum. The MAST lander concept envisions landing with its ascent propellant storage tanks empty and supplying these reusable Mars landers with propellant that is generated and transferred while on the Mars surface. The report provides an overview of the data derived from modeling between different methods of propellant line routing (or "lining") and differentiate the resulting design and operations complexity of fluid and gaseous paths based on a given set of fluid sources and destinations. The EDAI team desires a rough-order-magnitude algorithm for estimating the lining characteristics (i.e., the plumbing mass and complexity) associated different numbers of vehicle propellant sources and destinations. This paper explored the feasibility of preparing a mathematically sound algorithm for this purpose, and offers a method for the EDAI team to implement.
Galaxy Evolution Spectroscopic Explorer (GESE): Science Rationale, Optical Design, and Telescope Architecture
One of the key goals of NASA’s astrophysics program is to answer the question: How did galaxies evolve into the spiral, elliptical, and irregular galaxies that we see today? We describe a space mission concept called Galaxy Evolution Spectroscopic Explorer (GESE) to help address this question by making a large ultraviolet spectroscopic survey of galaxies at a redshift, z approximately 1 (look-back time of approximately 8 billion years). GESE is a 1.5-m space telescope with an near-ultraviolet (NUV) multi-object slit spectrograph covering the spectral range, 0.2-0.4 micrometers (0.1-0.2 micrometers as emitted by galaxies at a redshift, z approximately 1) at a spectral resolution of delta lambda=6 A.
Designing a Software Architecture for the Precision Assembly of Space Structures
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Generic Divide and Conquer Internet-Based Computing
The rapid growth of internet-based applications and the proliferation of networking technologies have been transforming traditional commercial application areas as well as computer and computational sciences and engineering. This growth stimulates the exploration of new, internet-oriented software technologies that can open new research and application opportunities not only for the commercial world, but also for the scientific and high -performance computing applications community. The general goal of this research project is to contribute to better understanding of the transition to internet-based high -performance computing and to develop solutions for some of the difficulties of this transition. More specifically, our goal is to design an architecture for generic divide and conquer internet-based computing, to develop a portable implementation of this architecture, to create an example library of high-performance divide-and-conquer computing agents that run on top of this architecture, and to evaluate the performance of these agents. We have been designing an architecture that incorporates a master task-pool server and utilizes satellite computational servers that operate on the Internet in a dynamically changing large configuration of lower-end nodes provided by volunteer contributors. Our designed architecture is intended to be complementary to and accessible from computational grids such as Globus, Legion, and Condor. Grids provide remote access to existing high-end computing resources; in contrast, our goal is to utilize idle processor time of lower-end internet nodes. Our project is focused on a generic divide-and-conquer paradigm and its applications that operate on a loose and ever changing pool of lower-end internet nodes.
Design of Defensive Cybersecurity Architectures for High Temperature, Gas-Cooled Reactors
This report presents the design of defensive cybersecurity architectures (DCSAs) for High Temperature, Gas-Cooled Reactors (HTGRs). A DCSA is a cybersecurity design feature that places systems into security zones in a graded approach according to the importance of the functions performed by the systems. DCSA design efforts for advanced reactors may commence as early as the system-level design phase. This design approach is consistent with the draft regulatory guide for advanced reactor cybersecurity programs (DG-5075) and enables advanced reactor designers to consider the effects of security-by-design (SeBD) features on their DCSAs. Integration of DCSA design and other cybersecurity activities with the traditional design process as part of a SeBD framework may enable advanced reactor designers to improve the security posture of their plants while reducing implementation and operating costs. This report provides a DCSA template for an exemplar HTGR and describes a DCSA design process using event tree analysis so that the template may be optimized for a given HTGR design.
The Flexible Lunar Architecture for Exploration (FLARE): Designed for the Artemis-3 Moon 2024 Mission and Beyond
The Flexible Lunar Architecture for Exploration (FLARE) is a concept to deliver four crew to the lunar surface for 7 to 14 days and then return them safely to Earth by 2024. This meets NASA’s internal 2024 lunar landing deadline directed by President Trump (Trump, 2017) and the “5-year” goal set forth by Vice President Pence (Pence, 2019). FLARE is an alternative to NASA’s Human Landing System reference architecture from the Design Analysis Cycle (DAC) #2 (NASA, 2019b). The minimum FLARE concept uses one Space Launch System launch, one Orion, one European Service Module (ESM), and one human lander to deliver four crew to the Moon for a minimum surface duration of 7 days and return them to Earth. FLARE adds a new capability, called the SpaceTug, based upon the mature and successful United Launch Alliance “Common” Centaur Upper Stage vehicle, with modifications. In FLARE, the SpaceTug provides propulsion needed to return the Orion+ESM from the Moon to Earth. The SpaceTug also provides propulsion to deliver the human lander Descent Element (DE) and Ascent Element (AE) separately to lunar orbit. The Orion+ESM then completes a rendezvous with the mated DE+AE in lunar orbit. FLARE also offers optional phases to the Moon 2024 mission. The SpaceTug can also deliver components of the planned Gateway - including the Power and Propulsion Element and the Habitation and Logistics Outpost - to lunar orbit; however, the planned FLARE destination is a Low Lunar Frozen Polar Orbit unlike the NASA DAC2 plan for a Near Rectilinear Halo Orbit. FLARE also provides an option to deliver precursor equipment - including a habitation module, crew mobility devices and an In-Situ Resource Utilization demonstration - to the lunar surface for enhanced crew exploration and science with the extended 14-day surface mission.
An Object Oriented Extensible Architecture for Affordable Aerospace Propulsion Systems
Driven by a need to explore and develop propulsion systems that exceeded current computing capabilities, NASA Glenn embarked on a novel strategy leading to the development of an architecture that enables propulsion simulations never thought possible before. Full engine 3 Dimensional Computational Fluid Dynamic propulsion system simulations were deemed impossible due to the impracticality of the hardware and software computing systems required. However, with a software paradigm shift and an embracing of parallel and distributed processing, an architecture was designed to meet the needs of future propulsion system modeling. The author suggests that the architecture designed at the NASA Glenn Research Center for propulsion system modeling has potential for impacting the direction of development of affordable weapons systems currently under consideration by the Applied Vehicle Technology Panel (AVT).
Impacts on High-level Systems-of-Systems Figures of Merit due to Integrated Architecture Sizing and Technology Evaluation at the Subsystem-Level
Understanding the impacts on high-level system-of-systems (SOS) figures of merit (FOMs) due to the design of architectures and technologies is critical in providing decision makers sufficient information in selecting suitable alternatives in an effort to reduce costly financial and schedule overruns. Several techniques exist within academia and industry for performing SOS architecture design and technology evaluation. However, these techniques fail to solve the problem in an integrated fashion when defined at the subsystem-level. In order to understand the impacts on high-level SOS FOMs due to integrated architecture sizing and technology evaluation, a general concept exploration process is utilized to perform a notional 2033 manned Mars fly by study. The notional study draws out observation with regard to specific FOMs traditionally used during the subsystem-level sizing and technology evaluation processes which can result in misleading conclusions regarding the overall SOS design. Furthermore, these observations suggest that selection of FOMs for the subsystems of an architecture should be influenced by the desired objectives of the high-level SOS objectives and FOMs.
DFT algorithms for bit-serial GaAs array processor architectures
Systems and Processes Engineering Corporation (SPEC) has developed an innovative array processor architecture for computing Fourier transforms and other commonly used signal processing algorithms. This architecture is designed to extract the highest possible array performance from state-of-the-art GaAs technology. SPEC's architectural design includes a high performance RISC processor implemented in GaAs, along with a Floating Point Coprocessor and a unique Array Communications Coprocessor, also implemented in GaAs technology. Together, these data processors represent the latest in technology, both from an architectural and implementation viewpoint. SPEC has examined numerous algorithms and parallel processing architectures to determine the optimum array processor architecture. SPEC has developed an array processor architecture with integral communications ability to provide maximum node connectivity. The Array Communications Coprocessor embeds communications operations directly in the core of the processor architecture. A Floating Point Coprocessor architecture has been defined that utilizes Bit-Serial arithmetic units, operating at very high frequency, to perform floating point operations. These Bit-Serial devices reduce the device integration level and complexity to a level compatible with state-of-the-art GaAs device technology.
Computational architecture for integrated controls and structures design
To facilitate the development of control structure interaction (CSI) design methodology, a computational architecture for interdisciplinary design of active structures is presented. The emphasis of the computational procedure is to exploit existing sparse matrix structural analysis techniques, in-core data transfer with control synthesis programs, and versatility in the optimization methodology to avoid unnecessary structural or control calculations. The architecture is designed such that all required structure, control and optimization analyses are performed within one program. Hence, the optimization strategy is not unduly constrained by cold starts of existing structural analysis and control synthesis packages.