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At least 523 records · Page 29
All sourcesNASA NTRSDOE OSTI
NASA NTRS1983

High-temperature optically activated GaAs power switching for aircraft digital electronic control

Gallium arsenide high-temperature devices were fabricated and assembled into an optically activated pulse-width-modulated power control for a torque motor typical of the kinds used in jet engine actuators. A bipolar heterojunction phototransistor with gallium aluminum arsenide emitter/window, a gallium arsenide junction field-effect power transistor and a gallium arsenide transient protection diode were designed and fabricated. A high-temperature fiber optic/phototransistor coupling scheme was implemented. The devices assembled into the demonstrator were successfully tested at 250 C, proving the feasibility of actuator-located switching of control power using optical signals transmitted by fibers. Assessments of the efficiency and technical merits were made for extension of this high-temperature technology to local conversion of optical power to electrical power and its control at levels useful for driving actuators. Optical power sources included in the comparisons were an infrared light-emitting diode, an injection laser diode, tungsten-halogen lamps and arc lamps. Optical-to-electrical power conversion was limited to photovoltaics located at the actuator. Impedance matching of the photovoltaic array to the load was considered over the full temperature range, -55 C to 260 C. Loss of photovoltaic efficiency at higher temperatures was taken into account. Serious losses in efficiency are: (1) in the optical source and the cooling which they may require in the assumed 125 C ambient, (2) in the decreased conversion efficiency of the gallium arsenide photovoltaic at 260 C, and (3) in impedance matching. Practical systems require improvements in these areas.

Berak, J. M.↗
NASA NTRS2008

Current Leakage Evolution in Partially Gate Raptured Power MOSFETs

It has been observed that power MOSFETs can experience an SEGR and continue to function with altered parameters. We propose that there are three different types of SEGR modes; the micro-break, the thermal runaway, and the avalanche breakdown. Data that demonstrates these stages of device failure are presented as well as a proposed model for the micro-break. Brief discussions of the other modes, based on analysis combined with our interpretations of the older literature, are also given.

metal oxide semiconductor field-effect transistors↗
NASA NTRS2010

Miniature MMIC Low Mass/Power Radiometer Modules for the 180 GHz GeoSTAR Array

We have developed and demonstrated miniature 180 GHz Monolithic Microwave Integrated Circuit (MMIC) radiometer modules that have low noise temperature, low mass and low power consumption. These modules will enable the Geostationary Synthetic Thinned Aperture Radiometer (GeoSTAR) of the Precipitation and All-weather Temperature and Humidity (PATH) Mission for atmospheric temperature and humidity profiling. The GeoSTAR instrument has an array of hundreds of receivers. Technology that was developed included Indium Phosphide (InP) MMIC Low Noise Amplifiers (LNAs) and second harmonic MMIC mixers and I-Q mixers, surface mount Multi-Chip Module (MCM) packages at 180 GHz, and interferometric array at 180 GHz. A complete MMIC chip set for the 180 GHz receiver modules (LNAs and I-Q Second harmonic mixer) was developed. The MMIC LNAs had more than 50% lower noise temperature (NT=300K) than previous state-of-art and MMIC I-Q mixers demonstrated low LO power (3 dBm). Two lots of MMIC wafers were processed with very high DC transconductance of up to 2800 mS/mm for the 35 nm gate length devices. Based on these MMICs a 180 GHz Multichip Module was developed that had a factor of 100 lower mass/volume (16x18x4.5 mm3, 3g) than previous generation 180 GHz receivers.

Monolithic Microwave Integrated Circuit (MMIC)↗
NASA NTRS2013

Impact of Total Ionizing Dose Radiation Testing and Long-Term Thermal Cycling on the Operation of CMF20120D Silicon Carbide Power MOSFET

Power systems designed for use in NASA space missions are required to work reliably under harsh conditions including radiation, thermal cycling, and extreme temperature exposures. Silicon carbide devices show great promise for use in future power electronics systems, but information pertaining to performance of the devices in the space environment is very scarce. A silicon carbide N-channel enhancement-mode power MOSFET called the CMF20120 is of interest for use in space environments. Samples of the device were exposed to radiation followed by long-term thermal cycling to address their reliability for use in space applications. The results of the experimental work are presentd and discussed.

thermal cycling tests↗
NASA NTRS1993

On-Chip p-MOSFET Dosimetry

On-chip p-FETs were developed to monitor the radiation dose of n-well CMOS ICs by monitoring threshold voltage shifts due to radiation induced oxide and interface charge.

FETs↗
NASA NTRS2003

High Electron Mobility SiGe/Si Transistor Structures on Sapphire Substrates

SiGe/Si n-type modulation doped field effect structures and transistors (n-MODFETs) have been fabricated on r-plane sapphire substrates. The structures were deposited using molecular beam epitaxy, and antimony dopants were incorporated via a delta doping process. Secondary ion mass spectroscopy (SIMS) indicates that the peak antimony, concentration was approximately 4 x 10(exp19) per cubic cm. The electron mobility was over 1,200 and 13,000 sq cm/V-sec at room temperature and 0.25 K, respectively. At these two temperatures, the electron carrier densities were 1.6 and 1.33 x 10(exp 12) per sq cm, thus demonstrating that carrier confinement was excellent. Shubnikov-de Haas oscillations were observed at 0.25 K, thus confirming the two-dimensional nature of the carriers. Transistors, with gate lengths varying from 1 micron to 5 microns, were fabricated using these structures and dc characterization was performed at room temperature. The saturated drain current region extended over a wide source-to-drain voltage (V(sub DS)) range, with (V(sub DS)) knee voltages of approximately 0.5 V and increased leakage starting at voltages slightly higher than 4 V.

Alterovitz, Samuel A.↗
NASA NTRS2004

High Electron Mobility SiGe/Si Transistor Structures on Sapphire Substrates

SiGe/Si n-type modulation doped field effect structures and transistors (n-MODFETs) have been fabricated on r-plane sapphire substrates. The structures were deposited using molecular beam epitaxy, and antimony dopants were incorporated via a delta doping process. Secondary ion mass spectroscopy (SIMS) indicates that the peak antimony concentration was approximately 4 x 10(exp 19) per cubic centimeter. At these two temperatures, the electron carrier densities were 1.6 and 1.33 x 10(exp 12) per square centimeter, thus demonstrating that carrier confinement was excellent. Shubnikov-de Haas oscillations were observed at 0.25 K, thus confirming the two-dimensional nature of the carriers. Transistors, with gate lengths varying from 1 micron to 5 microns, were fabricated using these structures and dc characterization was performed at room temperature. The saturated drain current region extended over a wide source-to-drain voltage (V (sub DS)) range, with V (sub DS) knee voltages of approximately 0.5 V and increased leakage starting at voltages slightly higher than 4 V.

Alterovitz, Samuel A.↗
NASA NTRS2004

High Mobility SiGe/Si n-MODFET Structures and Devices on Sapphire Substrates

Si/Ge/Si n-type modulation doped field effect structures and transistors (n-MODFET's) have been fabricated on r-plane sapphire substrates. Mobilities as high as 1380 cm(exp 2)/Vs were measured at room temperature. Excellent carrier confinement was shown by Shubnikov-de Haas measurements. Atomic force microscopy indicated smooth surfaces, with rm's roughness less than 4 nm, similar to the quality of SiGe/Si n-MODFET structures made on Si substrates. Transistors with 2 micron gate lengths and 200 micron gate widths were fabricated and tested.

Mueller, Carl↗
NASA NTRS2011

High-Tc Superconducting Bolometer Noise Measurement Using Low Noise Transformers - Theory and Optimization

Care must always be taken when performing noise measurements on high-Tc superconducting materials to ensure that the results are not from the measurement system itself. One situation likely to occur is with low noise transformers. One of the least understood devices, it provides voltage gain for low impedance inputs (< 100 ), e.g., YBaCuO and GdBaCuO thin films, with comparatively lower noise levels than other devices for instance field effect and bipolar junction transistors. An essential point made in this paper is that because of the complex relationships between the transformer ports, input impedance variance alters the transformer s transfer function in particular, the low frequency cutoff shift. The transfer of external and intrinsic transformer noise to the output along with optimization and precautions are treated; all the while, we will cohesively connect the transfer function shift, the load impedance, and the actual noise at the transformer output.

Aslam, Shahid↗
NASA NTRS2004

EHW Approach to Temperature Compensation of Electronics

Efforts are under way to apply the concept of evolvable hardware (EHW) to compensate for variations, with temperature, in the operational characteristics of electronic circuits. To maintain the required functionality of a given circuit at a temperature above or below the nominal operating temperature for which the circuit was originally designed, a new circuit would be evolved; moreover, to obtain the required functionality over a very wide temperature range, there would be evolved a number of circuits, each of which would satisfy the performance requirements over a small part of the total temperature range. The basic concepts and some specific implementations of EHW were described in a number of previous NASA Tech Briefs articles, namely, "Reconfigurable Arrays of Transistors for Evolvable Hardware" (NPO-20078), Vol. 25, No. 2 (February 2001), page 36; Evolutionary Automated Synthesis of Electronic Circuits (NPO- 20535), Vol. 26, No. 7 (July 2002), page 37; "Designing Reconfigurable Antennas Through Hardware Evolution" (NPO-20666), Vol. 26, No. 7 (July 2002), page 38; "Morphing in Evolutionary Synthesis of Electronic Circuits" (NPO-20837), Vol. 26, No. 8 (August 2002), page 31; "Mixtrinsic Evolutionary Synthesis of Electronic Circuits" (NPO-20773) Vol. 26, No. 8 (August 2002), page 32; and "Synthesis of Fuzzy-Logic Circuits in Evolvable Hardware" (NPO-21095) Vol. 26, No. 11 (November 2002), page 38. To recapitulate from the cited prior articles: EHW is characterized as evolutionary in a quasi-genetic sense. The essence of EHW is to construct and test a sequence of populations of circuits that function as incrementally better solutions of a given design problem through the selective, repetitive connection and/or disconnection of capacitors, transistors, amplifiers, inverters, and/or other circuit building blocks. The connection and disconnection can be effected by use of field-programmable transistor arrays (FPTAs). The evolution is guided by a search-andoptimization algorithm (in particular, a genetic algorithm) that operates in the space of possible circuits to find a circuit that exhibits an acceptably close approximation of the desired functionality. The evolved circuits can be tested by mathematical modeling (that is, computational simulation) only, tested in real hardware, or tested in combinations of computational simulation and real hardware.

Stoica, Adrian↗
NASA NTRS2005

Characterization and recovery of Deep Sub Micron (DSM) technologies behavior under radiation

This paper serves a twofold purpose: characterize the behavior of a reconfigurable chip exposed to radiation; and demonstrate a method for functionality recovery due to Total Ionizing Dose (TID) effects. The experiments are performed using a PL developed reconfigurable device, a Field Programmable Transistor Array (FPTA). The paper initially describes experiments on the characterization of the NMOS transistor behavior for TID values up to 300krad. The behavior of analog and digital circuits downloaded onto the FPTA chip is also assessed for TID effects. This paper also presents a novel approach for circuit functionality recovery due to radiation effects based on Evolvable Hardware. The key idea is to reconfigure a programmable device, in-situ, to compensate, or bypass its degraded or damaged components. Experiments with total radiation dose up to 300kRad show that while the functionality of a variety of circuits, including digital gates, a rectifier and a Digital to Analog Converter implemented on a FPTA-2 chip is degraded/lost at levels before 200kRad, the correct functionality can be recovered through the proposed evolutionary approach and the chips are able to survive higher radiation, for several functions in excess of total radiation dose of 250kRad.

evolvable hardware↗
NASA NTRS1972

Shielded silicon gate complementary MOS integrated circuit.

An electrostatic shield for complementary MOS integrated circuits was developed to minimize the adverse effects of stray electric fields created by the potentials in the metal interconnections. The process is compatible with silicon gate technology. N-doped polycrystalline silicon was used for all the gates and the shield. The effectiveness of the shield was demonstrated by constructing a special field plate over certain transistors. The threshold voltages obtained on an oriented silicon substrate ranged from 1.5 to 3 V for either channel. Integrated inverters performed satisfactorily from 3 to 15 V, limited at the low end by the threshold voltages and at the high end by the drain breakdown voltage of the n-channel transistors. The stability of the new structure with an n-doped silicon gate as measured by the shift in C-V curve under 200 C plus or minus 20 V temperature-bias conditions was better than conventional aluminum gate or p-doped silicon gate devices, presumably due to the doping of gate oxide with phosphorous.

Lin, H. C.↗
NASA NTRS1994

Nonvolatile random access memory

A nonvolatile magnetic random access memory can be achieved by an array of magnet-Hall effect (M-H) elements. The storage function is realized with a rectangular thin-film ferromagnetic material having an in-plane, uniaxial anisotropy and inplane bipolar remanent magnetization states. The thin-film magnetic element is magnetized by a local applied field, whose direction is used to form either a 0 or 1 state. The element remains in the 0 or 1 state until a switching field is applied to change its state. The stored information is detcted by a Hall-effect sensor which senses the fringing field from the magnetic storage element. The circuit design for addressing each cell includes transistor switches for providing a current of selected polarity to store a binary digit through a separate conductor overlying the magnetic element of the cell. To read out a stored binary digit, transistor switches are employed to provide a current through a row of Hall-effect sensors connected in series and enabling a differential voltage amplifier connected to all Hall-effect sensors of a column in series. To avoid read-out voltage errors due to shunt currents through resistive loads of the Hall-effect sensors of other cells in the same column, at least one transistor switch is provided between every pair of adjacent cells in every row which are not turned on except in the row of the selected cell.

Wu, Jiin-Chuan↗
NASA NTRS1991

Non-volatile, high density, high speed, Micromagnet-Hall effect Random Access Memory (MHRAM)

The micromagnetic Hall effect random access memory (MHRAM) has the potential of replacing ROMs, EPROMs, EEPROMs, and SRAMs because of its ability to achieve non-volatility, radiation hardness, high density, and fast access times, simultaneously. Information is stored magnetically in small magnetic elements (micromagnets), allowing unlimited data retention time, unlimited numbers of rewrite cycles, and inherent radiation hardness and SEU immunity, making the MHRAM suitable for ground based as well as spaceflight applications. The MHRAM device design is not affected by areal property fluctuations in the micromagnet, so high operating margins and high yield can be achieved in large scale integrated circuit (IC) fabrication. The MHRAM has short access times (less than 100 nsec). Write access time is short because on-chip transistors are used to gate current quickly, and magnetization reversal in the micromagnet can occur in a matter of a few nanoseconds. Read access time is short because the high electron mobility sensor (InAs or InSb) produces a large signal voltage in response to the fringing magnetic field from the micromagnet. High storage density is achieved since a unit cell consists only of two transistors and one micromagnet Hall effect element. By comparison, a DRAM unit cell has one transistor and one capacitor, and a SRAM unit cell has six transistors.

Wu, Jiin C.↗
NASA NTRS2002

Rapid evolution of analog circuits configured on a field programmable transistor array

The purpose of this paper is to illustrate evolution of analog circuits on a stand-alone board-level evolvable system (SABLES). SABLES is part of an effort to achieve integrated evolvable systems. SABLES provides autonomous, fast (tens to hundreds of seconds), on-chip circuit evolution involving about 100,000 circuit evaluations. Its main components are a JPL Field Programmable Transistor Array (FPTA) chip used as transistor-level reconfigurable hardware, and a TI DSP that implements the evolutionary algorithm controlling the FPTA reconfiguration. The paper details an example of evolution on SABLES and points out to certain transient and memory effects that affect the stability of solutions obtained reusing the same piece of hardware for rapid testing of individuals during evolution.

SABLES analog circuits field programmable transist↗
NASA NTRS1979

Heavily doped transparent-emitter regions in junction solar cells, diodes, and transistors

The paper presents an analytical treatment of transparent-emitter devices, particularly solar cells, that is more complete than previously available treatments. The proposed approach includes the effects of bandgap narrowing, Fermi-Dirac statistics, built-in field due to impurity profile, and a finite surface recombination velocity at the emitter surface. It is demonstrated that the transparent-emitter model can predict experimental values of Voc observed on n(plus)-p thin diffused junction silicon solar cells made on low-resistivity (0.1 ohm-cm) substrates. A test is included for the self-consistent validity of the transparent-emitter model. This test compares the calculated transit time of minority carriers across the emitter with the Auger-impact minority-carrier lifetime within the emitter region.

Shibib, M. A.↗
NASA NTRS1971

Radiation effects on electronic parts

A search of literature concerning the long term effects of nuclear radiation on electronic parts was conducted to determine the effects of radiation fields encountered on deep space missions to parts used in the Pioneer Spacecraft. Topics discussed include: the various types of radiation the spacecraft will encounter, effects of radiation on electronic parts, and estimates of the damage thresholds for transistors and integrated circuits used on the Pioneer Spacecraft.

Johnson, W. S.↗