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At least 523 records · Page 29
All sourcesNASA NTRSDOE OSTI
NASA NTRS2005

Multifunctional Logic Gate Controlled by Temperature

A complementary metal oxide/semiconductor (CMOS) electronic circuit has been designed to function as a NAND gate at a temperature between 0 and 80 deg C and as a NOR gate at temperatures from 120 to 200 C. In the intermediate temperature range of 80 to 120 C, this circuit is expected to perform a function intermediate between NAND and NOR with degraded noise margin. The process of designing the circuit and the planned fabrication and testing of the circuit are parts of demonstration of polymorphic electronics a technological discipline that emphasizes designing the same circuit to perform different analog and/or digital functions under different conditions. In this case, the different conditions are different temperatures.

Stoica, Adrian↗
NASA NTRS2005

Multifunctional Logic Gate Controlled by Supply Voltage

A complementary metal oxide/semiconductor (CMOS) electronic circuit functions as a NAND gate at a power-supply potential (V(sub dd)) of 3.3 V and as NOR gate for V(sub dd) = 1.8 V. In the intermediate V(sub dd) range of 1.8 to 3.3 V, this circuit performs a function intermediate between NAND and NOR with degraded noise margin. Like the circuit of the immediately preceding article, this circuit serves as a demonstration of the evolutionary approach to design of polymorphic electronics -- a technological discipline that emphasizes evolution of the design of a circuit to perform different analog and/or digital functions under different conditions. In this instance, the different conditions are different values of V(sub dd).

Stoica, Adrian↗
NASA NTRS1994

Ultra Low Power Imaging Systems Using CMOS Image Sensor Technology

The need for miniaturization in advanced science sensor systems has led to the development of a new image sensor technology, the active pixel image sensor (APS). The development of CMOS APS technology allows the integration of timing and control electronics, imaging detector arrays, signal chains and analog-to-digital conversion on a single integrated circuit. The impact on the imaging system is to reduce power by approximately 1000x over existing systems - from tens of watts to tens of milliwatts.

imaging↗
NASA NTRS1995

Circuit For Control Of Electromechanical Prosthetic Hand

Proposed circuit for control of electromechanical prosthetic hand derives electrical control signals from shoulder movements. Updated, electronic version of prosthesis, that includes two hooklike fingers actuated via cables from shoulder harness. Circuit built around favored shoulder harness, provides more dexterous movement, without incurring complexity of computer-controlled "bionic" or hydraulically actuated devices. Additional harness and potentiometer connected to similar control circuit mounted on other shoulder. Used to control stepping motor rotating hand about prosthetic wrist to one of number of angles consistent with number of digital outputs. Finger-control signals developed by circuit connected to first shoulder harness transmitted to prosthetic hand via sliprings at prosthetic wrist joint.

Bozeman, Richard J., Jr.↗
NASA NTRS2011

High-Voltage-Input Level Translator Using Standard CMOS

proposed integrated circuit would translate (1) a pair of input signals having a low differential potential and a possibly high common-mode potential into (2) a pair of output signals having the same low differential potential and a low common-mode potential. As used here, "low" and "high" refer to potentials that are, respectively, below or above the nominal supply potential (3.3 V) at which standard complementary metal oxide/semiconductor (CMOS) integrated circuits are designed to operate. The input common-mode potential could lie between 0 and 10 V; the output common-mode potential would be 2 V. This translation would make it possible to process the pair of signals by use of standard 3.3-V CMOS analog and/or mixed-signal (analog and digital) circuitry on the same integrated-circuit chip. A schematic of the circuit is shown in the figure. Standard 3.3-V CMOS circuitry cannot withstand input potentials greater than about 4 V. However, there are many applications that involve low-differential-potential, high-common-mode-potential input signal pairs and in which standard 3.3-V CMOS circuitry, which is relatively inexpensive, would be the most appropriate circuitry for performing other functions on the integrated-circuit chip that handles the high-potential input signals. Thus, there is a need to combine high-voltage input circuitry with standard low-voltage CMOS circuitry on the same integrated-circuit chip. The proposed circuit would satisfy this need. In the proposed circuit, the input signals would be coupled into both a level-shifting pair and a common-mode-sensing pair of CMOS transistors. The output of the level-shifting pair would be fed as input to a differential pair of transistors. The resulting differential current output would pass through six standoff transistors to be mirrored into an output branch by four heterojunction bipolar transistors. The mirrored differential current would be converted back to potential by a pair of diode-connected transistors, which, by virtue of being identical to the input transistors, would reproduce the input differential potential at the output

Yager, Jeremy A.↗
NASA NTRS1995

Laser-Directed Ranging System Implementing Single Camera System for Telerobotics Applications

The invention relates generally to systems for determining the range of an object from a reference point and, in one embodiment, to laser-directed ranging systems useful in telerobotics applications. Digital processing techniques are employed which minimize the complexity and cost of the hardware and software for processing range calculations, thereby enhancing the commercial attractiveness of the system for use in relatively low-cost robotic systems. The system includes a video camera for generating images of the target, image digitizing circuitry, and an associated frame grabber circuit. The circuit first captures one of the pairs of stereo video images of the target, and then captures a second video image of the target as it is partly illuminated by the light beam, suitably generated by a laser. The two video images, taken sufficiently close together in time to minimize camera and scene motion, are converted to digital images and then compared. Common pixels are eliminated, leaving only a digital image of the laser-illuminated spot on the target. Mw centroid of the laser illuminated spot is dm obtained and compared with a predetermined reference point, predetermined by design or calibration, which represents the coordinate at the focal plane of the laser illumination at infinite range. Preferably, the laser and camera are mounted on a servo-driven platform which can be oriented to direct the camera and the laser toward the target. In one embodiment the platform is positioned in response to movement of the operator's head. Position and orientation sensors are used to monitor head movement. The disparity between the digital image of the laser spot and the reference point is calculated for determining range to the target. Commercial applications for the system relate to active range-determination systems, such as those used with robotic systems in which it is necessary to determine the, range to a workpiece or object to be grasped or acted upon by a robot arm end-effector in response to commands generated by an operator. In one embodiment, the system provides a real-time image of the target for the operator as the robot approaches the object. The system is also adapted for use in virtual reality systems in which a remote object or workpiece is to be acted upon by a remote robot arm or other mechanism controlled by an operator.

Wells, Dennis L.↗
DOE OSTI2022

Random Quantum Circuits

Quantum circuits—built from local unitary gates and local measurements—are a new playground for quantum many-body physics and a tractable setting to explore universal collective phenomena far from equilibrium. These models have shed light on longstanding questions about thermalization and chaos, and on the underlying universal dynamics of quantum information and entanglement. In addition, such models generate new sets of questions and give rise to phenomena with no traditional analog, such as dynamical phase transitions in quantum systems that are monitored by an external observer. Quantum circuit dynamics is also topical in view of experimental progress in building digital quantum simulators that allow control of precisely these ingredients. Randomness in the circuit elements allows a high level of theoretical control, with a key theme being mappings between real-time quantum dynamics and effective classical lattice models or dynamical processes. Many of the universal phenomena that can be identified in this tractable setting apply to much wider classes of more structured many-body dynamics.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗
NASA NTRS2008

Logic Gates Made of N-Channel JFETs and Epitaxial Resistors

Prototype logic gates made of n-channel junction field-effect transistors (JFETs) and epitaxial resistors have been demonstrated, with a view toward eventual implementation of digital logic devices and systems in silicon carbide (SiC) integrated circuits (ICs). This development is intended to exploit the inherent ability of SiC electronic devices to function at temperatures from 300 to somewhat above 500 C and withstand large doses of ionizing radiation. SiC-based digital logic devices and systems could enable operation of sensors and robots in nuclear reactors, in jet engines, near hydrothermal vents, and in other environments that are so hot or radioactive as to cause conventional silicon electronic devices to fail. At present, current needs for digital processing at high temperatures exceed SiC integrated circuit production capabilities, which do not allow for highly integrated circuits. Only single to small number component production of depletion mode n-channel JFETs and epitaxial resistors on a single substrate is possible. As a consequence, the fine matching of components is impossible, resulting in rather large direct-current parameter distributions within a group of transistors typically spanning multiples of 5 to 10. Add to this the lack of p-channel devices to complement the n-channel FETs, the lack of precise dropping diodes, and the lack of enhancement mode devices at these elevated temperatures and the use of conventional direct coupled and buffered direct coupled logic gate design techniques is impossible. The presented logic gate design is tolerant of device parameter distributions and is not hampered by the lack of complementary devices or dropping diodes. In addition to n-channel JFETs, these gates include level-shifting and load resistors (see figure). Instead of relying on precise matching of parameters among individual JFETS, these designs rely on choosing the values of these resistors and of supply potentials so as to make the circuits perform the desired functions throughout the ranges over which the parameters of the JFETs are distributed. The supply rails V(sub dd) and V(sub ss) and the resistors R are chosen as functions of the distribution of direct-current operating parameters of the group of transistors used.

Krasowski, Michael J.↗
NASA NTRS2001

Experiments on the evolution of digital to analog converters

Currently, there is a research effort in Evolvable Hardware being driven towards two purposes: the synthesis of circuits of medium to high complexity; and the design of reconfigurable architectures that facilitate the system evolvability and on-chip implementation of the evolved circuits. This work addresses these issues by describing the evolution of Digital to Analog Converters (DACs).

DACs evolvable hardware hierarchical evolution gen↗
NASA NTRS1967

Digital-to-analog converter operates from low level inputs

Circuit controls a voltage controlled oscillator from computer output binary data representing a rate at which the oscillator is to change. It operates with low level output devices such as integrated circuit registers and devices with somewhat variable output levels.

Winkelstein, R. A.↗
NASA NTRS1971

Digital parallel-to-series pulse-train converter

Circuit converts number represented as two level signal on n-bit lines to series of pulses on one of two lines, depending on sign of number. Converter accepts parallel binary input data and produces number of output pulses equal to number represented by input data.

Hussey, J.↗
NASA NTRS2009

Wireless sensor platform for harsh environments

Reliable and efficient sensing becomes increasingly difficult in harsher environments. A sensing module for high-temperature conditions utilizes a digital, rather than analog, implementation on a wireless platform to achieve good quality data transmission. The module comprises a sensor, integrated circuit, and antenna. The integrated circuit includes an amplifier, A/D converter, decimation filter, and digital transmitter. To operate, an analog signal is received by the sensor, amplified by the amplifier, converted into a digital signal by the A/D converter, filtered by the decimation filter to address the quantization error, and output in digital format by the digital transmitter and antenna.

Garverick, Steven L.↗
NASA NTRS1991

Digital Accumulators In Phase- And Frequency-Tracking Loops

Report describes investigation of deleterious effects of digital accumulators upon performances of phase- and frequency-tracking electronic circuits used to compute averages and reduce processing rates. Emphasizes problems encountered with respect to digital accumulators in operation of receivers in Global Positioning System (GPS). Also applicable to more general receivers or other signal-processing systems that include digital accumulators.

Hinedi, Sami↗
NASA NTRS2007

Wide Tuning Capability for Spacecraft Transponders

A document presents additional information on the means of implementing a capability for wide tuning of microwave receiver and transmitter frequencies in the development reported in the immediately preceding article, VCO PLL Frequency Synthesizers for Spacecraft Transponders (NPO- 42909). The reference frequency for a PLL-based frequency synthesizer is derived from a numerically controlled oscillator (NCO) implemented in digital logic, such that almost any reference frequency can be derived from a fixed crystal reference oscillator with microhertz precision. The frequency of the NCO is adjusted to track the received signal, then used to create another NCO frequency used to synthesize the transmitted signal coherent with, and at a specified frequency ratio to, the received signal. The frequencies can be changed, even during operation, through suitable digital programming. The NCOs and the related tracking loops and coherent turnaround logic are implemented in a field-programmable gate array (FPGA). The interface between the analog microwave receiver and transmitter circuits and the FPGA includes analog-to-digital and digital-toanalog converters, the sampling rates of which are chosen to minimize spurious signals and otherwise optimize performance. Several mixers and filters are used to properly route various signals.

Lux, James↗
NASA NTRS1972

A high-accuracy digital star tracker for advanced planetary missions.

The digital star tracker represents a novel departure from previous analog designs in terms of circuit implementation and operational capabilities. As an element of an all-digital spacecraft control system, it combines proven low-level analog signal processing with digital error control and command functions. Additional capabilities that are obtainable with the digital circuitry include programmable intensity threshold gates, commanded electronic pointing control, and an acquisition/control algorithm which minimizes the effects of straylight disturbances. The capabilities inherent in the implementation have been successfully demonstrated in a laboratory model of the instrument.

Salomon, P. M.↗
NASA NTRS1973

A high-accuracy digital star tracker for advanced planetary missions

The digital star tracker represents a novel departure from previous analog designs in terms of circuit implementation and operational capabilities. As an element of an all-digital spacecraft control system, it combines proven low-level analog signal processing with digital error control and command functions. Additional capabilities that are obtainable with the digital circuitry include programmable intensity threshold gates, commanded electronic pointing control, and an acquisition/control algorithm which minimizes the effects of straylight disturbances. The capabilities inherent in the implementation have been successfully demonstrated in a laboratory model of the instrument.

Salomon, P. M.↗
NASA NTRS1992

Circuit design tool. User's manual, revision 2

The CAM chip design was produced in a UNIX software environment using a design tool that supports definition of digital electronic modules, composition of these modules into higher level circuits, and event-driven simulation of these circuits. Our design tool provides an interface whose goals include straightforward but flexible primitive module definition and circuit composition, efficient simulation, and a debugging environment that facilitates design verification and alteration. The tool provides a set of primitive modules which can be composed into higher level circuits. Each module is a C-language subroutine that uses a set of interface protocols understood by the design tool. Primitives can be altered simply by recoding their C-code image; in addition new primitives can be added allowing higher level circuits to be described in C-code rather than as a composition of primitive modules--this feature can greatly enhance the speed of simulation.

Miyake, Keith M.↗