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At least 505 records · Page 28
All sourcesNASA NTRSDOE OSTI
NASA NTRS1989

A VLSI chip set for real time vector quantization of image sequences

The architecture and implementation of a VLSI chip set that vector quantizes (VQ) image sequences in real time is described. The chip set forms a programmable Single-Instruction, Multiple-Data (SIMD) machine which can implement various vector quantization encoding structures. Its VQ codebook may contain unlimited number of codevectors, N, having dimension up to K = 64. Under a weighted least squared error criterion, the engine locates at video rates the best code vector in full-searched or large tree searched VQ codebooks. The ability to manipulate tree structured codebooks, coupled with parallelism and pipelining, permits searches in as short as O (log N) cycles. A full codebook search results in O(N) performance, compared to O(KN) for a Single-Instruction, Single-Data (SISD) machine. With this VLSI chip set, an entire video code can be built on a single board that permits realtime experimentation with very large codebooks.

Baker, Richard L.↗
NASA NTRS1989

Parallel processors and nonlinear structural dynamics algorithms and software

A nonlinear structural dynamics finite element program was developed to run on a shared memory multiprocessor with pipeline processors. The program, WHAMS, was used as a framework for this work. The program employs explicit time integration and has the capability to handle both the nonlinear material behavior and large displacement response of 3-D structures. The elasto-plastic material model uses an isotropic strain hardening law which is input as a piecewise linear function. Geometric nonlinearities are handled by a corotational formulation in which a coordinate system is embedded at the integration point of each element. Currently, the program has an element library consisting of a beam element based on Euler-Bernoulli theory and trianglar and quadrilateral plate element based on Mindlin theory.

Belytschko, Ted↗
NASA NTRS1989

Chemical calculations on Cray computers

The influence of recent developments in supercomputing on computational chemistry is discussed with particular reference to Cray computers and their pipelined vector/limited parallel architectures. After reviewing Cray hardware and software the performance of different elementary program structures are examined, and effective methods for improving program performance are outlined. The computational strategies appropriate for obtaining optimum performance in applications to quantum chemistry and dynamics are discussed. Finally, some discussion is given of new developments and future hardware and software improvements.

Taylor, Peter R.↗
NASA NTRS1987

Parallel processing for digital picture comparison

In picture processing an important problem is to identify two digital pictures of the same scene taken under different lighting conditions. This kind of problem can be found in remote sensing, satellite signal processing and the related areas. The identification can be done by transforming the gray levels so that the gray level histograms of the two pictures are closely matched. The transformation problem can be solved by using the packing method. Researchers propose a VLSI architecture consisting of m x n processing elements with extensive parallel and pipelining computation capabilities to speed up the transformation with the time complexity 0(max(m,n)), where m and n are the numbers of the gray levels of the input picture and the reference picture respectively. If using uniprocessor and a dynamic programming algorithm, the time complexity will be 0(m(3)xn). The algorithm partition problem, as an important issue in VLSI design, is discussed. Verification of the proposed architecture is also given.

Cheng, H. D.↗
NASA NTRS1988

Bidiagonalization and symmetric tridiagonalization by systolic arrays

A systolic algorithm and an array for bidiagonalization of an nxn matrix in O(nlog(2)n) time, using O(n to the 2nd power) cells are given. Bandedness of the input matrix may be effectively exploited. If the matrix is banded, with p nonzero subdiagonals and q nonzero superdiagonals, then 4nln(p + q) + O(n) clocks and 2n(p + q) + O((p + q) to the 2nd power + n) cells are needed. This is faster than the best previously reported result by the factor log(2)e = 1.44.... Moreover, in contrast to earlier systolic designs, which require the matrix to be preloaded into the array and the result matrix extracted after bidiagonalization, the present arrays are pipelined.

Schreiber, Robert↗
NASA NTRS1988

Applications of spaceborne laser ranger on EOS

An account is given of the design concept and potential applications in science and engineering of the spaceborne laser ranging and altimeter apparatus employed by the Geodynamics Laser Ranging System; this is scheduled for 1997 launch as part of the multiple-satellite Earth Observing System. In the retrograding mode for geodynamics, the system will use a Nd:YAG laser's green and UV output for distance determination to ground retroreflectors. Engineering applications encompass land management and long-term ground stability studies relevant to nuclear power plant, pipeline, and aqueduct locations.

Degnan, John J.↗
NASA NTRS1988

Large-scale turbulence simulation on the Navier-Stokes Computer

Analytical techniques for turbulent air or water flow over vehicles and for the development of active control methods are described, with a focus on simulations being implemented on the Navier-Stokes Computer (NSC) at Princeton University. Consideration is given to the general NSC architecture (the central control, memory, and processing units; the switching network; and the prototype NSC), the algorithm for large-scale MHD turbulence (Orszag and Tang, 1979), and the pipeline configurations. Extensive diagrams and flow charts are provided.

Hayder, M. E.↗
NASA NTRS1988

Recursive least squares estimation and Kalman filtering by systolic arrays

One of the most promising new directions for high-throughput-rate problems is that based on systolic arrays. In this paper, using the matrix-decomposition approach, a systolic Kalman filter is formulated as a modified square-root information filter consisting of a whitening filter followed by a simple least-squares operation based on the systolic QR algorithm. By proper skewing of the input data, a fully pipelined time and measurement update systolic Kalman filter can be achieved with O(n squared) processing cells, resulting in a system throughput rate of O (n).

Chen, M. J.↗
NASA NTRS1988

VLSI high speed packet processor

The Goddard Space Flight Center Mission Operations and Data Systems Directorate has developed a packet processor card utilizing semicustom very large scale integration (VLSI) devices, microprocessors, and programmable gate arrays to support the implementation of multichannel telemetry data capture systems. This card will receive synchronized error corrected telemetry transfer frames and output annotated application packets derived from this data. An adaptable format capability is provided by the programmability of three microprocessors while the throughput capability of the packet processor is achieved by a data pipeline consisting of two separate RAM systems controlled by specially designed semicustom VLSI logic.

Grebowsky, Gerald J.↗
NASA NTRS1990

VLSI Architecture For Viterbi Decoder

"Pipeline" architecture developed for very-large-scale integrated (VLSI) Viterbi decoding circuits for binary convolutional codes of large constraint lengths. In scheme, single sequential processor computes path metrics in trellis diagram (diagram in which paths and nodes represent possible sequences of code states and in which metrics indicate relative likelihoods of sequences). Systolic-array method used to store path information as well as to choose path with best metric. VLSI Viterbi-decoder architecture is compromise between speed and complexity. Size of decoding circuit increases approximately linearly with constraint length of code, and additional circuit chips added with moderate numbers of interconnections.

Hsu, In-Shek↗
NASA NTRS1990

Simplified Correction Of Errors In Reed-Solomon Codes

New decoder realized by simplified pipeline architecture. Simplified procedure for correction of errors and erasures in Reed-Solomon codes expected to result in simpler decoding equipment. Development widens commercial applicability of Reed-Solomon codes, used to correct bursts of errors in digital communication and recording systems. Improved decoder less complex. Made more regular, simple, and suitable for implementation in both VLSI and software.

Truong, T. K.↗
NASA NTRS1990

Collection Of Software For Computer Graphics

Ames Research Graphics System (ARCGRAPH) collection of software libraries and software utilities assisting researchers in generating, manipulating, and visualizing graphical data. Defines metafile format containing device-independent graphical data. File format used with various computer-graphics-manipulation and -animation software packages at Ames, including SURF (COSMIC Program ARC-12381) and GAS (COSMIC Program ARC-12379). Consists of two-stage "pipeline" used to put out graphical primitives. ARCGRAPH libraries developed on VAX computer running VMS.

Hibbard, Eric A.↗
NASA NTRS1990

Balancing Loads Among Parallel Data Processors

Heuristic algorithm minimizes amount of memory used by multiprocessor system. Distributes load of many identical, short computations among multiple parallel digital data processors, each of which has its own (local) memory. Each processor operates on distinct and independent set of data in larger shared memory. As integral part of load-balancing scheme, total amount of space used in shared memory minimized. Possible applications include artificial neural networks or image processors for which "pipeline" and vector methods of load balancing inappropriate.

Baffes, Paul Thomas↗
NASA NTRS1989

VLSI binary updown counter

A pipeline binary updown counter is comprised of simple stages that may be readily replicated. Each stage is defined by the Boolean logic equation: A(sub n)(t) = A(sub n)(t - 1) exclusive OR (U AND P(sub n)) inclusive OR (D AND Q(sub n)), where A(sub n)(t) denotes the value of the nth bit at time t. The input to the counter has three values represented by two binary signals U and D such that if both are zero, the input is zero, if U = 0 and D = 1, the input is -1 and if U = 1 and D = 0, the input is +1. P(sub n) represents a product of A(sub k)'s for 1 is less than or equal to k is less than or equal to -1, while Q(sub n) represents the product of bar A's for 1 is less than or equal to K is less than or equal to n - 1, where bar A(sub k) is the complement of A(sub k) and P(sub n) and Q(sub n) are expressed as the following two equations: P(sub n) = A(sub n - 1) A(sub n - 2)...A(sub 1) and Q(sub n) = bar A(sub n - 1) bar A(sub n - 2)...bar A(sub 1), which can be written in recursive form as P(sub n) = P(sub n - 1) AND bar A(sub n - 1) and Q(sub n) = Q(sub n - 1) AND bar A(sub n - 1) with the initial values P(sub 1) = 1 and Q(sub 1) = 1.

Truong, Trieu-Kie↗
NASA NTRS1990

Intensity dependent spread processor and workstation

The Intensity Dependent Spread (IDS) is an adaptive algorithm which is modified according to the local intensity in the scene. (This results in a nonlinear process which cannot take advantage of rather nice linear transform methods.) The computation is similar to a neural net whereby intensity information is moving from each input pixel to a set of surrounding output pixels in a manner described by Cornsweet and Yellott. A prototype of a very large scale integration IDS processor is being developed and implemented in a workstation environment. The workstation consists of a SUN 3/260 and a DATACUBE pipeline processor. The IDS prototype is a board set which operates in the DATA CUBE processor. The SUN 3/260 performs control, background processing, IDS simulation and image display functions.

Westrom, George↗
NASA NTRS1990

A laboratory breadboard system for dual-arm teleoperation

The computing architecture of a novel dual-arm teleoperation system is described. The novelty of this system is that: (1) the master arm is not a replica of the slave arm; it is unspecific to any manipulator and can be used for the control of various robot arms with software modifications; and (2) the force feedback to the general purpose master arm is derived from force-torque sensor data originating from the slave hand. The computing architecture of this breadboard system is a fully synchronized pipeline with unique methods for data handling, communication and mathematical transformations. The computing system is modular, thus inherently extendable. The local control loops at both sites operate at 100 Hz rate, and the end-to-end bilateral (force-reflecting) control loop operates at 200 Hz rate, each loop without interpolation. This provides high-fidelity control. This end-to-end system elevates teleoperation to a new level of capabilities via the use of sensors, microprocessors, novel electronics, and real-time graphics displays. A description is given of a graphic simulation system connected to the dual-arm teleoperation breadboard system. High-fidelity graphic simulation of a telerobot (called Phantom Robot) is used for preview and predictive displays for planning and for real-time control under several seconds communication time delay conditions. High fidelity graphic simulation is obtained by using appropriate calibration techniques.

Bejczy, A. K.↗
NASA NTRS1989

Autonomous sensor-based dual-arm satellite grappling

Dual-arm satellite grappling involves the integration of technologies developed in the Sensing and Perception (S&P) Subsystem for object acquisition and tracking, and the Manipulator Control and Mechanization (MCM) Subsystem for dual-arm control. S&P acquires and tracks the position, orientation, velocity, and angular velocity of a slowly spinning satellite, and sends tracking data to the MCM subsystem. MCM grapples the satellite and brings it to rest, controlling the arms so that no excessive forces or torques are exerted on the satellite or arms. A 350-pound satellite mockup which can spin freely on a gimbal for several minutes, closely simulating the dynamics of a real satellite is demonstrated. The satellite mockup is fitted with a panel under which may be mounted various elements such as line replacement modules and electrical connectors that will be used to demonstrate servicing tasks once the satellite is docked. The subsystems are housed in three MicroVAX II microcomputers. The hardware of the S&P Subsystem includes CCD cameras, video digitizers, frame buffers, IMFEX (a custom pipelined video processor), a time-code generator with millisecond precision, and a MicroVAX II computer. Its software is written in Pascal and is based on a locally written vision software library. The hardware of the MCM Subsystem includes PUMA 560 robot arms, Lord force/torque sensors, two MicroVAX II computers, and unimation pneumatic parallel grippers. Its software is written in C, and is based on a robot language called RCCL. The two subsystems are described and test results on the grappling of the satellite mockup with rotational rates of up to 2 rpm are provided.

Wilcox, Brian↗
NASA NTRS1989

Force-reflective teleoperated system with shared and compliant control capabilities

The force-reflecting teleoperator breadboard is described. It is the first system among available Research and Development systems with the following combined capabilities: (1) The master input device is not a replica of the slave arm. It is a general purpose device which can be applied to the control of different robot arms through proper mathematical transformations. (2) Force reflection generated in the master hand controller is referenced to forces and moments measured by a six DOF force-moment sensor at the base of the robot hand. (3) The system permits a smooth spectrum of operations between full manual, shared manual and automatic, and full automatic (called traded) control. (4) The system can be operated with variable compliance or stiffness in force-reflecting control. Some of the key points of the system are the data handling and computing architecture, the communication method, and the handling of mathematical transformations. The architecture is a fully synchronized pipeline. The communication method achieves optimal use of a parallel communication channel between the local and remote computing nodes. A time delay box is also implemented in this communication channel permitting experiments with up to 8 sec time delay. The mathematical transformations are computed faster than 1 msec so that control at each node can be operated at 1 kHz servo rate without interpolation. This results in an overall force-reflecting loop rate of 200 Hz.

Szakaly, Z.↗